2025-04-15 22:20:46 +03:00
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# OR instruction tests
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# Format: RawBytes;Instructions
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RawBytes;Instructions
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# OR r/m8, imm8 (opcode 80 /1)
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80C842;[{ "Type": "Or", "Operands": ["al", "0x42"] }]
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# OR r/m32, imm32 (opcode 81 /1)
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81C878563412;[{ "Type": "Or", "Operands": ["eax", "0x12345678"] }]
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# OR r/m32, imm8 (opcode 83 /1)
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83C842;[{ "Type": "Or", "Operands": ["eax", "0x42"] }]
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# OR with memory operands
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2025-04-16 21:44:02 +03:00
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# INVALID TEST: The following test has an invalid encoding.
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# When ModR/M byte has R/M=100 (ESP), a SIB byte is required.
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# 810C2578563412;[{ "Type": "Or", "Operands": ["dword ptr [eax]", "0x12345678"] }]
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# Correct encoding for "Or dword ptr [eax], 0x12345678"
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810878563412;[{ "Type": "Or", "Operands": ["dword ptr [eax]", "0x12345678"] }]
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2025-04-15 22:20:46 +03:00
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# OR r/m32, r32 (opcode 09)
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09D8;[{ "Type": "Or", "Operands": ["eax", "ebx"] }]
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09CA;[{ "Type": "Or", "Operands": ["edx", "ecx"] }]
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094B10;[{ "Type": "Or", "Operands": ["dword ptr [ebx+0x10]", "ecx"] }]
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# OR r32, r/m32 (opcode 0B)
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0BD8;[{ "Type": "Or", "Operands": ["ebx", "eax"] }]
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0BCA;[{ "Type": "Or", "Operands": ["ecx", "edx"] }]
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0B4B10;[{ "Type": "Or", "Operands": ["ecx", "dword ptr [ebx+0x10]"] }]
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