2025-04-15 22:20:46 +03:00
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# DIV instruction tests
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# Format: RawBytes;Instructions
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RawBytes;Instructions
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# DIV r/m8 (opcode F6 /6)
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F6F0;[{ "Type": "Div", "Operands": ["al"] }]
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F6F3;[{ "Type": "Div", "Operands": ["bl"] }]
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F6F1;[{ "Type": "Div", "Operands": ["cl"] }]
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F6F2;[{ "Type": "Div", "Operands": ["dl"] }]
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2025-04-15 22:35:14 +03:00
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F6F4;[{ "Type": "Div", "Operands": ["ah"] }]
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F6F5;[{ "Type": "Div", "Operands": ["ch"] }]
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F6F6;[{ "Type": "Div", "Operands": ["dh"] }]
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F6F7;[{ "Type": "Div", "Operands": ["bh"] }]
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2025-04-15 22:20:46 +03:00
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# DIV r/m32 (opcode F7 /6)
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F7F0;[{ "Type": "Div", "Operands": ["eax"] }]
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F7F3;[{ "Type": "Div", "Operands": ["ebx"] }]
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F7F1;[{ "Type": "Div", "Operands": ["ecx"] }]
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F7F2;[{ "Type": "Div", "Operands": ["edx"] }]
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F7F4;[{ "Type": "Div", "Operands": ["esp"] }]
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F7F5;[{ "Type": "Div", "Operands": ["ebp"] }]
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F7F6;[{ "Type": "Div", "Operands": ["esi"] }]
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F7F7;[{ "Type": "Div", "Operands": ["edi"] }]
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# DIV with memory operands
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2025-04-15 22:35:14 +03:00
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# Basic memory addressing
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2025-04-16 21:16:31 +03:00
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# SPECIAL CASE: When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement
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# The correct encoding for "DIV byte ptr [eax]" would be F630 (with Mod=00, R/M=0 for EAX)
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# F63425;[{ "Type": "Div", "Operands": ["byte ptr [eax]"] }]
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F630;[{ "Type": "Div", "Operands": ["byte ptr [eax]"] }]
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# For "DIV byte ptr [ebp]", we need to use Mod=01 with a zero displacement since [ebp] can't be encoded with Mod=00
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# F63C25;[{ "Type": "Div", "Operands": ["byte ptr [ebp]"] }]
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F66500;[{ "Type": "Div", "Operands": ["byte ptr [ebp]"] }]
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# The correct encoding for "DIV byte ptr [eax]" would be F630 (with Mod=00, R/M=0 for EAX)
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# F63825;[{ "Type": "Div", "Operands": ["byte ptr [eax]"] }]
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F630;[{ "Type": "Div", "Operands": ["byte ptr [eax]"] }]
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# The correct encoding for "DIV dword ptr [eax]" would be F730 (with Mod=00, R/M=0 for EAX)
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# F73425;[{ "Type": "Div", "Operands": ["dword ptr [eax]"] }]
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F730;[{ "Type": "Div", "Operands": ["dword ptr [eax]"] }]
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# For "DIV dword ptr [ebp]", we need to use Mod=01 with a zero displacement since [ebp] can't be encoded with Mod=00
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# F73C25;[{ "Type": "Div", "Operands": ["dword ptr [ebp]"] }]
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F76500;[{ "Type": "Div", "Operands": ["dword ptr [ebp]"] }]
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# The correct encoding for "DIV dword ptr [eax]" would be F730 (with Mod=00, R/M=0 for EAX)
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# F73825;[{ "Type": "Div", "Operands": ["dword ptr [eax]"] }]
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F730;[{ "Type": "Div", "Operands": ["dword ptr [eax]"] }]
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2025-04-15 22:35:14 +03:00
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# With displacement
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2025-04-16 21:16:31 +03:00
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# The correct encoding for "DIV dword ptr [eax+0x10]" would be F74010 (with Mod=01, R/M=0 for EAX, disp8=0x10)
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# F7742510000000;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x10]"] }]
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F74010;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x10]"] }]
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# The correct encoding for "DIV dword ptr [eax+0x20]" would be F74020 (with Mod=01, R/M=0 for EAX, disp8=0x20)
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# F7742520000000;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x20]"] }]
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F74020;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x20]"] }]
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# The correct encoding for "DIV dword ptr [eax+0x30]" would be F74030 (with Mod=01, R/M=0 for EAX, disp8=0x30)
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# F7742530000000;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x30]"] }]
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F74030;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x30]"] }]
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2025-04-15 22:35:14 +03:00
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# With SIB addressing
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F7341C;[{ "Type": "Div", "Operands": ["dword ptr [esp+ebx*1]"] }]
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F7345C;[{ "Type": "Div", "Operands": ["dword ptr [esp+ebx*2]"] }]
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F7349C;[{ "Type": "Div", "Operands": ["dword ptr [esp+ebx*4]"] }]
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F734DC;[{ "Type": "Div", "Operands": ["dword ptr [esp+ebx*8]"] }]
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# With segment override prefixes
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2025-04-16 19:43:03 +03:00
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# not recognized by ghidra or online disasms
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# 26F73425;[{ "Type": "Div", "Operands": ["dword ptr es:[eax]"] }]
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# 2EF73425;[{ "Type": "Div", "Operands": ["dword ptr cs:[eax]"] }]
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# 36F73425;[{ "Type": "Div", "Operands": ["dword ptr ss:[eax]"] }]
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# 3EF73425;[{ "Type": "Div", "Operands": ["dword ptr ds:[eax]"] }]
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# 64F73425;[{ "Type": "Div", "Operands": ["dword ptr fs:[eax]"] }]
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# 65F73425;[{ "Type": "Div", "Operands": ["dword ptr gs:[eax]"] }]
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