2025-04-15 22:20:46 +03:00
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# ADD instruction tests
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# Format: RawBytes;Instructions
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RawBytes;Instructions
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# ADD r/m8, imm8 (opcode 80 /0)
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80C042;[{ "Type": "Add", "Operands": ["al", "0x42"] }]
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2025-04-15 22:27:51 +03:00
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80C342;[{ "Type": "Add", "Operands": ["bl", "0x42"] }]
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80C142;[{ "Type": "Add", "Operands": ["cl", "0x42"] }]
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80C242;[{ "Type": "Add", "Operands": ["dl", "0x42"] }]
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# ADD AL, imm8 (opcode 04)
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0442;[{ "Type": "Add", "Operands": ["al", "0x42"] }]
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2025-04-15 22:20:46 +03:00
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# ADD r/m32, imm32 (opcode 81 /0)
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81C078563412;[{ "Type": "Add", "Operands": ["eax", "0x12345678"] }]
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2025-04-15 22:27:51 +03:00
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81C378563412;[{ "Type": "Add", "Operands": ["ebx", "0x12345678"] }]
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81C178563412;[{ "Type": "Add", "Operands": ["ecx", "0x12345678"] }]
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81C278563412;[{ "Type": "Add", "Operands": ["edx", "0x12345678"] }]
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# ADD EAX, imm32 (opcode 05)
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0578563412;[{ "Type": "Add", "Operands": ["eax", "0x12345678"] }]
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2025-04-15 22:20:46 +03:00
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# ADD r/m32, imm8 (opcode 83 /0) with sign extension
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83C042;[{ "Type": "Add", "Operands": ["eax", "0x42"] }]
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2025-04-15 22:27:51 +03:00
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83C342;[{ "Type": "Add", "Operands": ["ebx", "0x42"] }]
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83C142;[{ "Type": "Add", "Operands": ["ecx", "0x42"] }]
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83C242;[{ "Type": "Add", "Operands": ["edx", "0x42"] }]
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2025-04-15 22:20:46 +03:00
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83C0FF;[{ "Type": "Add", "Operands": ["eax", "0xFFFFFFFF"] }]
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2025-04-15 22:27:51 +03:00
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83C3FF;[{ "Type": "Add", "Operands": ["ebx", "0xFFFFFFFF"] }]
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2025-04-15 22:20:46 +03:00
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2025-04-15 22:27:51 +03:00
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# ADD r/m8, r8 (opcode 00)
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00C3;[{ "Type": "Add", "Operands": ["bl", "al"] }]
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00D9;[{ "Type": "Add", "Operands": ["cl", "bl"] }]
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00E2;[{ "Type": "Add", "Operands": ["dl", "ah"] }]
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# ADD r8, r/m8 (opcode 02)
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02C3;[{ "Type": "Add", "Operands": ["al", "bl"] }]
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02D9;[{ "Type": "Add", "Operands": ["bl", "cl"] }]
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02E2;[{ "Type": "Add", "Operands": ["ah", "dl"] }]
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2025-04-15 22:20:46 +03:00
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# ADD r/m32, r32 (opcode 01)
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01D8;[{ "Type": "Add", "Operands": ["eax", "ebx"] }]
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01CA;[{ "Type": "Add", "Operands": ["edx", "ecx"] }]
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2025-04-15 22:27:51 +03:00
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01E5;[{ "Type": "Add", "Operands": ["ebp", "esp"] }]
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2025-04-15 22:20:46 +03:00
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014B10;[{ "Type": "Add", "Operands": ["dword ptr [ebx+0x10]", "ecx"] }]
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# ADD r32, r/m32 (opcode 03)
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03D8;[{ "Type": "Add", "Operands": ["ebx", "eax"] }]
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03CA;[{ "Type": "Add", "Operands": ["ecx", "edx"] }]
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2025-04-15 22:27:51 +03:00
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03E5;[{ "Type": "Add", "Operands": ["esp", "ebp"] }]
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2025-04-15 22:20:46 +03:00
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034B10;[{ "Type": "Add", "Operands": ["ecx", "dword ptr [ebx+0x10]"] }]
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2025-04-15 22:27:51 +03:00
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# ADD with memory operands
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8004251000000042;[{ "Type": "Add", "Operands": ["byte ptr [0x10]", "0x42"] }]
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8104251000000078563412;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "0x12345678"] }]
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8304251000000042;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "0x42"] }]
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2025-04-15 23:54:51 +03:00
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00042510000000;[{ "Type": "Add", "Operands": ["byte ptr [0x10]", "al"] }]
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02042510000000;[{ "Type": "Add", "Operands": ["al", "byte ptr [0x10]"] }]
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01042510000000;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "eax"] }]
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03042510000000;[{ "Type": "Add", "Operands": ["eax", "dword ptr [0x10]"] }]
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