0
mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-05-19 20:01:17 +03:00

147 lines
6.2 KiB
C#
Raw Normal View History

2025-04-12 23:24:42 +03:00
namespace X86Disassembler.X86.Handlers.FloatingPoint;
/// <summary>
/// Handler for floating-point load/store float64 operations (DD opcode)
/// </summary>
2025-04-13 23:06:52 +03:00
public class LoadStoreFloat64Handler : InstructionHandler
2025-04-12 23:24:42 +03:00
{
// Memory operand mnemonics for DD opcode - load/store float64
private static readonly string[] MemoryMnemonics =
2025-04-12 23:24:42 +03:00
[
"fld", // 0
"??", // 1
"fst", // 2
"fstp", // 3
"frstor", // 4
"??", // 5
"fnsave", // 6
"fnstsw" // 7
2025-04-12 23:24:42 +03:00
];
// Register-register operations mapping (mod=3)
private static readonly Dictionary<(RegisterIndex Reg, RegisterIndex Rm), (string Mnemonic, string Operands)> RegisterOperations = new()
{
// FFREE ST(i)
{ (RegisterIndex.A, RegisterIndex.A), ("ffree", "st(0)") },
{ (RegisterIndex.A, RegisterIndex.C), ("ffree", "st(1)") },
{ (RegisterIndex.A, RegisterIndex.D), ("ffree", "st(2)") },
{ (RegisterIndex.A, RegisterIndex.B), ("ffree", "st(3)") },
{ (RegisterIndex.A, RegisterIndex.Sp), ("ffree", "st(4)") },
{ (RegisterIndex.A, RegisterIndex.Bp), ("ffree", "st(5)") },
{ (RegisterIndex.A, RegisterIndex.Si), ("ffree", "st(6)") },
{ (RegisterIndex.A, RegisterIndex.Di), ("ffree", "st(7)") },
// FST ST(i)
{ (RegisterIndex.C, RegisterIndex.A), ("fst", "st(0)") },
{ (RegisterIndex.C, RegisterIndex.C), ("fst", "st(1)") },
{ (RegisterIndex.C, RegisterIndex.D), ("fst", "st(2)") },
{ (RegisterIndex.C, RegisterIndex.B), ("fst", "st(3)") },
{ (RegisterIndex.C, RegisterIndex.Sp), ("fst", "st(4)") },
{ (RegisterIndex.C, RegisterIndex.Bp), ("fst", "st(5)") },
{ (RegisterIndex.C, RegisterIndex.Si), ("fst", "st(6)") },
{ (RegisterIndex.C, RegisterIndex.Di), ("fst", "st(7)") },
// FSTP ST(i)
{ (RegisterIndex.D, RegisterIndex.A), ("fstp", "st(0)") },
{ (RegisterIndex.D, RegisterIndex.C), ("fstp", "st(1)") },
{ (RegisterIndex.D, RegisterIndex.D), ("fstp", "st(2)") },
{ (RegisterIndex.D, RegisterIndex.B), ("fstp", "st(3)") },
{ (RegisterIndex.D, RegisterIndex.Sp), ("fstp", "st(4)") },
{ (RegisterIndex.D, RegisterIndex.Bp), ("fstp", "st(5)") },
{ (RegisterIndex.D, RegisterIndex.Si), ("fstp", "st(6)") },
{ (RegisterIndex.D, RegisterIndex.Di), ("fstp", "st(7)") },
// FUCOM ST(i)
{ (RegisterIndex.Si, RegisterIndex.A), ("fucom", "st(0)") },
{ (RegisterIndex.Si, RegisterIndex.C), ("fucom", "st(1)") },
{ (RegisterIndex.Si, RegisterIndex.D), ("fucom", "st(2)") },
{ (RegisterIndex.Si, RegisterIndex.B), ("fucom", "st(3)") },
{ (RegisterIndex.Si, RegisterIndex.Sp), ("fucom", "st(4)") },
{ (RegisterIndex.Si, RegisterIndex.Bp), ("fucom", "st(5)") },
{ (RegisterIndex.Si, RegisterIndex.Si), ("fucom", "st(6)") },
{ (RegisterIndex.Si, RegisterIndex.Di), ("fucom", "st(7)") },
// FUCOMP ST(i)
{ (RegisterIndex.Di, RegisterIndex.A), ("fucomp", "st(0)") },
{ (RegisterIndex.Di, RegisterIndex.C), ("fucomp", "st(1)") },
{ (RegisterIndex.Di, RegisterIndex.D), ("fucomp", "st(2)") },
{ (RegisterIndex.Di, RegisterIndex.B), ("fucomp", "st(3)") },
{ (RegisterIndex.Di, RegisterIndex.Sp), ("fucomp", "st(4)") },
{ (RegisterIndex.Di, RegisterIndex.Bp), ("fucomp", "st(5)") },
{ (RegisterIndex.Di, RegisterIndex.Si), ("fucomp", "st(6)") },
{ (RegisterIndex.Di, RegisterIndex.Di), ("fucomp", "st(7)") }
};
2025-04-12 23:24:42 +03:00
/// <summary>
/// Initializes a new instance of the LoadStoreFloat64Handler class
/// </summary>
/// <param name="codeBuffer">The buffer containing the code to decode</param>
/// <param name="decoder">The instruction decoder that owns this handler</param>
/// <param name="length">The length of the buffer</param>
public LoadStoreFloat64Handler(byte[] codeBuffer, InstructionDecoder decoder, int length)
: base(codeBuffer, decoder, length)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
return opcode == 0xDD;
}
/// <summary>
/// Decodes a floating-point instruction for load/store float64 operations
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
2025-04-12 23:24:42 +03:00
{
return false;
}
// Read the ModR/M byte
var (mod, reg, rm, memOperand) = ModRMDecoder.ReadModRM(true); // true for 64-bit operand
2025-04-12 23:24:42 +03:00
// Handle based on addressing mode
2025-04-12 23:24:42 +03:00
if (mod != 3) // Memory operand
{
// Set the mnemonic based on the reg field
instruction.Mnemonic = MemoryMnemonics[(int)reg];
2025-04-13 23:06:52 +03:00
if (reg == RegisterIndex.A || reg == RegisterIndex.C || reg == RegisterIndex.D) // fld, fst, fstp
2025-04-12 23:24:42 +03:00
{
// Keep the qword ptr prefix from ModRMDecoder
instruction.Operands = memOperand;
2025-04-12 23:24:42 +03:00
}
else // frstor, fnsave, fnstsw
{
// Remove the qword ptr prefix for these operations
instruction.Operands = memOperand.Replace("qword ptr ", "");
2025-04-12 23:24:42 +03:00
}
}
else // Register operand (ST(i))
{
// Look up the register operation in our dictionary
if (RegisterOperations.TryGetValue((reg, rm), out var operation))
2025-04-12 23:24:42 +03:00
{
instruction.Mnemonic = operation.Mnemonic;
instruction.Operands = operation.Operands;
2025-04-12 23:24:42 +03:00
}
else
{
// Unknown instruction
instruction.Mnemonic = "??";
instruction.Operands = "";
}
}
return true;
}
}