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Added detailed comments to test files explaining x86 encoding special cases: 1) Mod=00 and R/M=101 (EBP) for displacement-only addressing, 2) Mod=00 and R/M=100 (ESP) for SIB byte requirement, 3) SIB byte with EBP as base register special cases
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@ -27,6 +27,9 @@ FF22;[{ "Type": "Jmp", "Operands": ["dword ptr [edx]"] }]
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FF23;[{ "Type": "Jmp", "Operands": ["dword ptr [ebx]"] }]
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FF24;[{ "Type": "Jmp", "Operands": ["dword ptr [esp]"] }]
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# SPECIAL CASE: When Mod=00 and R/M=101 (EBP), this doesn't actually refer to [EBP].
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# Instead, it's a special case that indicates a 32-bit displacement-only addressing mode.
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# The correct encoding for this would be FF2578563412 which is "Jmp dword ptr [0x12345678]"
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# FF25;[{ "Type": "Jmp", "Operands": ["dword ptr [ebp]"] }]
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FF26;[{ "Type": "Jmp", "Operands": ["dword ptr [esi]"] }]
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FF27;[{ "Type": "Jmp", "Operands": ["dword ptr [edi]"] }]
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@ -42,7 +45,11 @@ FF6610;[{ "Type": "Jmp", "Operands": ["dword ptr [esi+0x10]"] }]
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FF6710;[{ "Type": "Jmp", "Operands": ["dword ptr [edi+0x10]"] }]
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# JMP m32 (opcode FF /4) with SIB byte
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# not recognized by ghidra or online disasms
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# SPECIAL CASE: These SIB encodings with EBP as base register have special rules.
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# When the SIB byte has Base=101 (EBP) and Mod=00, the base register is not used.
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# Instead, a 32-bit displacement follows the SIB byte (similar to the Mod=00, R/M=101 special case).
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# These instructions are commented out because they're not correctly recognized by many disassemblers,
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# including Ghidra and online disassemblers, due to their unusual encoding.
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# FF24C5;[{ "Type": "Jmp", "Operands": ["dword ptr [eax*8+ebp]"] }]
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# FF24CD;[{ "Type": "Jmp", "Operands": ["dword ptr [ecx*8+ebp]"] }]
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# FF24D5;[{ "Type": "Jmp", "Operands": ["dword ptr [edx*8+ebp]"] }]
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