From 167b0e2c482b10305d2fb5c4c6288db0cea639a6 Mon Sep 17 00:00:00 2001 From: bird_egop Date: Fri, 18 Apr 2025 13:13:13 +0300 Subject: [PATCH] Fix floating-point instruction test encodings for memory operands --- X86DisassemblerTests/TestData/fpu_misc_tests.csv | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/X86DisassemblerTests/TestData/fpu_misc_tests.csv b/X86DisassemblerTests/TestData/fpu_misc_tests.csv index 35d715f..88213ec 100644 --- a/X86DisassemblerTests/TestData/fpu_misc_tests.csv +++ b/X86DisassemblerTests/TestData/fpu_misc_tests.csv @@ -38,23 +38,23 @@ DBE2;[{ "Type": "Fnclex", "Operands": [] }] # FLDCW - Load FPU control word D92C2510000000;[{ "Type": "Fldcw", "Operands": ["word ptr [0x10]"] }] -D92C25;[{ "Type": "Fldcw", "Operands": ["word ptr [eax]"] }] +D928;[{ "Type": "Fldcw", "Operands": ["word ptr [eax]"] }] # FNSTCW - Store FPU control word without checking for pending unmasked exceptions D93C2510000000;[{ "Type": "Fnstcw", "Operands": ["word ptr [0x10]"] }] -D93C25;[{ "Type": "Fnstcw", "Operands": ["word ptr [eax]"] }] +D938;[{ "Type": "Fnstcw", "Operands": ["word ptr [eax]"] }] # FLDENV - Load FPU environment -D92425;[{ "Type": "Fldenv", "Operands": ["dword ptr [eax]"] }] +D920;[{ "Type": "Fldenv", "Operands": ["dword ptr [eax]"] }] # FNSTENV - Store FPU environment without checking for pending unmasked exceptions -D93425;[{ "Type": "Fnstenv", "Operands": ["dword ptr [eax]"] }] +D930;[{ "Type": "Fnstenv", "Operands": ["dword ptr [eax]"] }] # FRSTOR - Restore FPU state -DD2425;[{ "Type": "Frstor", "Operands": ["dword ptr [eax]"] }] +DD20;[{ "Type": "Frstor", "Operands": ["dword ptr [eax]"] }] # FNSAVE - Save FPU state without checking for pending unmasked exceptions -DD3425;[{ "Type": "Fnsave", "Operands": ["dword ptr [eax]"] }] +DD30;[{ "Type": "Fnsave", "Operands": ["dword ptr [eax]"] }] # F2XM1 - 2^x - 1 D9F0;[{ "Type": "F2xm1", "Operands": [] }]