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add tons of tests

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bird_egop
2025-04-15 22:20:46 +03:00
parent abe4d38d4b
commit 2123ed2c5d
51 changed files with 1927 additions and 311 deletions
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X86DisassemblerTests/TestData/ror_tests.csv Normal file
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# ROR instruction tests
# Format: RawBytes;Instructions
RawBytes;Instructions
# ROR r/m8, 1 (opcode D0 /1)
D0C8;[{ "Type": "Ror", "Operands": ["al", "0x01"] }]
D0CB;[{ "Type": "Ror", "Operands": ["bl", "0x01"] }]
# ROR r/m32, 1 (opcode D1 /1)
D1C8;[{ "Type": "Ror", "Operands": ["eax", "0x01"] }]
D1CB;[{ "Type": "Ror", "Operands": ["ebx", "0x01"] }]
# ROR r/m8, CL (opcode D2 /1)
D2C8;[{ "Type": "Ror", "Operands": ["al", "cl"] }]
D2CB;[{ "Type": "Ror", "Operands": ["bl", "cl"] }]
# ROR r/m32, CL (opcode D3 /1)
D3C8;[{ "Type": "Ror", "Operands": ["eax", "cl"] }]
D3CB;[{ "Type": "Ror", "Operands": ["ebx", "cl"] }]
# ROR r/m8, imm8 (opcode C0 /1)
C0C805;[{ "Type": "Ror", "Operands": ["al", "0x05"] }]
C0CB05;[{ "Type": "Ror", "Operands": ["bl", "0x05"] }]
# ROR r/m32, imm8 (opcode C1 /1)
C1C805;[{ "Type": "Ror", "Operands": ["eax", "0x05"] }]
C1CB05;[{ "Type": "Ror", "Operands": ["ebx", "0x05"] }]
# ROR with memory operands
D00C2510;[{ "Type": "Ror", "Operands": ["byte ptr [eax+0x10]", "0x01"] }]
D30C2510;[{ "Type": "Ror", "Operands": ["dword ptr [eax+0x10]", "cl"] }]
C10C2505;[{ "Type": "Ror", "Operands": ["dword ptr [eax+0x10]", "0x05"] }]
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