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https://github.com/sampletext32/ParkanPlayground.git
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Added support for CALL r/m32 (0xFF /2) and ADD r32, r/m32 (0x03) instructions with tests
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73
X86Disassembler/X86/Handlers/Add/AddR32Rm32Handler.cs
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73
X86Disassembler/X86/Handlers/Add/AddR32Rm32Handler.cs
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namespace X86Disassembler.X86.Handlers.Add;
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/// <summary>
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/// Handler for ADD r32, r/m32 instruction (0x03)
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/// </summary>
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public class AddR32Rm32Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the AddR32Rm32Handler class
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/// </summary>
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/// <param name="codeBuffer">The buffer containing the code to decode</param>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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/// <param name="length">The length of the buffer</param>
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public AddR32Rm32Handler(byte[] codeBuffer, InstructionDecoder decoder, int length)
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: base(codeBuffer, decoder, length)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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return opcode == 0x03;
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}
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/// <summary>
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/// Decodes an ADD r32, r/m32 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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int position = Decoder.GetPosition();
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if (position >= Length)
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{
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return false;
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}
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// Read the ModR/M byte
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byte modRM = CodeBuffer[position++];
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Decoder.SetPosition(position);
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// Extract the fields from the ModR/M byte
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byte mod = (byte)((modRM & 0xC0) >> 6);
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byte reg = (byte)((modRM & 0x38) >> 3);
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byte rm = (byte)(modRM & 0x07);
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// Set the mnemonic
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instruction.Mnemonic = "add";
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// Get the register name
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string regName = GetRegister32(reg);
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// For memory operands, set the operand
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if (mod != 3) // Memory operand
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{
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string operand = ModRMDecoder.DecodeModRM(mod, rm, false);
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instruction.Operands = $"{regName}, {operand}";
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}
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else // Register operand
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{
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string rmName = GetRegister32(rm);
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instruction.Operands = $"{regName}, {rmName}";
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}
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return true;
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}
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}
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76
X86Disassembler/X86/Handlers/Group5/CallRm32Handler.cs
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76
X86Disassembler/X86/Handlers/Group5/CallRm32Handler.cs
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@ -0,0 +1,76 @@
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namespace X86Disassembler.X86.Handlers.Group5;
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/// <summary>
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/// Handler for CALL r/m32 instruction (0xFF /2)
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/// </summary>
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public class CallRm32Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the CallRm32Handler class
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/// </summary>
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/// <param name="codeBuffer">The buffer containing the code to decode</param>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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/// <param name="length">The length of the buffer</param>
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public CallRm32Handler(byte[] codeBuffer, InstructionDecoder decoder, int length)
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: base(codeBuffer, decoder, length)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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return opcode == 0xFF;
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}
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/// <summary>
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/// Decodes a CALL r/m32 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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int position = Decoder.GetPosition();
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if (position >= Length)
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{
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return false;
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}
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// Read the ModR/M byte
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byte modRM = CodeBuffer[position++];
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Decoder.SetPosition(position);
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// Extract the fields from the ModR/M byte
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byte mod = (byte)((modRM & 0xC0) >> 6);
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byte reg = (byte)((modRM & 0x38) >> 3);
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byte rm = (byte)(modRM & 0x07);
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// CALL r/m32 is encoded as FF /2
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if (reg != 2)
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{
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return false;
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}
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// Set the mnemonic
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instruction.Mnemonic = "call";
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// For memory operands, set the operand
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if (mod != 3) // Memory operand
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{
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string operand = ModRMDecoder.DecodeModRM(mod, rm, false);
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instruction.Operands = operand;
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}
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else // Register operand
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{
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string rmName = GetRegister32(rm);
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instruction.Operands = rmName;
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}
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return true;
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}
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}
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@ -1,9 +1,11 @@
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using X86Disassembler.X86.Handlers.Add;
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using X86Disassembler.X86.Handlers.ArithmeticImmediate;
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using X86Disassembler.X86.Handlers.ArithmeticImmediate;
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using X86Disassembler.X86.Handlers.ArithmeticUnary;
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using X86Disassembler.X86.Handlers.ArithmeticUnary;
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using X86Disassembler.X86.Handlers.Call;
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using X86Disassembler.X86.Handlers.Call;
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using X86Disassembler.X86.Handlers.Cmp;
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using X86Disassembler.X86.Handlers.Cmp;
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using X86Disassembler.X86.Handlers.Dec;
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using X86Disassembler.X86.Handlers.Dec;
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using X86Disassembler.X86.Handlers.FloatingPoint;
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using X86Disassembler.X86.Handlers.FloatingPoint;
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using X86Disassembler.X86.Handlers.Group5;
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using X86Disassembler.X86.Handlers.Jump;
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using X86Disassembler.X86.Handlers.Jump;
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using X86Disassembler.X86.Handlers.Lea;
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using X86Disassembler.X86.Handlers.Lea;
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using X86Disassembler.X86.Handlers.Mov;
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using X86Disassembler.X86.Handlers.Mov;
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// Register Dec handlers
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// Register Dec handlers
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RegisterDecHandlers();
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RegisterDecHandlers();
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// Register Add handlers
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RegisterAddHandlers();
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// Register Group5 handlers
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RegisterGroup5Handlers();
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// Register Data Transfer handlers
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// Register Data Transfer handlers
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RegisterDataTransferHandlers();
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RegisterDataTransferHandlers();
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@ -251,6 +259,24 @@ public class InstructionHandlerFactory
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_handlers.Add(new DecRegHandler(_codeBuffer, _decoder, _length));
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_handlers.Add(new DecRegHandler(_codeBuffer, _decoder, _length));
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}
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}
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/// <summary>
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/// Registers all Add instruction handlers
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/// </summary>
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private void RegisterAddHandlers()
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{
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// Add Add handlers
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_handlers.Add(new AddR32Rm32Handler(_codeBuffer, _decoder, _length));
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}
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/// <summary>
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/// Registers all Group5 instruction handlers
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/// </summary>
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private void RegisterGroup5Handlers()
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{
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// Add Group5 handlers
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_handlers.Add(new CallRm32Handler(_codeBuffer, _decoder, _length));
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}
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/// <summary>
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/// <summary>
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/// Registers all Data Transfer instruction handlers
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/// Registers all Data Transfer instruction handlers
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/// </summary>
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/// </summary>
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@ -72,6 +72,14 @@ public static class OpcodeMap
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OneByteOpcodes[0x4E] = "dec"; // DEC ESI
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OneByteOpcodes[0x4E] = "dec"; // DEC ESI
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OneByteOpcodes[0x4F] = "dec"; // DEC EDI
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OneByteOpcodes[0x4F] = "dec"; // DEC EDI
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// ADD instructions
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OneByteOpcodes[0x00] = "add"; // ADD r/m8, r8
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OneByteOpcodes[0x01] = "add"; // ADD r/m32, r32
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OneByteOpcodes[0x02] = "add"; // ADD r8, r/m8
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OneByteOpcodes[0x03] = "add"; // ADD r32, r/m32
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OneByteOpcodes[0x04] = "add"; // ADD AL, imm8
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OneByteOpcodes[0x05] = "add"; // ADD EAX, imm32
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// Group 1 instructions (ADD, OR, ADC, SBB, AND, SUB, XOR, CMP)
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// Group 1 instructions (ADD, OR, ADC, SBB, AND, SUB, XOR, CMP)
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OneByteOpcodes[0x80] = "group1b";
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OneByteOpcodes[0x80] = "group1b";
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OneByteOpcodes[0x81] = "group1d";
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OneByteOpcodes[0x81] = "group1d";
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@ -81,6 +89,9 @@ public static class OpcodeMap
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OneByteOpcodes[0xF6] = "group3b"; // 8-bit operations
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OneByteOpcodes[0xF6] = "group3b"; // 8-bit operations
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OneByteOpcodes[0xF7] = "group3d"; // 32-bit operations
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OneByteOpcodes[0xF7] = "group3d"; // 32-bit operations
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// Group 5 instructions (INC, DEC, CALL, CALL, JMP, JMP, PUSH)
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OneByteOpcodes[0xFF] = "group5";
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// TEST instructions
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// TEST instructions
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OneByteOpcodes[0x84] = "test"; // TEST r/m8, r8
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OneByteOpcodes[0x84] = "test"; // TEST r/m8, r8
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OneByteOpcodes[0x85] = "test"; // TEST r/m32, r32
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OneByteOpcodes[0x85] = "test"; // TEST r/m32, r32
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49
X86DisassemblerTests/AddInstructionTests.cs
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49
X86DisassemblerTests/AddInstructionTests.cs
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namespace X86DisassemblerTests;
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using System;
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using Xunit;
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using X86Disassembler.X86;
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/// <summary>
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/// Tests for ADD instruction handlers
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/// </summary>
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public class AddInstructionTests
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{
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/// <summary>
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/// Tests the ADD r32, r/m32 instruction (0x03) with register operand
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/// </summary>
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[Fact]
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public void TestAddR32Rm32_Register()
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{
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// Arrange
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byte[] code = { 0x03, 0xF5 }; // ADD ESI, EBP
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// Act
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Disassembler disassembler = new Disassembler(code, 0x1000);
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var instructions = disassembler.Disassemble();
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// Assert
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Assert.Single(instructions);
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Assert.Equal("add", instructions[0].Mnemonic);
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Assert.Equal("esi, ebp", instructions[0].Operands);
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}
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/// <summary>
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/// Tests the ADD r32, m32 instruction (0x03) with memory operand
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/// </summary>
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[Fact]
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public void TestAddR32M32()
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{
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// Arrange
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byte[] code = { 0x03, 0x00 }; // ADD EAX, DWORD PTR [EAX]
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// Act
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Disassembler disassembler = new Disassembler(code, 0x1000);
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var instructions = disassembler.Disassemble();
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// Assert
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Assert.Single(instructions);
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Assert.Equal("add", instructions[0].Mnemonic);
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Assert.Equal("eax, dword ptr [eax]", instructions[0].Operands);
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}
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}
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49
X86DisassemblerTests/CallRm32Tests.cs
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49
X86DisassemblerTests/CallRm32Tests.cs
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namespace X86DisassemblerTests;
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using System;
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using Xunit;
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using X86Disassembler.X86;
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/// <summary>
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/// Tests for CALL r/m32 instruction (0xFF /2)
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/// </summary>
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public class CallRm32Tests
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{
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/// <summary>
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/// Tests the CALL r32 instruction (0xFF /2) with register operand
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/// </summary>
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[Fact]
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public void TestCallReg()
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{
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// Arrange
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byte[] code = { 0xFF, 0xD3 }; // CALL EBX
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// Act
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Disassembler disassembler = new Disassembler(code, 0x1000);
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var instructions = disassembler.Disassemble();
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// Assert
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Assert.Single(instructions);
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Assert.Equal("call", instructions[0].Mnemonic);
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Assert.Equal("ebx", instructions[0].Operands);
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}
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/// <summary>
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/// Tests the CALL m32 instruction (0xFF /2) with memory operand
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/// </summary>
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[Fact]
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public void TestCallMem()
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{
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// Arrange
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byte[] code = { 0xFF, 0x10 }; // CALL DWORD PTR [EAX]
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// Act
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Disassembler disassembler = new Disassembler(code, 0x1000);
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var instructions = disassembler.Disassemble();
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// Assert
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Assert.Single(instructions);
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Assert.Equal("call", instructions[0].Mnemonic);
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Assert.Equal("dword ptr [eax]", instructions[0].Operands);
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}
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}
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