Enhanced test coverage for ADC and ADD instructions

X86DisassemblerTests/TestData/adc_tests.csv

@@ -4,22 +4,55 @@ RawBytes;Instructions
 
 # ADC r/m8, imm8 (opcode 80 /2)
 80D042;[{ "Type": "Adc", "Operands": ["al", "0x42"] }]
+80D342;[{ "Type": "Adc", "Operands": ["bl", "0x42"] }]
+80D142;[{ "Type": "Adc", "Operands": ["cl", "0x42"] }]
+80D242;[{ "Type": "Adc", "Operands": ["dl", "0x42"] }]
+
+# ADC AL, imm8 (opcode 14)
+1442;[{ "Type": "Adc", "Operands": ["al", "0x42"] }]
 
 # ADC r/m32, imm32 (opcode 81 /2)
 81D078563412;[{ "Type": "Adc", "Operands": ["eax", "0x12345678"] }]
+81D378563412;[{ "Type": "Adc", "Operands": ["ebx", "0x12345678"] }]
+81D178563412;[{ "Type": "Adc", "Operands": ["ecx", "0x12345678"] }]
+81D278563412;[{ "Type": "Adc", "Operands": ["edx", "0x12345678"] }]
+
+# ADC EAX, imm32 (opcode 15)
+1578563412;[{ "Type": "Adc", "Operands": ["eax", "0x12345678"] }]
 
 # ADC r/m32, imm8 (opcode 83 /2)
 83D042;[{ "Type": "Adc", "Operands": ["eax", "0x42"] }]
+83D342;[{ "Type": "Adc", "Operands": ["ebx", "0x42"] }]
+83D142;[{ "Type": "Adc", "Operands": ["ecx", "0x42"] }]
+83D242;[{ "Type": "Adc", "Operands": ["edx", "0x42"] }]
 
-# ADC with memory operands
+# ADC r/m8, r8 (opcode 10)
-8114251000000078563412;[{ "Type": "Adc", "Operands": ["dword ptr [0x10]", "0x12345678"] }]
+10C3;[{ "Type": "Adc", "Operands": ["bl", "al"] }]
+10D9;[{ "Type": "Adc", "Operands": ["cl", "bl"] }]
+10E2;[{ "Type": "Adc", "Operands": ["dl", "ah"] }]
+
+# ADC r8, r/m8 (opcode 12)
+12C3;[{ "Type": "Adc", "Operands": ["al", "bl"] }]
+12D9;[{ "Type": "Adc", "Operands": ["bl", "cl"] }]
+12E2;[{ "Type": "Adc", "Operands": ["ah", "dl"] }]
 
 # ADC r/m32, r32 (opcode 11)
 11D8;[{ "Type": "Adc", "Operands": ["eax", "ebx"] }]
 11CA;[{ "Type": "Adc", "Operands": ["edx", "ecx"] }]
+11E5;[{ "Type": "Adc", "Operands": ["ebp", "esp"] }]
 114B10;[{ "Type": "Adc", "Operands": ["dword ptr [ebx+0x10]", "ecx"] }]
 
 # ADC r32, r/m32 (opcode 13)
 13D8;[{ "Type": "Adc", "Operands": ["ebx", "eax"] }]
 13CA;[{ "Type": "Adc", "Operands": ["ecx", "edx"] }]
+13E5;[{ "Type": "Adc", "Operands": ["esp", "ebp"] }]
 134B10;[{ "Type": "Adc", "Operands": ["ecx", "dword ptr [ebx+0x10]"] }]
+
+# ADC with memory operands
+8014251000000042;[{ "Type": "Adc", "Operands": ["byte ptr [0x10]", "0x42"] }]
+8114251000000078563412;[{ "Type": "Adc", "Operands": ["dword ptr [0x10]", "0x12345678"] }]
+8314251000000042;[{ "Type": "Adc", "Operands": ["dword ptr [0x10]", "0x42"] }]
+1004251000000000;[{ "Type": "Adc", "Operands": ["byte ptr [0x10]", "al"] }]
+1204251000000000;[{ "Type": "Adc", "Operands": ["al", "byte ptr [0x10]"] }]
+1104251000000000;[{ "Type": "Adc", "Operands": ["dword ptr [0x10]", "eax"] }]
+1304251000000000;[{ "Type": "Adc", "Operands": ["eax", "dword ptr [0x10]"] }]

X86DisassemblerTests/TestData/add_tests.csv

@@ -4,23 +4,57 @@ RawBytes;Instructions
 
 # ADD r/m8, imm8 (opcode 80 /0)
 80C042;[{ "Type": "Add", "Operands": ["al", "0x42"] }]
+80C342;[{ "Type": "Add", "Operands": ["bl", "0x42"] }]
+80C142;[{ "Type": "Add", "Operands": ["cl", "0x42"] }]
+80C242;[{ "Type": "Add", "Operands": ["dl", "0x42"] }]
+
+# ADD AL, imm8 (opcode 04)
+0442;[{ "Type": "Add", "Operands": ["al", "0x42"] }]
 
 # ADD r/m32, imm32 (opcode 81 /0)
 81C078563412;[{ "Type": "Add", "Operands": ["eax", "0x12345678"] }]
+81C378563412;[{ "Type": "Add", "Operands": ["ebx", "0x12345678"] }]
+81C178563412;[{ "Type": "Add", "Operands": ["ecx", "0x12345678"] }]
+81C278563412;[{ "Type": "Add", "Operands": ["edx", "0x12345678"] }]
+
+# ADD EAX, imm32 (opcode 05)
+0578563412;[{ "Type": "Add", "Operands": ["eax", "0x12345678"] }]
 
 # ADD r/m32, imm8 (opcode 83 /0) with sign extension
 83C042;[{ "Type": "Add", "Operands": ["eax", "0x42"] }]
+83C342;[{ "Type": "Add", "Operands": ["ebx", "0x42"] }]
+83C142;[{ "Type": "Add", "Operands": ["ecx", "0x42"] }]
+83C242;[{ "Type": "Add", "Operands": ["edx", "0x42"] }]
 83C0FF;[{ "Type": "Add", "Operands": ["eax", "0xFFFFFFFF"] }]
+83C3FF;[{ "Type": "Add", "Operands": ["ebx", "0xFFFFFFFF"] }]
 
-# ADD with memory operands
+# ADD r/m8, r8 (opcode 00)
-8104251000000078563412;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "0x12345678"] }]
+00C3;[{ "Type": "Add", "Operands": ["bl", "al"] }]
+00D9;[{ "Type": "Add", "Operands": ["cl", "bl"] }]
+00E2;[{ "Type": "Add", "Operands": ["dl", "ah"] }]
+
+# ADD r8, r/m8 (opcode 02)
+02C3;[{ "Type": "Add", "Operands": ["al", "bl"] }]
+02D9;[{ "Type": "Add", "Operands": ["bl", "cl"] }]
+02E2;[{ "Type": "Add", "Operands": ["ah", "dl"] }]
 
 # ADD r/m32, r32 (opcode 01)
 01D8;[{ "Type": "Add", "Operands": ["eax", "ebx"] }]
 01CA;[{ "Type": "Add", "Operands": ["edx", "ecx"] }]
+01E5;[{ "Type": "Add", "Operands": ["ebp", "esp"] }]
 014B10;[{ "Type": "Add", "Operands": ["dword ptr [ebx+0x10]", "ecx"] }]
 
 # ADD r32, r/m32 (opcode 03)
 03D8;[{ "Type": "Add", "Operands": ["ebx", "eax"] }]
 03CA;[{ "Type": "Add", "Operands": ["ecx", "edx"] }]
+03E5;[{ "Type": "Add", "Operands": ["esp", "ebp"] }]
 034B10;[{ "Type": "Add", "Operands": ["ecx", "dword ptr [ebx+0x10]"] }]
+
+# ADD with memory operands
+8004251000000042;[{ "Type": "Add", "Operands": ["byte ptr [0x10]", "0x42"] }]
+8104251000000078563412;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "0x12345678"] }]
+8304251000000042;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "0x42"] }]
+0004251000000000;[{ "Type": "Add", "Operands": ["byte ptr [0x10]", "al"] }]
+0204251000000000;[{ "Type": "Add", "Operands": ["al", "byte ptr [0x10]"] }]
+0104251000000000;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "eax"] }]
+0304251000000000;[{ "Type": "Add", "Operands": ["eax", "dword ptr [0x10]"] }]