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Unified ADC accumulator handlers into a single handler

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bird_egop
2025-04-17 01:33:58 +03:00
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75
X86DisassemblerTests/TestData/adc_tests.csv
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@ -2,57 +2,26 @@
# Format: RawBytes;Instructions
RawBytes;Instructions
# ADC r/m8, imm8 (opcode 80 /2)
80D042;[{ "Type": "Adc", "Operands": ["al", "0x42"] }]
80D342;[{ "Type": "Adc", "Operands": ["bl", "0x42"] }]
80D142;[{ "Type": "Adc", "Operands": ["cl", "0x42"] }]
80D242;[{ "Type": "Adc", "Operands": ["dl", "0x42"] }]
# ADC AL, imm8 (opcode 14)
1442;[{ "Type": "Adc", "Operands": ["al", "0x42"] }]
# ADC r/m32, imm32 (opcode 81 /2)
81D078563412;[{ "Type": "Adc", "Operands": ["eax", "0x12345678"] }]
81D378563412;[{ "Type": "Adc", "Operands": ["ebx", "0x12345678"] }]
81D178563412;[{ "Type": "Adc", "Operands": ["ecx", "0x12345678"] }]
81D278563412;[{ "Type": "Adc", "Operands": ["edx", "0x12345678"] }]
# ADC EAX, imm32 (opcode 15)
1578563412;[{ "Type": "Adc", "Operands": ["eax", "0x12345678"] }]
# ADC r/m32, imm8 (opcode 83 /2)
83D042;[{ "Type": "Adc", "Operands": ["eax", "0x42"] }]
83D342;[{ "Type": "Adc", "Operands": ["ebx", "0x42"] }]
83D142;[{ "Type": "Adc", "Operands": ["ecx", "0x42"] }]
83D242;[{ "Type": "Adc", "Operands": ["edx", "0x42"] }]
# ADC r/m8, r8 (opcode 10)
10C3;[{ "Type": "Adc", "Operands": ["bl", "al"] }]
10D9;[{ "Type": "Adc", "Operands": ["cl", "bl"] }]
10E2;[{ "Type": "Adc", "Operands": ["dl", "ah"] }]
# ADC r8, r/m8 (opcode 12)
12C3;[{ "Type": "Adc", "Operands": ["al", "bl"] }]
12D9;[{ "Type": "Adc", "Operands": ["bl", "cl"] }]
12E2;[{ "Type": "Adc", "Operands": ["ah", "dl"] }]
# ADC r/m32, r32 (opcode 11)
14AA;[{ "Type": "Adc", "Operands": ["al", "0xAA"] }]
80D1AA;[{ "Type": "Adc", "Operands": ["cl", "0xAA"] }]
8010AA;[{ "Type": "Adc", "Operands": ["byte ptr [eax]", "0xAA"] }]
805310AA;[{ "Type": "Adc", "Operands": ["byte ptr [ebx+0x10]", "0xAA"] }]
10D8;[{ "Type": "Adc", "Operands": ["al", "bl"] }]
1018;[{ "Type": "Adc", "Operands": ["byte ptr [eax]", "bl"] }]
1218;[{ "Type": "Adc", "Operands": ["bl", "byte ptr [eax]"] }]
801488AA;[{ "Type": "Adc", "Operands": ["byte ptr [eax+ecx*4]", "0xAA"] }]
6681D1AA00;[{ "Type": "Adc", "Operands": ["cx", "0xAA"] }]
668110AA00;[{ "Type": "Adc", "Operands": ["word ptr [eax]", "0xAA"] }]
66815310AA00;[{ "Type": "Adc", "Operands": ["word ptr [ebx+0x10]", "0xAA"] }]
6611D8;[{ "Type": "Adc", "Operands": ["ax", "bx"] }]
661118;[{ "Type": "Adc", "Operands": ["word ptr [eax]", "bx"] }]
661318;[{ "Type": "Adc", "Operands": ["bx", "word ptr [eax]"] }]
66811488AA00;[{ "Type": "Adc", "Operands": ["word ptr [eax+ecx*4]", "0xAA"] }]
15AAAA0000;[{ "Type": "Adc", "Operands": ["eax", "0xAAAA"] }]
81D1AAAA0000;[{ "Type": "Adc", "Operands": ["ecx", "0xAAAA"] }]
8110AAAA0000;[{ "Type": "Adc", "Operands": ["dword ptr [eax]", "0xAAAA"] }]
815310AAAA0000;[{ "Type": "Adc", "Operands": ["dword ptr [ebx+0x10]", "0xAAAA"] }]
11D8;[{ "Type": "Adc", "Operands": ["eax", "ebx"] }]
11CA;[{ "Type": "Adc", "Operands": ["edx", "ecx"] }]
11E5;[{ "Type": "Adc", "Operands": ["ebp", "esp"] }]
114B10;[{ "Type": "Adc", "Operands": ["dword ptr [ebx+0x10]", "ecx"] }]
# ADC r32, r/m32 (opcode 13)
13D8;[{ "Type": "Adc", "Operands": ["ebx", "eax"] }]
13CA;[{ "Type": "Adc", "Operands": ["ecx", "edx"] }]
13E5;[{ "Type": "Adc", "Operands": ["esp", "ebp"] }]
134B10;[{ "Type": "Adc", "Operands": ["ecx", "dword ptr [ebx+0x10]"] }]
# ADC with memory operands
8014251000000042;[{ "Type": "Adc", "Operands": ["byte ptr [0x10]", "0x42"] }]
8114251000000078563412;[{ "Type": "Adc", "Operands": ["dword ptr [0x10]", "0x12345678"] }]
8314251000000042;[{ "Type": "Adc", "Operands": ["dword ptr [0x10]", "0x42"] }]
1004251000000000;[{ "Type": "Adc", "Operands": ["byte ptr [0x10]", "al"] }]
1204251000000000;[{ "Type": "Adc", "Operands": ["al", "byte ptr [0x10]"] }]
1104251000000000;[{ "Type": "Adc", "Operands": ["dword ptr [0x10]", "eax"] }]
1304251000000000;[{ "Type": "Adc", "Operands": ["eax", "dword ptr [0x10]"] }]
1118;[{ "Type": "Adc", "Operands": ["dword ptr [eax]", "ebx"] }]
1318;[{ "Type": "Adc", "Operands": ["ebx", "dword ptr [eax]"] }]
811488AAAA0000;[{ "Type": "Adc", "Operands": ["dword ptr [eax+ecx*4]", "0xAAAA"] }]
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X86DisassemblerTests/TestData/add_tests.csv
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# ADD instruction tests
# Format: RawBytes;Instructions
RawBytes;Instructions
# 8-bit ADD
04AA;[{ "Type": "Add", "Operands": ["al", "0xAA"] }]
80C1AA;[{ "Type": "Add", "Operands": ["cl", "0xAA"] }]
8000AA;[{ "Type": "Add", "Operands": ["byte ptr [eax]", "0xAA"] }]
805310AA;[{ "Type": "Add", "Operands": ["byte ptr [ebx+0x10]", "0xAA"] }]
00D8;[{ "Type": "Add", "Operands": ["al", "bl"] }]
0018;[{ "Type": "Add", "Operands": ["byte ptr [eax]", "bl"] }]
0218;[{ "Type": "Add", "Operands": ["bl", "byte ptr [eax]"] }]
800488AA;[{ "Type": "Add", "Operands": ["byte ptr [eax+ecx*4]", "0xAA"] }]
# ADD r/m8, imm8 (opcode 80 /0)
80C042;[{ "Type": "Add", "Operands": ["al", "0x42"] }]
80C342;[{ "Type": "Add", "Operands": ["bl", "0x42"] }]
80C142;[{ "Type": "Add", "Operands": ["cl", "0x42"] }]
80C242;[{ "Type": "Add", "Operands": ["dl", "0x42"] }]
# 16-bit ADD (with 66 prefix)
6605AA00;[{ "Type": "Add", "Operands": ["ax", "0xAA"] }]
6681C1AA00;[{ "Type": "Add", "Operands": ["cx", "0xAA"] }]
668100AA00;[{ "Type": "Add", "Operands": ["word ptr [eax]", "0xAA"] }]
66814310AA00;[{ "Type": "Add", "Operands": ["word ptr [ebx+0x10]", "0xAA"] }]
6601D8;[{ "Type": "Add", "Operands": ["ax", "bx"] }]
660118;[{ "Type": "Add", "Operands": ["word ptr [eax]", "bx"] }]
660318;[{ "Type": "Add", "Operands": ["bx", "word ptr [eax]"] }]
66810488AA00;[{ "Type": "Add", "Operands": ["word ptr [eax+ecx*4]", "0xAA"] }]
# ADD AL, imm8 (opcode 04)
0442;[{ "Type": "Add", "Operands": ["al", "0x42"] }]
# ADD r/m32, imm32 (opcode 81 /0)
81C078563412;[{ "Type": "Add", "Operands": ["eax", "0x12345678"] }]
81C378563412;[{ "Type": "Add", "Operands": ["ebx", "0x12345678"] }]
81C178563412;[{ "Type": "Add", "Operands": ["ecx", "0x12345678"] }]
81C278563412;[{ "Type": "Add", "Operands": ["edx", "0x12345678"] }]
# ADD EAX, imm32 (opcode 05)
0578563412;[{ "Type": "Add", "Operands": ["eax", "0x12345678"] }]
# ADD r/m32, imm8 (opcode 83 /0) with sign extension
83C042;[{ "Type": "Add", "Operands": ["eax", "0x42"] }]
83C342;[{ "Type": "Add", "Operands": ["ebx", "0x42"] }]
83C142;[{ "Type": "Add", "Operands": ["ecx", "0x42"] }]
83C242;[{ "Type": "Add", "Operands": ["edx", "0x42"] }]
83C0FF;[{ "Type": "Add", "Operands": ["eax", "0xFFFFFFFF"] }]
83C3FF;[{ "Type": "Add", "Operands": ["ebx", "0xFFFFFFFF"] }]
# ADD r/m8, r8 (opcode 00)
00C3;[{ "Type": "Add", "Operands": ["bl", "al"] }]
00D9;[{ "Type": "Add", "Operands": ["cl", "bl"] }]
00E2;[{ "Type": "Add", "Operands": ["dl", "ah"] }]
# ADD r8, r/m8 (opcode 02)
02C3;[{ "Type": "Add", "Operands": ["al", "bl"] }]
02D9;[{ "Type": "Add", "Operands": ["bl", "cl"] }]
02E2;[{ "Type": "Add", "Operands": ["ah", "dl"] }]
# ADD r/m32, r32 (opcode 01)
# 32-bit ADD
05AA000000;[{ "Type": "Add", "Operands": ["eax", "0xAA"] }]
81C1AA000000;[{ "Type": "Add", "Operands": ["ecx", "0xAA"] }]
8100AA000000;[{ "Type": "Add", "Operands": ["dword ptr [eax]", "0xAA"] }]
814310AA000000;[{ "Type": "Add", "Operands": ["dword ptr [ebx+0x10]", "0xAA"] }]
01D8;[{ "Type": "Add", "Operands": ["eax", "ebx"] }]
01CA;[{ "Type": "Add", "Operands": ["edx", "ecx"] }]
01E5;[{ "Type": "Add", "Operands": ["ebp", "esp"] }]
014B10;[{ "Type": "Add", "Operands": ["dword ptr [ebx+0x10]", "ecx"] }]
0118;[{ "Type": "Add", "Operands": ["dword ptr [eax]", "ebx"] }]
0318;[{ "Type": "Add", "Operands": ["ebx", "dword ptr [eax]"] }]
810488AA000000;[{ "Type": "Add", "Operands": ["dword ptr [eax+ecx*4]", "0xAA"] }]
# ADD r32, r/m32 (opcode 03)
03D8;[{ "Type": "Add", "Operands": ["ebx", "eax"] }]
03CA;[{ "Type": "Add", "Operands": ["ecx", "edx"] }]
03E5;[{ "Type": "Add", "Operands": ["esp", "ebp"] }]
034B10;[{ "Type": "Add", "Operands": ["ecx", "dword ptr [ebx+0x10]"] }]
# ADD with memory operands
8004251000000042;[{ "Type": "Add", "Operands": ["byte ptr [0x10]", "0x42"] }]
8104251000000078563412;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "0x12345678"] }]
8304251000000042;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "0x42"] }]
00042510000000;[{ "Type": "Add", "Operands": ["byte ptr [0x10]", "al"] }]
02042510000000;[{ "Type": "Add", "Operands": ["al", "byte ptr [0x10]"] }]
01042510000000;[{ "Type": "Add", "Operands": ["dword ptr [0x10]", "eax"] }]
03042510000000;[{ "Type": "Add", "Operands": ["eax", "dword ptr [0x10]"] }]
# Mixed addressing modes
00A314285600;[{ "Type": "Add", "Operands": ["byte ptr [ebx+0x562814]", "ah"] }]
6601B310203040;[{ "Type": "Add", "Operands": ["si", "word ptr [ebx+0x40302010]"] }]
030C8D10203040;[{ "Type": "Add", "Operands": ["ecx", "dword ptr [ebp*4+0x40302010]"] }]
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X86DisassemblerTests/TestData/and_tests.csv
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# AND instruction tests
# Format: RawBytes;Instructions
RawBytes;Instructions
# 8-bit AND
24AA;[{ "Type": "And", "Operands": ["al", "0xAA"] }]
# Alternate encoding
80E0AA;[{ "Type": "And", "Operands": ["al", "0xAA"] }]
80E1AA;[{ "Type": "And", "Operands": ["cl", "0xAA"] }]
8020AA;[{ "Type": "And", "Operands": ["byte ptr [eax]", "0xAA"] }]
806310AA;[{ "Type": "And", "Operands": ["byte ptr [ebx+0x10]", "0xAA"] }]
20D8;[{ "Type": "And", "Operands": ["al", "bl"] }]
2018;[{ "Type": "And", "Operands": ["byte ptr [eax]", "bl"] }]
2218;[{ "Type": "And", "Operands": ["bl", "byte ptr [eax]"] }]
800488AA;[{ "Type": "And", "Operands": ["byte ptr [eax+ecx*4]", "0xAA"] }]
# AND r/m8, imm8 (opcode 80 /4)
80E042;[{ "Type": "And", "Operands": ["al", "0x42"] }]
80E342;[{ "Type": "And", "Operands": ["bl", "0x42"] }]
80E142;[{ "Type": "And", "Operands": ["cl", "0x42"] }]
80E242;[{ "Type": "And", "Operands": ["dl", "0x42"] }]
# 16-bit AND (with 66 prefix)
6625AA00;[{ "Type": "And", "Operands": ["ax", "0xAA"] }]
# Alternate encoding
6681E0AA00;[{ "Type": "And", "Operands": ["ax", "0xAA"] }]
6681E1AA00;[{ "Type": "And", "Operands": ["cx", "0xAA"] }]
668120AA00;[{ "Type": "And", "Operands": ["word ptr [eax]", "0xAA"] }]
66816310AA00;[{ "Type": "And", "Operands": ["word ptr [ebx+0x10]", "0xAA"] }]
6621D8;[{ "Type": "And", "Operands": ["ax", "bx"] }]
662118;[{ "Type": "And", "Operands": ["word ptr [eax]", "bx"] }]
662318;[{ "Type": "And", "Operands": ["bx", "word ptr [eax]"] }]
66810488AA00;[{ "Type": "And", "Operands": ["word ptr [eax+ecx*4]", "0xAA"] }]
# AND AL, imm8 (opcode 24)
2442;[{ "Type": "And", "Operands": ["al", "0x42"] }]
# AND r/m32, imm32 (opcode 81 /4)
81E078563412;[{ "Type": "And", "Operands": ["eax", "0x12345678"] }]
81E378563412;[{ "Type": "And", "Operands": ["ebx", "0x12345678"] }]
81E178563412;[{ "Type": "And", "Operands": ["ecx", "0x12345678"] }]
81E278563412;[{ "Type": "And", "Operands": ["edx", "0x12345678"] }]
# AND EAX, imm32 (opcode 25)
2578563412;[{ "Type": "And", "Operands": ["eax", "0x12345678"] }]
# AND r/m32, imm8 (opcode 83 /4)
83E042;[{ "Type": "And", "Operands": ["eax", "0x42"] }]
83E342;[{ "Type": "And", "Operands": ["ebx", "0x42"] }]
83E142;[{ "Type": "And", "Operands": ["ecx", "0x42"] }]
83E242;[{ "Type": "And", "Operands": ["edx", "0x42"] }]
# AND r/m8, r8 (opcode 20)
20C3;[{ "Type": "And", "Operands": ["bl", "al"] }]
20D9;[{ "Type": "And", "Operands": ["cl", "bl"] }]
20E2;[{ "Type": "And", "Operands": ["dl", "ah"] }]
# AND r8, r/m8 (opcode 22)
22C3;[{ "Type": "And", "Operands": ["al", "bl"] }]
22D9;[{ "Type": "And", "Operands": ["bl", "cl"] }]
22E2;[{ "Type": "And", "Operands": ["ah", "dl"] }]
# AND r/m32, r32 (opcode 21)
# 32-bit AND
25AA000000;[{ "Type": "And", "Operands": ["eax", "0xAA"] }]
# Alternate encoding
81E0AA000000;[{ "Type": "And", "Operands": ["eax", "0xAA"] }]
81E1AA000000;[{ "Type": "And", "Operands": ["ecx", "0xAA"] }]
8120AA000000;[{ "Type": "And", "Operands": ["dword ptr [eax]", "0xAA"] }]
816310AA000000;[{ "Type": "And", "Operands": ["dword ptr [ebx+0x10]", "0xAA"] }]
21D8;[{ "Type": "And", "Operands": ["eax", "ebx"] }]
21CA;[{ "Type": "And", "Operands": ["edx", "ecx"] }]
21E5;[{ "Type": "And", "Operands": ["ebp", "esp"] }]
214B10;[{ "Type": "And", "Operands": ["dword ptr [ebx+0x10]", "ecx"] }]
2118;[{ "Type": "And", "Operands": ["dword ptr [eax]", "ebx"] }]
2318;[{ "Type": "And", "Operands": ["ebx", "dword ptr [eax]"] }]
810488AA000000;[{ "Type": "And", "Operands": ["dword ptr [eax+ecx*4]", "0xAA"] }]
# AND r32, r/m32 (opcode 23)
23D8;[{ "Type": "And", "Operands": ["ebx", "eax"] }]
23CA;[{ "Type": "And", "Operands": ["ecx", "edx"] }]
23E5;[{ "Type": "And", "Operands": ["esp", "ebp"] }]
234B10;[{ "Type": "And", "Operands": ["ecx", "dword ptr [ebx+0x10]"] }]
# AND with memory operands
8024251000000042;[{ "Type": "And", "Operands": ["byte ptr [0x10]", "0x42"] }]
8124251000000078563412;[{ "Type": "And", "Operands": ["dword ptr [0x10]", "0x12345678"] }]
8324251000000042;[{ "Type": "And", "Operands": ["dword ptr [0x10]", "0x42"] }]
20042510000000;[{ "Type": "And", "Operands": ["byte ptr [0x10]", "al"] }]
22042510000000;[{ "Type": "And", "Operands": ["al", "byte ptr [0x10]"] }]
21042510000000;[{ "Type": "And", "Operands": ["dword ptr [0x10]", "eax"] }]
23042510000000;[{ "Type": "And", "Operands": ["eax", "dword ptr [0x10]"] }]
# Complex addressing modes
20A314285600;[{ "Type": "And", "Operands": ["byte ptr [ebx+0x562814]", "ah"] }]
6621B310203040;[{ "Type": "And", "Operands": ["word ptr [ebx+0x40302010]", "si"] }]
230C8D10203040;[{ "Type": "And", "Operands": ["ecx", "dword ptr [ebp*4+0x40302010]"] }]
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X86DisassemblerTests/TestData/bit_tests.csv
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# Format: RawBytes;Instructions
RawBytes;Instructions
# BT - Bit Test (Immediate)
0FBA2005;[{ "Type": "Bt", "Operands": ["dword ptr [eax]", "0x05"] }]
0FBA650005;[{ "Type": "Bt", "Operands": ["dword ptr [ebp+0x00]", "0x05"] }]
0FBA2305;[{ "Type": "Bt", "Operands": ["dword ptr [ebx]", "0x05"] }]
0FBA2105;[{ "Type": "Bt", "Operands": ["dword ptr [ecx]", "0x05"] }]
0FBA2205;[{ "Type": "Bt", "Operands": ["dword ptr [edx]", "0x05"] }]
# BTS - Bit Test and Set (Immediate)
0FBAA805;[{ "Type": "Bts", "Operands": ["dword ptr [eax]", "0x05"] }]
0FBA6D0005;[{ "Type": "Bts", "Operands": ["dword ptr [ebp+0x00]", "0x05"] }]
0FBAAB05;[{ "Type": "Bts", "Operands": ["dword ptr [ebx]", "0x05"] }]
0FBAA905;[{ "Type": "Bts", "Operands": ["dword ptr [ecx]", "0x05"] }]
0FBAAA05;[{ "Type": "Bts", "Operands": ["dword ptr [edx]", "0x05"] }]
# BTR - Bit Test and Reset (Immediate)
0FBAB005;[{ "Type": "Btr", "Operands": ["dword ptr [eax]", "0x05"] }]
0FBA750005;[{ "Type": "Btr", "Operands": ["dword ptr [ebp+0x00]", "0x05"] }]
0FBAB305;[{ "Type": "Btr", "Operands": ["dword ptr [ebx]", "0x05"] }]
0FBAB105;[{ "Type": "Btr", "Operands": ["dword ptr [ecx]", "0x05"] }]
0FBAB205;[{ "Type": "Btr", "Operands": ["dword ptr [edx]", "0x05"] }]
# BTC - Bit Test and Complement (Immediate)
0FBAB805;[{ "Type": "Btc", "Operands": ["dword ptr [eax]", "0x05"] }]
0FBA7D0005;[{ "Type": "Btc", "Operands": ["dword ptr [ebp+0x00]", "0x05"] }]
0FBABB05;[{ "Type": "Btc", "Operands": ["dword ptr [ebx]", "0x05"] }]
0FBAB905;[{ "Type": "Btc", "Operands": ["dword ptr [ecx]", "0x05"] }]
0FBABA05;[{ "Type": "Btc", "Operands": ["dword ptr [edx]", "0x05"] }]
# BT - Bit Test
0FA3C1;[{ "Type": "Bt", "Operands": ["ecx", "eax"] }]
0FA3D9;[{ "Type": "Bt", "Operands": ["ecx", "ebx"] }]
0FA3CA;[{ "Type": "Bt", "Operands": ["edx", "ecx"] }]
0FA3E2;[{ "Type": "Bt", "Operands": ["edx", "esp"] }]
0FA3F6;[{ "Type": "Bt", "Operands": ["esi", "esi"] }]
0FA30425;[{ "Type": "Bt", "Operands": ["dword ptr [eax]", "eax"] }]
0FA30C25;[{ "Type": "Bt", "Operands": ["dword ptr [eax]", "ecx"] }]
0FA31425;[{ "Type": "Bt", "Operands": ["dword ptr [eax]", "edx"] }]
0FBA2005;[{ "Type": "Bt", "Operands": ["dword ptr [eax]", "0x05"] }]
0FBA2505;[{ "Type": "Bt", "Operands": ["dword ptr [ebp]", "0x05"] }]
0FBA2305;[{ "Type": "Bt", "Operands": ["dword ptr [ebx]", "0x05"] }]
0FBA2105;[{ "Type": "Bt", "Operands": ["dword ptr [ecx]", "0x05"] }]
0FBA2205;[{ "Type": "Bt", "Operands": ["dword ptr [edx]", "0x05"] }]
# BTS - Bit Test and Set
0FABC1;[{ "Type": "Bts", "Operands": ["ecx", "eax"] }]
@ -23,14 +43,6 @@ RawBytes;Instructions
0FABCA;[{ "Type": "Bts", "Operands": ["edx", "ecx"] }]
0FABE2;[{ "Type": "Bts", "Operands": ["edx", "esp"] }]
0FABF6;[{ "Type": "Bts", "Operands": ["esi", "esi"] }]
0FAB0425;[{ "Type": "Bts", "Operands": ["dword ptr [eax]", "eax"] }]
0FAB0C25;[{ "Type": "Bts", "Operands": ["dword ptr [eax]", "ecx"] }]
0FAB1425;[{ "Type": "Bts", "Operands": ["dword ptr [eax]", "edx"] }]
0FBA2805;[{ "Type": "Bts", "Operands": ["dword ptr [eax]", "0x05"] }]
0FBA2D05;[{ "Type": "Bts", "Operands": ["dword ptr [ebp]", "0x05"] }]
0FBA2B05;[{ "Type": "Bts", "Operands": ["dword ptr [ebx]", "0x05"] }]
0FBA2905;[{ "Type": "Bts", "Operands": ["dword ptr [ecx]", "0x05"] }]
0FBA2A05;[{ "Type": "Bts", "Operands": ["dword ptr [edx]", "0x05"] }]
# BTR - Bit Test and Reset
0FB3C1;[{ "Type": "Btr", "Operands": ["ecx", "eax"] }]
@ -38,29 +50,6 @@ RawBytes;Instructions
0FB3CA;[{ "Type": "Btr", "Operands": ["edx", "ecx"] }]
0FB3E2;[{ "Type": "Btr", "Operands": ["edx", "esp"] }]
0FB3F6;[{ "Type": "Btr", "Operands": ["esi", "esi"] }]
0FB30425;[{ "Type": "Btr", "Operands": ["dword ptr [eax]", "eax"] }]
0FB30C25;[{ "Type": "Btr", "Operands": ["dword ptr [eax]", "ecx"] }]
0FB31425;[{ "Type": "Btr", "Operands": ["dword ptr [eax]", "edx"] }]
0FBA3005;[{ "Type": "Btr", "Operands": ["dword ptr [eax]", "0x05"] }]
0FBA3505;[{ "Type": "Btr", "Operands": ["dword ptr [ebp]", "0x05"] }]
0FBA3305;[{ "Type": "Btr", "Operands": ["dword ptr [ebx]", "0x05"] }]
0FBA3105;[{ "Type": "Btr", "Operands": ["dword ptr [ecx]", "0x05"] }]
0FBA3205;[{ "Type": "Btr", "Operands": ["dword ptr [edx]", "0x05"] }]
# BTC - Bit Test and Complement
0FBBC1;[{ "Type": "Btc", "Operands": ["ecx", "eax"] }]
0FBBD9;[{ "Type": "Btc", "Operands": ["ecx", "ebx"] }]
0FBBCA;[{ "Type": "Btc", "Operands": ["edx", "ecx"] }]
0FBBE2;[{ "Type": "Btc", "Operands": ["edx", "esp"] }]
0FBBF6;[{ "Type": "Btc", "Operands": ["esi", "esi"] }]
0FBB0425;[{ "Type": "Btc", "Operands": ["dword ptr [eax]", "eax"] }]
0FBB0C25;[{ "Type": "Btc", "Operands": ["dword ptr [eax]", "ecx"] }]
0FBB1425;[{ "Type": "Btc", "Operands": ["dword ptr [eax]", "edx"] }]
0FBA3805;[{ "Type": "Btc", "Operands": ["dword ptr [eax]", "0x05"] }]
0FBA3D05;[{ "Type": "Btc", "Operands": ["dword ptr [ebp]", "0x05"] }]
0FBA3B05;[{ "Type": "Btc", "Operands": ["dword ptr [ebx]", "0x05"] }]
0FBA3905;[{ "Type": "Btc", "Operands": ["dword ptr [ecx]", "0x05"] }]
0FBA3A05;[{ "Type": "Btc", "Operands": ["dword ptr [edx]", "0x05"] }]
# BSF - Bit Scan Forward
0FBCC1;[{ "Type": "Bsf", "Operands": ["eax", "ecx"] }]
@ -68,11 +57,20 @@ RawBytes;Instructions
0FBCCA;[{ "Type": "Bsf", "Operands": ["ecx", "edx"] }]
0FBCE2;[{ "Type": "Bsf", "Operands": ["esp", "edx"] }]
0FBCF6;[{ "Type": "Bsf", "Operands": ["esi", "esi"] }]
0FBC0425;[{ "Type": "Bsf", "Operands": ["eax", "dword ptr [eax]"] }]
0FBC0C25;[{ "Type": "Bsf", "Operands": ["ecx", "dword ptr [eax]"] }]
0FBC1425;[{ "Type": "Bsf", "Operands": ["edx", "dword ptr [eax]"] }]
0FBC1C25;[{ "Type": "Bsf", "Operands": ["ebx", "dword ptr [eax]"] }]
0FBC2425;[{ "Type": "Bsf", "Operands": ["esp", "dword ptr [eax]"] }]
# BTC - Bit Test and Complement
0FBBC1;[{ "Type": "Btc", "Operands": ["ecx", "eax"] }]
0FBBD9;[{ "Type": "Btc", "Operands": ["ecx", "ebx"] }]
0FBBCA;[{ "Type": "Btc", "Operands": ["edx", "ecx"] }]
0FBBE2;[{ "Type": "Btc", "Operands": ["edx", "esp"] }]
0FBBF6;[{ "Type": "Btc", "Operands": ["esi", "esi"] }]
# BSF - Bit Scan Forward
0FBC00;[{ "Type": "Bsf", "Operands": ["eax", "dword ptr [eax]"] }]
0FBC08;[{ "Type": "Bsf", "Operands": ["ecx", "dword ptr [eax]"] }]
0FBC10;[{ "Type": "Bsf", "Operands": ["edx", "dword ptr [eax]"] }]
0FBC18;[{ "Type": "Bsf", "Operands": ["ebx", "dword ptr [eax]"] }]
0FBC20;[{ "Type": "Bsf", "Operands": ["esp", "dword ptr [eax]"] }]
# BSR - Bit Scan Reverse
0FBDC1;[{ "Type": "Bsr", "Operands": ["eax", "ecx"] }]
@ -80,8 +78,8 @@ RawBytes;Instructions
0FBDCA;[{ "Type": "Bsr", "Operands": ["ecx", "edx"] }]
0FBDE2;[{ "Type": "Bsr", "Operands": ["esp", "edx"] }]
0FBDF6;[{ "Type": "Bsr", "Operands": ["esi", "esi"] }]
0FBD0425;[{ "Type": "Bsr", "Operands": ["eax", "dword ptr [eax]"] }]
0FBD0C25;[{ "Type": "Bsr", "Operands": ["ecx", "dword ptr [eax]"] }]
0FBD1425;[{ "Type": "Bsr", "Operands": ["edx", "dword ptr [eax]"] }]
0FBD1C25;[{ "Type": "Bsr", "Operands": ["ebx", "dword ptr [eax]"] }]
0FBD2425;[{ "Type": "Bsr", "Operands": ["esp", "dword ptr [eax]"] }]
0FBD00;[{ "Type": "Bsr", "Operands": ["eax", "dword ptr [eax]"] }]
0FBD08;[{ "Type": "Bsr", "Operands": ["ecx", "dword ptr [eax]"] }]
0FBD10;[{ "Type": "Bsr", "Operands": ["edx", "dword ptr [eax]"] }]
0FBD18;[{ "Type": "Bsr", "Operands": ["ebx", "dword ptr [eax]"] }]
0FBD20;[{ "Type": "Bsr", "Operands": ["esp", "dword ptr [eax]"] }]

Can't render this file because it contains an unexpected character in line 6 and column 11.

44
X86DisassemblerTests/TestData/div_tests.csv
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@ -22,46 +22,23 @@ F7F5;[{ "Type": "Div", "Operands": ["ebp"] }]
F7F6;[{ "Type": "Div", "Operands": ["esi"] }]
F7F7;[{ "Type": "Div", "Operands": ["edi"] }]
# DIV with memory operands
# Basic memory addressing
# SPECIAL CASE: When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement
# The correct encoding for "DIV byte ptr [eax]" would be F630 (with Mod=00, R/M=0 for EAX)
# F63425;[{ "Type": "Div", "Operands": ["byte ptr [eax]"] }]
F630;[{ "Type": "Div", "Operands": ["byte ptr [eax]"] }]
# For "DIV byte ptr [ebp]", we need to use Mod=01 with a zero displacement since [ebp] can't be encoded with Mod=00
# F63C25;[{ "Type": "Div", "Operands": ["byte ptr [ebp]"] }]
F66500;[{ "Type": "Div", "Operands": ["byte ptr [ebp]"] }]
# The correct encoding for "DIV byte ptr [eax]" would be F630 (with Mod=00, R/M=0 for EAX)
# F63825;[{ "Type": "Div", "Operands": ["byte ptr [eax]"] }]
F630;[{ "Type": "Div", "Operands": ["byte ptr [eax]"] }]
# The correct encoding for "DIV dword ptr [eax]" would be F730 (with Mod=00, R/M=0 for EAX)
# F73425;[{ "Type": "Div", "Operands": ["dword ptr [eax]"] }]
F730;[{ "Type": "Div", "Operands": ["dword ptr [eax]"] }]
# For "DIV dword ptr [ebp]", we need to use Mod=01 with a zero displacement since [ebp] can't be encoded with Mod=00
# F73C25;[{ "Type": "Div", "Operands": ["dword ptr [ebp]"] }]
F76500;[{ "Type": "Div", "Operands": ["dword ptr [ebp]"] }]
F77500;[{ "Type": "Div", "Operands": ["dword ptr [ebp+0x00]"] }]
# The correct encoding for "DIV dword ptr [eax]" would be F730 (with Mod=00, R/M=0 for EAX)
# F73825;[{ "Type": "Div", "Operands": ["dword ptr [eax]"] }]
F730;[{ "Type": "Div", "Operands": ["dword ptr [eax]"] }]
# With displacement
# The correct encoding for "DIV dword ptr [eax+0x10]" would be F74010 (with Mod=01, R/M=0 for EAX, disp8=0x10)
# F7742510000000;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x10]"] }]
F74010;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x10]"] }]
F77010;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x10]"] }]
# The correct encoding for "DIV dword ptr [eax+0x20]" would be F74020 (with Mod=01, R/M=0 for EAX, disp8=0x20)
# F7742520000000;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x20]"] }]
F74020;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x20]"] }]
F77020;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x20]"] }]
# The correct encoding for "DIV dword ptr [eax+0x30]" would be F74030 (with Mod=01, R/M=0 for EAX, disp8=0x30)
# F7742530000000;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x30]"] }]
F74030;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x30]"] }]
F77030;[{ "Type": "Div", "Operands": ["dword ptr [eax+0x30]"] }]
# With SIB addressing
F7341C;[{ "Type": "Div", "Operands": ["dword ptr [esp+ebx*1]"] }]
@ -70,10 +47,9 @@ F7349C;[{ "Type": "Div", "Operands": ["dword ptr [esp+ebx*4]"] }]
F734DC;[{ "Type": "Div", "Operands": ["dword ptr [esp+ebx*8]"] }]
# With segment override prefixes
# not recognized by ghidra or online disasms
# 26F73425;[{ "Type": "Div", "Operands": ["dword ptr es:[eax]"] }]
# 2EF73425;[{ "Type": "Div", "Operands": ["dword ptr cs:[eax]"] }]
# 36F73425;[{ "Type": "Div", "Operands": ["dword ptr ss:[eax]"] }]
# 3EF73425;[{ "Type": "Div", "Operands": ["dword ptr ds:[eax]"] }]
# 64F73425;[{ "Type": "Div", "Operands": ["dword ptr fs:[eax]"] }]
# 65F73425;[{ "Type": "Div", "Operands": ["dword ptr gs:[eax]"] }]
26F730;[{ "Type": "Div", "Operands": ["dword ptr es:[eax]"] }]
2EF730;[{ "Type": "Div", "Operands": ["dword ptr cs:[eax]"] }]
36F730;[{ "Type": "Div", "Operands": ["dword ptr ss:[eax]"] }]
3EF730;[{ "Type": "Div", "Operands": ["dword ptr ds:[eax]"] }]
64F730;[{ "Type": "Div", "Operands": ["dword ptr fs:[eax]"] }]
65F730;[{ "Type": "Div", "Operands": ["dword ptr gs:[eax]"] }]

Can't render this file because it contains an unexpected character in line 6 and column 9.

6
X86DisassemblerTests/TestData/poprm_tests.csv
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@ -7,8 +7,8 @@ RawBytes;Instructions
8F01;[{ "Type": "Pop", "Operands": ["dword ptr [ecx]"] }]
8F02;[{ "Type": "Pop", "Operands": ["dword ptr [edx]"] }]
8F03;[{ "Type": "Pop", "Operands": ["dword ptr [ebx]"] }]
8F04;[{ "Type": "Pop", "Operands": ["dword ptr [esp]"] }]
8F05;[{ "Type": "Pop", "Operands": ["dword ptr [ebp]"] }]
8F0424;[{ "Type": "Pop", "Operands": ["dword ptr [esp]"] }]
88F4500;[{ "Type": "Pop", "Operands": ["dword ptr [ebp]"] }]
8F06;[{ "Type": "Pop", "Operands": ["dword ptr [esi]"] }]
8F07;[{ "Type": "Pop", "Operands": ["dword ptr [edi]"] }]
@ -17,7 +17,7 @@ RawBytes;Instructions
8F4110;[{ "Type": "Pop", "Operands": ["dword ptr [ecx+0x10]"] }]
8F4210;[{ "Type": "Pop", "Operands": ["dword ptr [edx+0x10]"] }]
8F4310;[{ "Type": "Pop", "Operands": ["dword ptr [ebx+0x10]"] }]
8F4410;[{ "Type": "Pop", "Operands": ["dword ptr [esp+0x10]"] }]
8F442410;[{ "Type": "Pop", "Operands": ["dword ptr [esp+0x10]"] }]
8F4510;[{ "Type": "Pop", "Operands": ["dword ptr [ebp+0x10]"] }]
8F4610;[{ "Type": "Pop", "Operands": ["dword ptr [esi+0x10]"] }]
8F4710;[{ "Type": "Pop", "Operands": ["dword ptr [edi+0x10]"] }]

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4
X86DisassemblerTests/TestData/pushimm_tests.csv
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@ -11,9 +11,9 @@ RawBytes;Instructions
6AFF;[{ "Type": "Push", "Operands": ["0xFF"] }]
# PUSH imm32 with various values
6800000000;[{ "Type": "Push", "Operands": ["0x00000000"] }]
6800000000;[{ "Type": "Push", "Operands": ["0x00"] }]
68FFFFFFFF;[{ "Type": "Push", "Operands": ["0xFFFFFFFF"] }]
6801000000;[{ "Type": "Push", "Operands": ["0x00000001"] }]
6801000000;[{ "Type": "Push", "Operands": ["0x01"] }]
# PUSH imm16 with operand size prefix
66687856;[{ "Type": "Push", "Operands": ["0x5678"] }]

Can't render this file because it contains an unexpected character in line 6 and column 15.

14
X86DisassemblerTests/TestData/pushrm_tests.csv
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@ -7,8 +7,8 @@ FF30;[{ "Type": "Push", "Operands": ["dword ptr [eax]"] }]
FF31;[{ "Type": "Push", "Operands": ["dword ptr [ecx]"] }]
FF32;[{ "Type": "Push", "Operands": ["dword ptr [edx]"] }]
FF33;[{ "Type": "Push", "Operands": ["dword ptr [ebx]"] }]
FF34;[{ "Type": "Push", "Operands": ["dword ptr [esp]"] }]
FF35;[{ "Type": "Push", "Operands": ["dword ptr [ebp]"] }]
FF3424;[{ "Type": "Push", "Operands": ["dword ptr [esp]"] }]
FF7500;[{ "Type": "Push", "Operands": ["dword ptr [ebp]"] }]
FF36;[{ "Type": "Push", "Operands": ["dword ptr [esi]"] }]
FF37;[{ "Type": "Push", "Operands": ["dword ptr [edi]"] }]
@ -17,16 +17,16 @@ FF7010;[{ "Type": "Push", "Operands": ["dword ptr [eax+0x10]"] }]
FF7110;[{ "Type": "Push", "Operands": ["dword ptr [ecx+0x10]"] }]
FF7210;[{ "Type": "Push", "Operands": ["dword ptr [edx+0x10]"] }]
FF7310;[{ "Type": "Push", "Operands": ["dword ptr [ebx+0x10]"] }]
FF7410;[{ "Type": "Push", "Operands": ["dword ptr [esp+0x10]"] }]
FF742410;[{ "Type": "Push", "Operands": ["dword ptr [esp+0x10]"] }]
FF7510;[{ "Type": "Push", "Operands": ["dword ptr [ebp+0x10]"] }]
FF7610;[{ "Type": "Push", "Operands": ["dword ptr [esi+0x10]"] }]
FF7710;[{ "Type": "Push", "Operands": ["dword ptr [edi+0x10]"] }]
# PUSH r/m32 (opcode FF /6) with SIB byte
FF34C5;[{ "Type": "Push", "Operands": ["dword ptr [ebp+eax*8]"] }]
FF34CD;[{ "Type": "Push", "Operands": ["dword ptr [ebp+ecx*8]"] }]
FF34D5;[{ "Type": "Push", "Operands": ["dword ptr [ebp+edx*8]"] }]
FF34DD;[{ "Type": "Push", "Operands": ["dword ptr [ebp+ebx*8]"] }]
FF74C500;[{ "Type": "Push", "Operands": ["dword ptr [ebp+eax*8]"] }]
FF74CD00;[{ "Type": "Push", "Operands": ["dword ptr [ebp+ecx*8]"] }]
FF74D500;[{ "Type": "Push", "Operands": ["dword ptr [ebp+edx*8]"] }]
FF74DD00;[{ "Type": "Push", "Operands": ["dword ptr [ebp+ebx*8]"] }]
# PUSH r/m32 (opcode FF /6) with direct memory operand
FF3578563412;[{ "Type": "Push", "Operands": ["dword ptr [0x12345678]"] }]

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14
X86DisassemblerTests/TestData/sub_tests.csv
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@ -39,19 +39,19 @@ RawBytes;Instructions
# 16-bit register operations with operand size prefix (0x66)
# SUB r/m16, r16 (opcode 29 with 0x66 prefix)
6629D8;[{ "Type": "Sub", "Operands": ["eax", "ebx"] }]
6629D8;[{ "Type": "Sub", "Operands": ["ax", "bx"] }]
# SUB r16, r/m16 (opcode 2B with 0x66 prefix)
662BD8;[{ "Type": "Sub", "Operands": ["ebx", "eax"] }]
662BD8;[{ "Type": "Sub", "Operands": ["bx", "ax"] }]
# SUB AX, imm16 (opcode 2D with 0x66 prefix)
662D3412;[{ "Type": "Sub", "Operands": ["eax", "0x1234"] }]
662D3412;[{ "Type": "Sub", "Operands": ["ax", "0x1234"] }]
# SUB r/m16, imm8 (opcode 83 /5 with 0x66 prefix and sign extension)
6683EB42;[{ "Type": "Sub", "Operands": ["ebx", "0x42"] }]
6683EB42;[{ "Type": "Sub", "Operands": ["bx", "0x42"] }]
# SUB r/m16, imm16 (opcode 81 /5 with 0x66 prefix)
6681EB3412;[{ "Type": "Sub", "Operands": ["ebx", "0x1234"] }]
6681EB3412;[{ "Type": "Sub", "Operands": ["bx", "0x1234"] }]
# Additional test cases for more complex addressing modes
@ -101,7 +101,7 @@ RawBytes;Instructions
81EF78563412;[{ "Type": "Sub", "Operands": ["edi", "0x12345678"] }]
# SUB r/m32, imm32 (opcode 81 /5) with memory operands
818D10000000FFFFFFFF;[{ "Type": "Sub", "Operands": ["dword ptr [ebp+0x10]", "0xFFFFFFFF"] }]
81AD10000000FFFFFFFF;[{ "Type": "Sub", "Operands": ["dword ptr [ebp+0x10]", "0xFFFFFFFF"] }]
# Additional tests for SubImmFromRm32SignExtendedHandler
# SUB r/m32, imm8 (opcode 83 /5) with sign extension
@ -114,4 +114,4 @@ RawBytes;Instructions
83EFFF;[{ "Type": "Sub", "Operands": ["edi", "0xFFFFFFFF"] }]
# SUB r/m32, imm8 (opcode 83 /5) with memory operands and sign extension
838D1000000080;[{ "Type": "Sub", "Operands": ["dword ptr [ebp+0x10]", "0xFFFFFF80"] }]
83AD1000000080;[{ "Type": "Sub", "Operands": ["dword ptr [ebp+0x10]", "0xFFFFFF80"] }]

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6
X86DisassemblerTests/TestData/test_tests.csv
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@ -19,6 +19,6 @@ F7C378563412;[{ "Type": "Test", "Operands": ["ebx", "0x12345678"] }]
85D9;[{ "Type": "Test", "Operands": ["ecx", "ebx"] }]
# TEST with memory operands
F6042542;[{ "Type": "Test", "Operands": ["byte ptr [eax]", "0x42"] }]
F7042578563412;[{ "Type": "Test", "Operands": ["dword ptr [eax]", "0x12345678"] }]
85042510;[{ "Type": "Test", "Operands": ["dword ptr [eax+0x10]", "eax"] }]
F60042;[{ "Type": "Test", "Operands": ["byte ptr [eax]", "0x42"] }]
F70078563412;[{ "Type": "Test", "Operands": ["dword ptr [eax]", "0x12345678"] }]
854510;[{ "Type": "Test", "Operands": ["dword ptr [eax+0x10]", "eax"] }]

Can't render this file because it contains an unexpected character in line 6 and column 11.