diff --git a/X86Disassembler/X86/Handlers/Add/AddAlImmHandler.cs b/X86Disassembler/X86/Handlers/Add/AddAlImmHandler.cs new file mode 100644 index 0000000..410422f --- /dev/null +++ b/X86Disassembler/X86/Handlers/Add/AddAlImmHandler.cs @@ -0,0 +1,65 @@ +using X86Disassembler.X86.Operands; + +namespace X86Disassembler.X86.Handlers.Add; + +/// +/// Handler for ADD AL, imm8 instruction (opcode 04) +/// +public class AddAlImmHandler : InstructionHandler +{ + /// + /// Initializes a new instance of the AddAlImmHandler class + /// + /// The instruction decoder that owns this handler + public AddAlImmHandler(InstructionDecoder decoder) + : base(decoder) + { + } + + /// + /// Checks if this handler can decode the given opcode + /// + /// The opcode to check + /// True if this handler can decode the opcode + public override bool CanHandle(byte opcode) + { + // ADD AL, imm8 is encoded as 04 ib + return opcode == 0x04; + } + + /// + /// Decodes an ADD AL, imm8 instruction + /// + /// The opcode of the instruction + /// The instruction object to populate + /// True if the instruction was successfully decoded + public override bool Decode(byte opcode, Instruction instruction) + { + // Set the instruction type + instruction.Type = InstructionType.Add; + + // Check if we have enough bytes for the immediate value + if (!Decoder.CanReadByte()) + { + return false; + } + + // Read the immediate value + byte imm8 = Decoder.ReadByte(); + + // Create the destination register operand (AL) + var destinationOperand = OperandFactory.CreateRegisterOperand(RegisterIndex.A, 8); + + // Create the source immediate operand + var sourceOperand = OperandFactory.CreateImmediateOperand(imm8); + + // Set the structured operands + instruction.StructuredOperands = + [ + destinationOperand, + sourceOperand + ]; + + return true; + } +} diff --git a/X86Disassembler/X86/Handlers/Add/AddR8Rm8Handler.cs b/X86Disassembler/X86/Handlers/Add/AddR8Rm8Handler.cs new file mode 100644 index 0000000..b09233c --- /dev/null +++ b/X86Disassembler/X86/Handlers/Add/AddR8Rm8Handler.cs @@ -0,0 +1,65 @@ +using X86Disassembler.X86.Operands; + +namespace X86Disassembler.X86.Handlers.Add; + +/// +/// Handler for ADD r8, r/m8 instruction (opcode 02) +/// +public class AddR8Rm8Handler : InstructionHandler +{ + /// + /// Initializes a new instance of the AddR8Rm8Handler class + /// + /// The instruction decoder that owns this handler + public AddR8Rm8Handler(InstructionDecoder decoder) + : base(decoder) + { + } + + /// + /// Checks if this handler can decode the given opcode + /// + /// The opcode to check + /// True if this handler can decode the opcode + public override bool CanHandle(byte opcode) + { + // ADD r8, r/m8 is encoded as 02 /r + return opcode == 0x02; + } + + /// + /// Decodes an ADD r8, r/m8 instruction + /// + /// The opcode of the instruction + /// The instruction object to populate + /// True if the instruction was successfully decoded + public override bool Decode(byte opcode, Instruction instruction) + { + // Set the instruction type + instruction.Type = InstructionType.Add; + + // Check if we have enough bytes for the ModR/M byte + if (!Decoder.CanReadByte()) + { + return false; + } + + // Read the ModR/M byte + // For ADD r8, r/m8 (02 /r): + // - The reg field specifies the destination register + // - The r/m field with mod specifies the source operand (register or memory) + var (_, reg, _, sourceOperand) = ModRMDecoder.ReadModRM8(); + + // Create the destination register operand + var destinationOperand = OperandFactory.CreateRegisterOperand(reg, 8); + + // Set the structured operands + instruction.StructuredOperands = + [ + destinationOperand, + sourceOperand + ]; + + return true; + } +} diff --git a/X86Disassembler/X86/Handlers/Add/AddRm8R8Handler.cs b/X86Disassembler/X86/Handlers/Add/AddRm8R8Handler.cs new file mode 100644 index 0000000..b7d17ed --- /dev/null +++ b/X86Disassembler/X86/Handlers/Add/AddRm8R8Handler.cs @@ -0,0 +1,66 @@ +using X86Disassembler.X86.Operands; + +namespace X86Disassembler.X86.Handlers.Add; + +/// +/// Handler for ADD r/m8, r8 instruction (opcode 00) +/// +public class AddRm8R8Handler : InstructionHandler +{ + /// + /// Initializes a new instance of the AddRm8R8Handler class + /// + /// The instruction decoder that owns this handler + public AddRm8R8Handler(InstructionDecoder decoder) + : base(decoder) + { + } + + /// + /// Checks if this handler can decode the given opcode + /// + /// The opcode to check + /// True if this handler can decode the opcode + public override bool CanHandle(byte opcode) + { + // ADD r/m8, r8 is encoded as 00 /r + return opcode == 0x00; + } + + /// + /// Decodes an ADD r/m8, r8 instruction + /// + /// The opcode of the instruction + /// The instruction object to populate + /// True if the instruction was successfully decoded + public override bool Decode(byte opcode, Instruction instruction) + { + // Set the instruction type + instruction.Type = InstructionType.Add; + + // Check if we have enough bytes for the ModR/M byte + if (!Decoder.CanReadByte()) + { + return false; + } + + // Read the ModR/M byte + // For ADD r/m8, r8 (00 /r): + // - The reg field specifies the source register + // - The r/m field with mod specifies the destination operand (register or memory) + var (_, reg, _, destinationOperand) = ModRMDecoder.ReadModRM8(); + + // Create the source register operand + // For high registers, we need to set the IsHighRegister flag + var sourceOperand = OperandFactory.CreateRegisterOperand(reg, 8); + + // Set the structured operands + instruction.StructuredOperands = + [ + destinationOperand, + sourceOperand + ]; + + return true; + } +} diff --git a/X86Disassembler/X86/Handlers/InstructionHandlerFactory.cs b/X86Disassembler/X86/Handlers/InstructionHandlerFactory.cs index e19acb2..9de12d2 100644 --- a/X86Disassembler/X86/Handlers/InstructionHandlerFactory.cs +++ b/X86Disassembler/X86/Handlers/InstructionHandlerFactory.cs @@ -269,6 +269,11 @@ public class InstructionHandlerFactory _handlers.Add(new AddR32Rm32Handler(_decoder)); _handlers.Add(new AddRm32R32Handler(_decoder)); _handlers.Add(new AddEaxImmHandler(_decoder)); + + // Add 8-bit ADD handlers + _handlers.Add(new AddRm8R8Handler(_decoder)); // ADD r/m8, r8 (opcode 00) + _handlers.Add(new AddR8Rm8Handler(_decoder)); // ADD r8, r/m8 (opcode 02) + _handlers.Add(new AddAlImmHandler(_decoder)); // ADD AL, imm8 (opcode 04) // Add ADD immediate handlers from ArithmeticImmediate namespace _handlers.Add(new AddImmToRm8Handler(_decoder)); diff --git a/X86Disassembler/X86/RegisterIndex8.cs b/X86Disassembler/X86/RegisterIndex8.cs new file mode 100644 index 0000000..7a6851b --- /dev/null +++ b/X86Disassembler/X86/RegisterIndex8.cs @@ -0,0 +1,33 @@ +namespace X86Disassembler.X86; + +/// +/// Represents the index values for x86 8-bit registers. +/// These values correspond to the encoding used in ModR/M bytes +/// for 8-bit register operand identification in x86 instructions. +/// +public enum RegisterIndex8 +{ + /// AL register (low byte of EAX) + AL = 0, + + /// CL register (low byte of ECX) + CL = 1, + + /// DL register (low byte of EDX) + DL = 2, + + /// BL register (low byte of EBX) + BL = 3, + + /// AH register (high byte of EAX) + AH = 4, + + /// CH register (high byte of ECX) + CH = 5, + + /// DH register (high byte of EDX) + DH = 6, + + /// BH register (high byte of EBX) + BH = 7 +}