From 4e837f5c633246bf41d009e5b068e6468f7b4b1b Mon Sep 17 00:00:00 2001 From: bird_egop Date: Sun, 13 Apr 2025 23:52:00 +0300 Subject: [PATCH] Simplified LoadStoreFloat64Handler by replacing if-else logic with a dictionary-based approach --- .../FloatingPoint/LoadStoreFloat64Handler.cs | 121 +++++++++++------- 1 file changed, 77 insertions(+), 44 deletions(-) diff --git a/X86Disassembler/X86/Handlers/FloatingPoint/LoadStoreFloat64Handler.cs b/X86Disassembler/X86/Handlers/FloatingPoint/LoadStoreFloat64Handler.cs index 7d88305..4f09ebc 100644 --- a/X86Disassembler/X86/Handlers/FloatingPoint/LoadStoreFloat64Handler.cs +++ b/X86Disassembler/X86/Handlers/FloatingPoint/LoadStoreFloat64Handler.cs @@ -5,18 +5,72 @@ namespace X86Disassembler.X86.Handlers.FloatingPoint; /// public class LoadStoreFloat64Handler : InstructionHandler { - // DD opcode - load/store float64 - private static readonly string[] Mnemonics = + // Memory operand mnemonics for DD opcode - load/store float64 + private static readonly string[] MemoryMnemonics = [ - "fld", - "??", - "fst", - "fstp", - "frstor", - "??", - "fnsave", - "fnstsw", + "fld", // 0 + "??", // 1 + "fst", // 2 + "fstp", // 3 + "frstor", // 4 + "??", // 5 + "fnsave", // 6 + "fnstsw" // 7 ]; + + // Register-register operations mapping (mod=3) + private static readonly Dictionary<(RegisterIndex Reg, RegisterIndex Rm), (string Mnemonic, string Operands)> RegisterOperations = new() + { + // FFREE ST(i) + { (RegisterIndex.A, RegisterIndex.A), ("ffree", "st(0)") }, + { (RegisterIndex.A, RegisterIndex.C), ("ffree", "st(1)") }, + { (RegisterIndex.A, RegisterIndex.D), ("ffree", "st(2)") }, + { (RegisterIndex.A, RegisterIndex.B), ("ffree", "st(3)") }, + { (RegisterIndex.A, RegisterIndex.Sp), ("ffree", "st(4)") }, + { (RegisterIndex.A, RegisterIndex.Bp), ("ffree", "st(5)") }, + { (RegisterIndex.A, RegisterIndex.Si), ("ffree", "st(6)") }, + { (RegisterIndex.A, RegisterIndex.Di), ("ffree", "st(7)") }, + + // FST ST(i) + { (RegisterIndex.C, RegisterIndex.A), ("fst", "st(0)") }, + { (RegisterIndex.C, RegisterIndex.C), ("fst", "st(1)") }, + { (RegisterIndex.C, RegisterIndex.D), ("fst", "st(2)") }, + { (RegisterIndex.C, RegisterIndex.B), ("fst", "st(3)") }, + { (RegisterIndex.C, RegisterIndex.Sp), ("fst", "st(4)") }, + { (RegisterIndex.C, RegisterIndex.Bp), ("fst", "st(5)") }, + { (RegisterIndex.C, RegisterIndex.Si), ("fst", "st(6)") }, + { (RegisterIndex.C, RegisterIndex.Di), ("fst", "st(7)") }, + + // FSTP ST(i) + { (RegisterIndex.D, RegisterIndex.A), ("fstp", "st(0)") }, + { (RegisterIndex.D, RegisterIndex.C), ("fstp", "st(1)") }, + { (RegisterIndex.D, RegisterIndex.D), ("fstp", "st(2)") }, + { (RegisterIndex.D, RegisterIndex.B), ("fstp", "st(3)") }, + { (RegisterIndex.D, RegisterIndex.Sp), ("fstp", "st(4)") }, + { (RegisterIndex.D, RegisterIndex.Bp), ("fstp", "st(5)") }, + { (RegisterIndex.D, RegisterIndex.Si), ("fstp", "st(6)") }, + { (RegisterIndex.D, RegisterIndex.Di), ("fstp", "st(7)") }, + + // FUCOM ST(i) + { (RegisterIndex.Si, RegisterIndex.A), ("fucom", "st(0)") }, + { (RegisterIndex.Si, RegisterIndex.C), ("fucom", "st(1)") }, + { (RegisterIndex.Si, RegisterIndex.D), ("fucom", "st(2)") }, + { (RegisterIndex.Si, RegisterIndex.B), ("fucom", "st(3)") }, + { (RegisterIndex.Si, RegisterIndex.Sp), ("fucom", "st(4)") }, + { (RegisterIndex.Si, RegisterIndex.Bp), ("fucom", "st(5)") }, + { (RegisterIndex.Si, RegisterIndex.Si), ("fucom", "st(6)") }, + { (RegisterIndex.Si, RegisterIndex.Di), ("fucom", "st(7)") }, + + // FUCOMP ST(i) + { (RegisterIndex.Di, RegisterIndex.A), ("fucomp", "st(0)") }, + { (RegisterIndex.Di, RegisterIndex.C), ("fucomp", "st(1)") }, + { (RegisterIndex.Di, RegisterIndex.D), ("fucomp", "st(2)") }, + { (RegisterIndex.Di, RegisterIndex.B), ("fucomp", "st(3)") }, + { (RegisterIndex.Di, RegisterIndex.Sp), ("fucomp", "st(4)") }, + { (RegisterIndex.Di, RegisterIndex.Bp), ("fucomp", "st(5)") }, + { (RegisterIndex.Di, RegisterIndex.Si), ("fucomp", "st(6)") }, + { (RegisterIndex.Di, RegisterIndex.Di), ("fucomp", "st(7)") } + }; /// /// Initializes a new instance of the LoadStoreFloat64Handler class @@ -47,59 +101,38 @@ public class LoadStoreFloat64Handler : InstructionHandler /// True if the instruction was successfully decoded public override bool Decode(byte opcode, Instruction instruction) { - int position = Decoder.GetPosition(); - - if (position >= Length) + if (!Decoder.CanReadByte()) { return false; } // Read the ModR/M byte - var (mod, reg, rm, destOperand) = ModRMDecoder.ReadModRM(true);// true for 64-bit operand + var (mod, reg, rm, memOperand) = ModRMDecoder.ReadModRM(true); // true for 64-bit operand - // Set the mnemonic based on the opcode and reg field - instruction.Mnemonic = Mnemonics[(int)reg]; - - // For memory operands, set the operand + // Handle based on addressing mode if (mod != 3) // Memory operand { + // Set the mnemonic based on the reg field + instruction.Mnemonic = MemoryMnemonics[(int)reg]; + if (reg == RegisterIndex.A || reg == RegisterIndex.C || reg == RegisterIndex.D) // fld, fst, fstp { - instruction.Operands = destOperand; + // Keep the qword ptr prefix from ModRMDecoder + instruction.Operands = memOperand; } else // frstor, fnsave, fnstsw { // Remove the qword ptr prefix for these operations - instruction.Operands = destOperand.Replace("qword ptr ", ""); + instruction.Operands = memOperand.Replace("qword ptr ", ""); } } else // Register operand (ST(i)) { - // Special handling for register-register operations - if (reg == RegisterIndex.A) // FFREE + // Look up the register operation in our dictionary + if (RegisterOperations.TryGetValue((reg, rm), out var operation)) { - instruction.Mnemonic = "ffree"; - instruction.Operands = $"st({(int)rm})"; - } - else if (reg == RegisterIndex.C) // FST - { - instruction.Mnemonic = "fst"; - instruction.Operands = $"st({(int)rm})"; - } - else if (reg == RegisterIndex.D) // FSTP - { - instruction.Mnemonic = "fstp"; - instruction.Operands = $"st({(int)rm})"; - } - else if (reg == RegisterIndex.Si) // FUCOM - { - instruction.Mnemonic = "fucom"; - instruction.Operands = $"st({(int)rm})"; - } - else if (reg == RegisterIndex.Di) // FUCOMP - { - instruction.Mnemonic = "fucomp"; - instruction.Operands = $"st({(int)rm})"; + instruction.Mnemonic = operation.Mnemonic; + instruction.Operands = operation.Operands; } else {