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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-06-20 08:18:36 +03:00

Reorganize floating point handlers into logical subfolders

This commit is contained in:
bird_egop
2025-04-17 23:48:09 +03:00
parent 963248dca0
commit 5916d13995
24 changed files with 818 additions and 42 deletions

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FADD float32 instruction (D8 /0)
/// </summary>
public class FaddFloat32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FaddFloat32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FaddFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FADD is D8 /0
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 0
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 0;
}
/// <summary>
/// Decodes a FADD float32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Verify reg field is 0 (FADD)
if (reg != 0)
{
return false;
}
// Set the instruction type
instruction.Type = InstructionType.Fadd;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FADD float64 instruction (DC /0)
/// </summary>
public class FaddFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FaddFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FaddFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FADD is DC /0
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 0
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 0;
}
/// <summary>
/// Decodes a FADD float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Verify reg field is 0 (FADD)
if (reg != 0)
{
return false;
}
// Set the instruction type
instruction.Type = InstructionType.Fadd;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM64
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC C0-DC FF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}

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using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary>
/// Handler for FDIV float32 instruction (D8 /6)
/// </summary>
public class FdivFloat32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivFloat32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIV is D8 /6
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 6
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 6;
}
/// <summary>
/// Decodes a FDIV float32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fdiv;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIV float64 instruction (DC /6)
/// </summary>
public class FdivFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIV is DC /6
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 6
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 6;
}
/// <summary>
/// Decodes a FDIV float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fdiv;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC F0-DC F7, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}

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using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary>
/// Handler for FDIVR float32 instruction (D8 /7)
/// </summary>
public class FdivrFloat32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivrFloat32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivrFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIVR is D8 /7
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 7
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 7;
}
/// <summary>
/// Decodes a FDIVR float32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fdivr;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIVR float64 instruction (DC /7)
/// </summary>
public class FdivrFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivrFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivrFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIVR is DC /7
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 7
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 7;
}
/// <summary>
/// Decodes a FDIVR float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fdivr;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC F8-DC FF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}

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using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary>
/// Handler for FMUL float32 instruction (D8 /1)
/// </summary>
public class FmulFloat32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FmulFloat32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FmulFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FMUL is D8 /1
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 1
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 1;
}
/// <summary>
/// Decodes a FMUL float32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fmul;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
// Set the structured operands
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
return true;
}
}

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using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary>
/// Handler for FMUL float64 instruction (DC /1)
/// </summary>
public class FmulFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FmulFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FmulFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FMUL is DC /1
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 1
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 1;
}
/// <summary>
/// Decodes a FMUL float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fmul;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM64
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC C0-DC FF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}

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using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary>
/// Handler for FSUB float32 instruction (D8 /4)
/// </summary>
public class FsubFloat32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubFloat32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUB is D8 /4
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 4
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 4;
}
/// <summary>
/// Decodes a FSUB float32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fsub;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUB float64 instruction (DC /4)
/// </summary>
public class FsubFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUB is DC /4
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 4
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 4;
}
/// <summary>
/// Decodes a FSUB float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fsub;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC E0-DC E7, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}

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using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary>
/// Handler for FSUBR float32 instruction (D8 /5)
/// </summary>
public class FsubrFloat32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubrFloat32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubrFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUBR is D8 /5
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 5
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 5;
}
/// <summary>
/// Decodes a FSUBR float32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fsubr;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
return true;
}
}

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@ -0,0 +1,85 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUBR float64 instruction (DC /5)
/// </summary>
public class FsubrFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubrFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubrFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUBR is DC /5
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 5
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 5;
}
/// <summary>
/// Decodes a FSUBR float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fsubr;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC E8-DC EF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}