mirror of
https://github.com/sampletext32/ParkanPlayground.git
synced 2025-06-20 16:18:37 +03:00
Reorganize floating point handlers into logical subfolders
This commit is contained in:
@ -0,0 +1,89 @@
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using X86Disassembler.X86.Operands;
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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
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/// <summary>
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/// Handler for FLD float32 instruction (D9 /0)
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/// </summary>
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public class FldFloat32Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FldFloat32Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FldFloat32Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FLD is D9 /0
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if (opcode != 0xD9) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 0
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 0;
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}
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/// <summary>
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/// Decodes an FLD float32 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Verify reg field is 0 (FLD)
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if (reg != 0)
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{
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return false;
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}
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// Set the instruction type
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instruction.Type = InstructionType.Fld;
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// Handle based on addressing mode
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM
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instruction.StructuredOperands =
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[
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rawOperand
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];
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}
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else // Register operand (ST(i))
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{
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// For register operands with mod=3, this is FLD ST(i)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
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// Set the structured operands
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instruction.StructuredOperands =
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[
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stiOperand
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];
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}
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return true;
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}
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}
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@ -0,0 +1,89 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
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using X86Disassembler.X86.Operands;
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/// <summary>
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/// Handler for FLD float64 instruction (DD /0)
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/// </summary>
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public class FldFloat64Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FldFloat64Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FldFloat64Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FLD is DD /0
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if (opcode != 0xDD) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 0
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 0;
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}
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/// <summary>
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/// Decodes a FLD float64 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Verify reg field is 0 (FLD)
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if (reg != 0)
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{
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return false;
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}
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// Set the instruction type
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instruction.Type = InstructionType.Fld;
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// Handle based on addressing mode
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM
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instruction.StructuredOperands =
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[
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rawOperand
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];
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}
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else // Register operand (ST(i))
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{
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// For register operands with mod=3, this is FLD ST(i)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
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// Set the structured operands
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instruction.StructuredOperands =
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[
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stiOperand
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];
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}
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return true;
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}
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}
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@ -0,0 +1,83 @@
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using X86Disassembler.X86.Operands;
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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
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/// <summary>
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/// Handler for FST float32 instruction (D9 /2)
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/// </summary>
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public class FstFloat32Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FstFloat32Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FstFloat32Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FST is D9 /2
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if (opcode != 0xD9) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 2
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 2;
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}
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/// <summary>
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/// Decodes an FST float32 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Set the instruction type
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instruction.Type = InstructionType.Fst;
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// Handle based on addressing mode
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM
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instruction.StructuredOperands =
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[
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rawOperand
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];
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}
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else // Register operand (ST(i))
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{
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// For register operands with mod=3, this is FST ST(i)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
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// Set the structured operands
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instruction.StructuredOperands =
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[
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stiOperand
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];
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}
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return true;
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}
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}
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@ -0,0 +1,83 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
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using X86Disassembler.X86.Operands;
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/// <summary>
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/// Handler for FST float64 instruction (DD /2)
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/// </summary>
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public class FstFloat64Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FstFloat64Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FstFloat64Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FST is DD /2
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if (opcode != 0xDD) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 2
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 2;
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}
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/// <summary>
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/// Decodes a FST float64 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Set the instruction type
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instruction.Type = InstructionType.Fst;
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// Handle based on addressing mode
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM
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instruction.StructuredOperands =
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[
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rawOperand
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];
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}
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else // Register operand (ST(i))
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{
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// For register operands with mod=3, this is FST ST(i)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
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// Set the structured operands
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instruction.StructuredOperands =
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[
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stiOperand
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];
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}
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return true;
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}
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}
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@ -0,0 +1,83 @@
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using X86Disassembler.X86.Operands;
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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
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/// <summary>
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/// Handler for FSTP float32 instruction (D9 /3)
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/// </summary>
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public class FstpFloat32Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FstpFloat32Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FstpFloat32Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FSTP is D9 /3
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if (opcode != 0xD9) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 3
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 3;
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}
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/// <summary>
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/// Decodes an FSTP float32 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Set the instruction type
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instruction.Type = InstructionType.Fstp;
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// Handle based on addressing mode
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM
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instruction.StructuredOperands =
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[
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rawOperand
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];
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}
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else // Register operand (ST(i))
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{
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// For register operands with mod=3, this is FSTP ST(i)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
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// Set the structured operands
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instruction.StructuredOperands =
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[
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stiOperand
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];
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}
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return true;
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}
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}
|
@ -0,0 +1,83 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
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using X86Disassembler.X86.Operands;
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/// <summary>
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/// Handler for FSTP float64 instruction (DD /3)
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/// </summary>
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public class FstpFloat64Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FstpFloat64Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FstpFloat64Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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|
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/// <summary>
|
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/// Checks if this handler can decode the given opcode
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/// </summary>
|
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/// <param name="opcode">The opcode to check</param>
|
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/// <returns>True if this handler can decode the opcode</returns>
|
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public override bool CanHandle(byte opcode)
|
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{
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// FSTP is DD /3
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if (opcode != 0xDD) return false;
|
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|
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if (!Decoder.CanReadByte())
|
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{
|
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return false;
|
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}
|
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|
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// Check if the ModR/M byte has reg field = 3
|
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byte modRm = Decoder.PeakByte();
|
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byte reg = (byte)((modRm >> 3) & 0x7);
|
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|
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return reg == 3;
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}
|
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|
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/// <summary>
|
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/// Decodes a FSTP float64 instruction
|
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/// </summary>
|
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/// <param name="opcode">The opcode of the instruction</param>
|
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/// <param name="instruction">The instruction object to populate</param>
|
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/// <returns>True if the instruction was successfully decoded</returns>
|
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public override bool Decode(byte opcode, Instruction instruction)
|
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{
|
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if (!Decoder.CanReadByte())
|
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{
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return false;
|
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}
|
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|
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// Read the ModR/M byte using the specialized FPU method
|
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
|
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|
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// Set the instruction type
|
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instruction.Type = InstructionType.Fstp;
|
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|
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// Handle based on addressing mode
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM
|
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instruction.StructuredOperands =
|
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[
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rawOperand
|
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];
|
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}
|
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else // Register operand (ST(i))
|
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{
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// For register operands with mod=3, this is FSTP ST(i)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
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|
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// Set the structured operands
|
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instruction.StructuredOperands =
|
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[
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stiOperand
|
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];
|
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}
|
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return true;
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}
|
||||
}
|
Reference in New Issue
Block a user