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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-06-20 16:18:37 +03:00

Reorganize floating point handlers into logical subfolders

This commit is contained in:
bird_egop
2025-04-17 23:48:09 +03:00
parent 963248dca0
commit 5916d13995
24 changed files with 818 additions and 42 deletions

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using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
/// <summary>
/// Handler for FLD float32 instruction (D9 /0)
/// </summary>
public class FldFloat32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FldFloat32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FldFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FLD is D9 /0
if (opcode != 0xD9) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 0
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 0;
}
/// <summary>
/// Decodes an FLD float32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Verify reg field is 0 (FLD)
if (reg != 0)
{
return false;
}
// Set the instruction type
instruction.Type = InstructionType.Fld;
// Handle based on addressing mode
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands with mod=3, this is FLD ST(i)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FLD float64 instruction (DD /0)
/// </summary>
public class FldFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FldFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FldFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FLD is DD /0
if (opcode != 0xDD) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 0
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 0;
}
/// <summary>
/// Decodes a FLD float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Verify reg field is 0 (FLD)
if (reg != 0)
{
return false;
}
// Set the instruction type
instruction.Type = InstructionType.Fld;
// Handle based on addressing mode
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands with mod=3, this is FLD ST(i)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand
];
}
return true;
}
}

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using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
/// <summary>
/// Handler for FST float32 instruction (D9 /2)
/// </summary>
public class FstFloat32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FstFloat32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FstFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FST is D9 /2
if (opcode != 0xD9) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 2
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 2;
}
/// <summary>
/// Decodes an FST float32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fst;
// Handle based on addressing mode
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands with mod=3, this is FST ST(i)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FST float64 instruction (DD /2)
/// </summary>
public class FstFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FstFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FstFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FST is DD /2
if (opcode != 0xDD) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 2
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 2;
}
/// <summary>
/// Decodes a FST float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fst;
// Handle based on addressing mode
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands with mod=3, this is FST ST(i)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand
];
}
return true;
}
}

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using X86Disassembler.X86.Operands;
namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
/// <summary>
/// Handler for FSTP float32 instruction (D9 /3)
/// </summary>
public class FstpFloat32Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FstpFloat32Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FstpFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSTP is D9 /3
if (opcode != 0xD9) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 3;
}
/// <summary>
/// Decodes an FSTP float32 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fstp;
// Handle based on addressing mode
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands with mod=3, this is FSTP ST(i)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSTP float64 instruction (DD /3)
/// </summary>
public class FstpFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FstpFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FstpFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSTP is DD /3
if (opcode != 0xDD) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 3;
}
/// <summary>
/// Decodes a FSTP float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fstp;
// Handle based on addressing mode
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands with mod=3, this is FSTP ST(i)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand
];
}
return true;
}
}