From 5daab494e12df27b8f9f7f562f85d121586bcf6a Mon Sep 17 00:00:00 2001 From: bird_egop Date: Mon, 14 Apr 2025 00:00:30 +0300 Subject: [PATCH] Simplified LoadStoreInt32Handler by replacing if-else logic with a dictionary-based approach --- .../FloatingPoint/LoadStoreInt32Handler.cs | 168 ++++++++++-------- 1 file changed, 97 insertions(+), 71 deletions(-) diff --git a/X86Disassembler/X86/Handlers/FloatingPoint/LoadStoreInt32Handler.cs b/X86Disassembler/X86/Handlers/FloatingPoint/LoadStoreInt32Handler.cs index ea327cf..7843e0f 100644 --- a/X86Disassembler/X86/Handlers/FloatingPoint/LoadStoreInt32Handler.cs +++ b/X86Disassembler/X86/Handlers/FloatingPoint/LoadStoreInt32Handler.cs @@ -5,18 +5,86 @@ namespace X86Disassembler.X86.Handlers.FloatingPoint; /// public class LoadStoreInt32Handler : InstructionHandler { - // DB opcode - load/store int32, misc - private static readonly string[] Mnemonics = + // Memory operand mnemonics for DB opcode - load/store int32, misc + private static readonly string[] MemoryMnemonics = [ - "fild", - "??", - "fist", - "fistp", - "??", - "fld", - "??", - "fstp", + "fild", // 0 - 32-bit integer + "??", // 1 + "fist", // 2 - 32-bit integer + "fistp", // 3 - 32-bit integer + "??", // 4 + "fld", // 5 - 80-bit extended precision + "??", // 6 + "fstp" // 7 - 80-bit extended precision ]; + + // Register-register operations mapping (mod=3) + private static readonly Dictionary<(RegisterIndex Reg, RegisterIndex Rm), (string Mnemonic, string Operands)> RegisterOperations = new() + { + // FCMOVNB ST(0), ST(i) + { (RegisterIndex.A, RegisterIndex.A), ("fcmovnb", "st(0), st(0)") }, + { (RegisterIndex.A, RegisterIndex.C), ("fcmovnb", "st(0), st(1)") }, + { (RegisterIndex.A, RegisterIndex.D), ("fcmovnb", "st(0), st(2)") }, + { (RegisterIndex.A, RegisterIndex.B), ("fcmovnb", "st(0), st(3)") }, + { (RegisterIndex.A, RegisterIndex.Sp), ("fcmovnb", "st(0), st(4)") }, + { (RegisterIndex.A, RegisterIndex.Bp), ("fcmovnb", "st(0), st(5)") }, + { (RegisterIndex.A, RegisterIndex.Si), ("fcmovnb", "st(0), st(6)") }, + { (RegisterIndex.A, RegisterIndex.Di), ("fcmovnb", "st(0), st(7)") }, + + // FCMOVNE ST(0), ST(i) + { (RegisterIndex.B, RegisterIndex.A), ("fcmovne", "st(0), st(0)") }, + { (RegisterIndex.B, RegisterIndex.C), ("fcmovne", "st(0), st(1)") }, + { (RegisterIndex.B, RegisterIndex.D), ("fcmovne", "st(0), st(2)") }, + { (RegisterIndex.B, RegisterIndex.B), ("fcmovne", "st(0), st(3)") }, + { (RegisterIndex.B, RegisterIndex.Sp), ("fcmovne", "st(0), st(4)") }, + { (RegisterIndex.B, RegisterIndex.Bp), ("fcmovne", "st(0), st(5)") }, + { (RegisterIndex.B, RegisterIndex.Si), ("fcmovne", "st(0), st(6)") }, + { (RegisterIndex.B, RegisterIndex.Di), ("fcmovne", "st(0), st(7)") }, + + // FCMOVNBE ST(0), ST(i) + { (RegisterIndex.C, RegisterIndex.A), ("fcmovnbe", "st(0), st(0)") }, + { (RegisterIndex.C, RegisterIndex.C), ("fcmovnbe", "st(0), st(1)") }, + { (RegisterIndex.C, RegisterIndex.D), ("fcmovnbe", "st(0), st(2)") }, + { (RegisterIndex.C, RegisterIndex.B), ("fcmovnbe", "st(0), st(3)") }, + { (RegisterIndex.C, RegisterIndex.Sp), ("fcmovnbe", "st(0), st(4)") }, + { (RegisterIndex.C, RegisterIndex.Bp), ("fcmovnbe", "st(0), st(5)") }, + { (RegisterIndex.C, RegisterIndex.Si), ("fcmovnbe", "st(0), st(6)") }, + { (RegisterIndex.C, RegisterIndex.Di), ("fcmovnbe", "st(0), st(7)") }, + + // FCMOVNU ST(0), ST(i) + { (RegisterIndex.D, RegisterIndex.A), ("fcmovnu", "st(0), st(0)") }, + { (RegisterIndex.D, RegisterIndex.C), ("fcmovnu", "st(0), st(1)") }, + { (RegisterIndex.D, RegisterIndex.D), ("fcmovnu", "st(0), st(2)") }, + { (RegisterIndex.D, RegisterIndex.B), ("fcmovnu", "st(0), st(3)") }, + { (RegisterIndex.D, RegisterIndex.Sp), ("fcmovnu", "st(0), st(4)") }, + { (RegisterIndex.D, RegisterIndex.Bp), ("fcmovnu", "st(0), st(5)") }, + { (RegisterIndex.D, RegisterIndex.Si), ("fcmovnu", "st(0), st(6)") }, + { (RegisterIndex.D, RegisterIndex.Di), ("fcmovnu", "st(0), st(7)") }, + + // Special cases + { (RegisterIndex.Si, RegisterIndex.C), ("fclex", "") }, + { (RegisterIndex.Si, RegisterIndex.D), ("finit", "") }, + + // FUCOMI ST(0), ST(i) + { (RegisterIndex.Di, RegisterIndex.A), ("fucomi", "st(0), st(0)") }, + { (RegisterIndex.Di, RegisterIndex.C), ("fucomi", "st(0), st(1)") }, + { (RegisterIndex.Di, RegisterIndex.D), ("fucomi", "st(0), st(2)") }, + { (RegisterIndex.Di, RegisterIndex.B), ("fucomi", "st(0), st(3)") }, + { (RegisterIndex.Di, RegisterIndex.Sp), ("fucomi", "st(0), st(4)") }, + { (RegisterIndex.Di, RegisterIndex.Bp), ("fucomi", "st(0), st(5)") }, + { (RegisterIndex.Di, RegisterIndex.Si), ("fucomi", "st(0), st(6)") }, + { (RegisterIndex.Di, RegisterIndex.Di), ("fucomi", "st(0), st(7)") }, + + // FCOMI ST(0), ST(i) + { (RegisterIndex.Sp, RegisterIndex.A), ("fcomi", "st(0), st(0)") }, + { (RegisterIndex.Sp, RegisterIndex.C), ("fcomi", "st(0), st(1)") }, + { (RegisterIndex.Sp, RegisterIndex.D), ("fcomi", "st(0), st(2)") }, + { (RegisterIndex.Sp, RegisterIndex.B), ("fcomi", "st(0), st(3)") }, + { (RegisterIndex.Sp, RegisterIndex.Sp), ("fcomi", "st(0), st(4)") }, + { (RegisterIndex.Sp, RegisterIndex.Bp), ("fcomi", "st(0), st(5)") }, + { (RegisterIndex.Sp, RegisterIndex.Si), ("fcomi", "st(0), st(6)") }, + { (RegisterIndex.Sp, RegisterIndex.Di), ("fcomi", "st(0), st(7)") } + }; /// /// Initializes a new instance of the LoadStoreInt32Handler class @@ -47,87 +115,45 @@ public class LoadStoreInt32Handler : InstructionHandler /// True if the instruction was successfully decoded public override bool Decode(byte opcode, Instruction instruction) { - int position = Decoder.GetPosition(); - - if (position >= Length) + if (!Decoder.CanReadByte()) { return false; } // Read the ModR/M byte - var (mod, reg, rm, destOperand) = ModRMDecoder.ReadModRM(); + var (mod, reg, rm, memOperand) = ModRMDecoder.ReadModRM(); - // Set the mnemonic based on the opcode and reg field - instruction.Mnemonic = Mnemonics[(int)reg]; - - // For memory operands, set the operand + // Handle based on addressing mode if (mod != 3) // Memory operand { - if (reg == RegisterIndex.A || reg == RegisterIndex.C || reg == RegisterIndex.D) // fild, fist, fistp + // Set the mnemonic based on the reg field + instruction.Mnemonic = MemoryMnemonics[(int)reg]; + + // Get the base operand without size prefix + string baseOperand = memOperand.Replace("dword ptr ", ""); + + // Apply the appropriate size prefix based on the operation + if (reg == RegisterIndex.A || reg == RegisterIndex.C || reg == RegisterIndex.D) // 32-bit integer operations { // Keep the dword ptr prefix for integer operations - instruction.Operands = destOperand; + instruction.Operands = memOperand; } - else if (reg == RegisterIndex.Di || reg == RegisterIndex.Bp) // fld, fstp (extended precision) + else if (reg == RegisterIndex.Di || reg == RegisterIndex.Bp) // 80-bit extended precision operations { - // Replace dword ptr with tword ptr for extended precision - instruction.Operands = destOperand.Replace("dword ptr", "tword ptr"); + instruction.Operands = $"tword ptr {baseOperand}"; } else { - instruction.Operands = destOperand; + instruction.Operands = memOperand; } } else // Register operand (ST(i)) { - // Special handling for register-register operations - if (reg == RegisterIndex.A) // FCMOVNB + // Look up the register operation in our dictionary + if (RegisterOperations.TryGetValue((reg, rm), out var operation)) { - instruction.Mnemonic = "fcmovnb"; - instruction.Operands = $"st(0), st({(int)rm})"; - } - else if (reg == RegisterIndex.B) // FCMOVNE - { - instruction.Mnemonic = "fcmovne"; - instruction.Operands = $"st(0), st({(int)rm})"; - } - else if (reg == RegisterIndex.C) // FCMOVNBE - { - instruction.Mnemonic = "fcmovnbe"; - instruction.Operands = $"st(0), st({(int)rm})"; - } - else if (reg == RegisterIndex.D) // FCMOVNU - { - instruction.Mnemonic = "fcmovnu"; - instruction.Operands = $"st(0), st({(int)rm})"; - } - else if (reg == RegisterIndex.Si) - { - if (rm == RegisterIndex.C) // FCLEX - { - instruction.Mnemonic = "fclex"; - instruction.Operands = ""; - } - else if (rm == RegisterIndex.D) // FINIT - { - instruction.Mnemonic = "finit"; - instruction.Operands = ""; - } - else - { - instruction.Mnemonic = "??"; - instruction.Operands = ""; - } - } - else if (reg == RegisterIndex.Di) // FUCOMI - { - instruction.Mnemonic = "fucomi"; - instruction.Operands = $"st(0), st({(int)rm})"; - } - else if (reg == RegisterIndex.Sp) // FCOMI - { - instruction.Mnemonic = "fcomi"; - instruction.Operands = $"st(0), st({(int)rm})"; + instruction.Mnemonic = operation.Mnemonic; + instruction.Operands = operation.Operands; } else {