0
mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-05-21 12:51:18 +03:00

Added comprehensive tests for instruction handlers

This commit is contained in:
bird_egop 2025-04-12 22:00:15 +03:00
parent 5ede2bd3c6
commit 759d28f9a7
2 changed files with 347 additions and 0 deletions

View File

@ -0,0 +1,175 @@
namespace X86DisassemblerTests;
using System;
using Xunit;
using X86Disassembler.X86;
using X86Disassembler.X86.Handlers;
/// <summary>
/// Tests for data transfer instruction handlers
/// </summary>
public class DataTransferInstructionTests
{
/// <summary>
/// Tests the DataTransferHandler for decoding MOV r32, r/m32 instruction
/// </summary>
[Fact]
public void DataTransferHandler_DecodesMovR32Rm32_Correctly()
{
// Arrange
// MOV EAX, ECX (8B C1) - ModR/M byte C1 = 11 000 001 (mod=3, reg=0, rm=1)
// mod=3 means direct register addressing, reg=0 is EAX, rm=1 is ECX
byte[] codeBuffer = new byte[] { 0x8B, 0xC1 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("mov", instruction.Mnemonic);
Assert.Equal("ecx, eax", instruction.Operands);
}
/// <summary>
/// Tests the DataTransferHandler for decoding MOV r/m32, r32 instruction
/// </summary>
[Fact]
public void DataTransferHandler_DecodesMovRm32R32_Correctly()
{
// Arrange
// MOV ECX, EAX (89 C1) - ModR/M byte C1 = 11 000 001 (mod=3, reg=0, rm=1)
// mod=3 means direct register addressing, reg=0 is EAX, rm=1 is ECX
byte[] codeBuffer = new byte[] { 0x89, 0xC1 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("mov", instruction.Mnemonic);
Assert.Equal("eax, ecx", instruction.Operands);
}
/// <summary>
/// Tests the DataTransferHandler for decoding MOV r32, imm32 instruction
/// </summary>
[Fact]
public void DataTransferHandler_DecodesMovR32Imm32_Correctly()
{
// Arrange
// MOV EAX, 0x12345678 (B8 78 56 34 12)
byte[] codeBuffer = new byte[] { 0xB8, 0x78, 0x56, 0x34, 0x12 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("mov", instruction.Mnemonic);
Assert.Equal("eax, 0x12345678", instruction.Operands);
}
/// <summary>
/// Tests the DataTransferHandler for decoding MOV EAX, moffs32 instruction
/// </summary>
[Fact]
public void DataTransferHandler_DecodesMovEaxMoffs32_Correctly()
{
// Arrange
// MOV EAX, [0x12345678] (A1 78 56 34 12)
byte[] codeBuffer = new byte[] { 0xA1, 0x78, 0x56, 0x34, 0x12 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("mov", instruction.Mnemonic);
Assert.Equal("eax, [0x12345678]", instruction.Operands);
}
/// <summary>
/// Tests the DataTransferHandler for decoding MOV moffs32, EAX instruction
/// </summary>
[Fact]
public void DataTransferHandler_DecodesMovMoffs32Eax_Correctly()
{
// Arrange
// MOV [0x12345678], EAX (A3 78 56 34 12)
byte[] codeBuffer = new byte[] { 0xA3, 0x78, 0x56, 0x34, 0x12 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("mov", instruction.Mnemonic);
Assert.Equal("[0x12345678], eax", instruction.Operands);
}
/// <summary>
/// Tests the DataTransferHandler for decoding MOV with memory addressing
/// </summary>
[Fact]
public void DataTransferHandler_DecodesMovWithMemoryAddressing_Correctly()
{
// Arrange
// MOV EAX, [ECX+0x12345678] (8B 81 78 56 34 12) - ModR/M byte 81 = 10 000 001 (mod=2, reg=0, rm=1)
// mod=2 means memory addressing with 32-bit displacement, reg=0 is EAX, rm=1 is ECX
byte[] codeBuffer = new byte[] { 0x8B, 0x81, 0x78, 0x56, 0x34, 0x12 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("mov", instruction.Mnemonic);
Assert.Equal("dword ptr [ecx+0x12345678], eax", instruction.Operands);
}
/// <summary>
/// Tests the DataTransferHandler for decoding PUSH r32 instruction
/// </summary>
[Fact]
public void DataTransferHandler_DecodesPushR32_Correctly()
{
// Arrange
// PUSH EAX (50)
byte[] codeBuffer = new byte[] { 0x50 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("push", instruction.Mnemonic);
Assert.Equal("eax", instruction.Operands);
}
/// <summary>
/// Tests the DataTransferHandler for decoding POP r32 instruction
/// </summary>
[Fact]
public void DataTransferHandler_DecodesPopR32_Correctly()
{
// Arrange
// POP ECX (59)
byte[] codeBuffer = new byte[] { 0x59 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("pop", instruction.Mnemonic);
Assert.Equal("ecx", instruction.Operands);
}
}

View File

@ -114,4 +114,176 @@ public class Group1InstructionTests
Assert.Equal("cmp", instruction.Mnemonic); Assert.Equal("cmp", instruction.Mnemonic);
Assert.Equal("ebx, 0x12345678", instruction.Operands); Assert.Equal("ebx, 0x12345678", instruction.Operands);
} }
/// <summary>
/// Tests the AdcImmToRm32Handler for decoding ADC r/m32, imm32 instruction
/// </summary>
[Fact]
public void AdcImmToRm32Handler_DecodesAdcRm32Imm32_Correctly()
{
// Arrange
// ADC ECX, 0x12345678 (81 D1 78 56 34 12) - ModR/M byte D1 = 11 010 001 (mod=3, reg=2, rm=1)
// mod=3 means direct register addressing, reg=2 indicates ADC operation, rm=1 is ECX
byte[] codeBuffer = new byte[] { 0x81, 0xD1, 0x78, 0x56, 0x34, 0x12 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("adc", instruction.Mnemonic);
Assert.Equal("ecx, 0x12345678", instruction.Operands);
}
/// <summary>
/// Tests the AdcImmToRm32SignExtendedHandler for decoding ADC r/m32, imm8 instruction (sign-extended)
/// </summary>
[Fact]
public void AdcImmToRm32SignExtendedHandler_DecodesAdcRm32Imm8_Correctly()
{
// Arrange
// ADC ECX, 0x42 (83 D1 42) - ModR/M byte D1 = 11 010 001 (mod=3, reg=2, rm=1)
// mod=3 means direct register addressing, reg=2 indicates ADC operation, rm=1 is ECX
// The immediate value 0x42 is sign-extended to 32 bits
byte[] codeBuffer = new byte[] { 0x83, 0xD1, 0x42 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("adc", instruction.Mnemonic);
Assert.Equal("ecx, 0x00000042", instruction.Operands);
}
/// <summary>
/// Tests the SbbImmFromRm32Handler for decoding SBB r/m32, imm32 instruction
/// </summary>
[Fact]
public void SbbImmFromRm32Handler_DecodesSbbRm32Imm32_Correctly()
{
// Arrange
// SBB EDX, 0x12345678 (81 DA 78 56 34 12) - ModR/M byte DA = 11 011 010 (mod=3, reg=3, rm=2)
// mod=3 means direct register addressing, reg=3 indicates SBB operation, rm=2 is EDX
byte[] codeBuffer = new byte[] { 0x81, 0xDA, 0x78, 0x56, 0x34, 0x12 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("sbb", instruction.Mnemonic);
Assert.Equal("edx, 0x12345678", instruction.Operands);
}
/// <summary>
/// Tests the SbbImmFromRm32SignExtendedHandler for decoding SBB r/m32, imm8 instruction (sign-extended)
/// </summary>
[Fact]
public void SbbImmFromRm32SignExtendedHandler_DecodesSbbRm32Imm8_Correctly()
{
// Arrange
// SBB EDX, 0x42 (83 DA 42) - ModR/M byte DA = 11 011 010 (mod=3, reg=3, rm=2)
// mod=3 means direct register addressing, reg=3 indicates SBB operation, rm=2 is EDX
// The immediate value 0x42 is sign-extended to 32 bits
byte[] codeBuffer = new byte[] { 0x83, 0xDA, 0x42 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("sbb", instruction.Mnemonic);
Assert.Equal("edx, 0x00000042", instruction.Operands);
}
/// <summary>
/// Tests the AndImmWithRm32Handler for decoding AND r/m32, imm32 instruction
/// </summary>
[Fact]
public void AndImmWithRm32Handler_DecodesAndRm32Imm32_Correctly()
{
// Arrange
// AND EBX, 0x12345678 (81 E3 78 56 34 12) - ModR/M byte E3 = 11 100 011 (mod=3, reg=4, rm=3)
// mod=3 means direct register addressing, reg=4 indicates AND operation, rm=3 is EBX
byte[] codeBuffer = new byte[] { 0x81, 0xE3, 0x78, 0x56, 0x34, 0x12 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("and", instruction.Mnemonic);
Assert.Equal("ebx, 0x12345678", instruction.Operands);
}
/// <summary>
/// Tests the AndImmWithRm32SignExtendedHandler for decoding AND r/m32, imm8 instruction (sign-extended)
/// </summary>
[Fact]
public void AndImmWithRm32SignExtendedHandler_DecodesAndRm32Imm8_Correctly()
{
// Arrange
// AND EBX, 0x42 (83 E3 42) - ModR/M byte E3 = 11 100 011 (mod=3, reg=4, rm=3)
// mod=3 means direct register addressing, reg=4 indicates AND operation, rm=3 is EBX
// The immediate value 0x42 is sign-extended to 32 bits
byte[] codeBuffer = new byte[] { 0x83, 0xE3, 0x42 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("and", instruction.Mnemonic);
Assert.Equal("ebx, 0x00000042", instruction.Operands);
}
/// <summary>
/// Tests the XorImmWithRm32Handler for decoding XOR r/m32, imm32 instruction
/// </summary>
[Fact]
public void XorImmWithRm32Handler_DecodesXorRm32Imm32_Correctly()
{
// Arrange
// XOR ESI, 0x12345678 (81 F6 78 56 34 12) - ModR/M byte F6 = 11 110 110 (mod=3, reg=6, rm=6)
// mod=3 means direct register addressing, reg=6 indicates XOR operation, rm=6 is ESI
byte[] codeBuffer = new byte[] { 0x81, 0xF6, 0x78, 0x56, 0x34, 0x12 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("xor", instruction.Mnemonic);
Assert.Equal("esi, 0x12345678", instruction.Operands);
}
/// <summary>
/// Tests the XorImmWithRm32SignExtendedHandler for decoding XOR r/m32, imm8 instruction (sign-extended)
/// </summary>
[Fact]
public void XorImmWithRm32SignExtendedHandler_DecodesXorRm32Imm8_Correctly()
{
// Arrange
// XOR ESI, 0x42 (83 F6 42) - ModR/M byte F6 = 11 110 110 (mod=3, reg=6, rm=6)
// mod=3 means direct register addressing, reg=6 indicates XOR operation, rm=6 is ESI
// The immediate value 0x42 is sign-extended to 32 bits
byte[] codeBuffer = new byte[] { 0x83, 0xF6, 0x42 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
// Act
var instruction = decoder.DecodeInstruction();
// Assert
Assert.NotNull(instruction);
Assert.Equal("xor", instruction.Mnemonic);
Assert.Equal("esi, 0x00000042", instruction.Operands);
}
} }