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Added 16-bit register-to-register ADD handlers for r16, r/m16 and r/m16, r16 instructions
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X86Disassembler/X86/Handlers/Add/AddR16Rm16Handler.cs
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72
X86Disassembler/X86/Handlers/Add/AddR16Rm16Handler.cs
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using X86Disassembler.X86.Operands;
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namespace X86Disassembler.X86.Handlers.Add;
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/// <summary>
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/// Handler for ADD r16, r/m16 instruction (opcode 03 with 0x66 prefix)
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/// </summary>
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public class AddR16Rm16Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the AddR16Rm16Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public AddR16Rm16Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// ADD r16, r/m16 is encoded as 0x03 with 0x66 prefix
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if (opcode != 0x03)
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{
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return false;
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}
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// Only handle when the operand size prefix is present
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return Decoder.HasOperandSizePrefix();
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}
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/// <summary>
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/// Decodes an ADD r16, r/m16 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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// Set the instruction type
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instruction.Type = InstructionType.Add;
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// Check if we can read the ModR/M byte
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// For ADD r16, r/m16 (0x03 with 0x66 prefix):
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// - The reg field of the ModR/M byte specifies the destination register
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// - The r/m field with mod specifies the source operand (register or memory)
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var (_, reg, _, sourceOperand) = ModRMDecoder.ReadModRM16();
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// Note: The operand size is already set to 16-bit by the ReadModRM16 method
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// Create the destination register operand with 16-bit size
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var destinationOperand = OperandFactory.CreateRegisterOperand(reg, 16);
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// Set the structured operands
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instruction.StructuredOperands =
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[
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destinationOperand,
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sourceOperand
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];
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return true;
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}
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}
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72
X86Disassembler/X86/Handlers/Add/AddRm16R16Handler.cs
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72
X86Disassembler/X86/Handlers/Add/AddRm16R16Handler.cs
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@ -0,0 +1,72 @@
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using X86Disassembler.X86.Operands;
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namespace X86Disassembler.X86.Handlers.Add;
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/// <summary>
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/// Handler for ADD r/m16, r16 instruction (opcode 01 with 0x66 prefix)
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/// </summary>
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public class AddRm16R16Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the AddRm16R16Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public AddRm16R16Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// ADD r/m16, r16 is encoded as 0x01 with 0x66 prefix
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if (opcode != 0x01)
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{
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return false;
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}
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// Only handle when the operand size prefix is present
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return Decoder.HasOperandSizePrefix();
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}
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/// <summary>
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/// Decodes an ADD r/m16, r16 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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// Set the instruction type
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instruction.Type = InstructionType.Add;
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// Check if we can read the ModR/M byte
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// For ADD r/m16, r16 (0x01 with 0x66 prefix):
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// - The reg field of the ModR/M byte specifies the source register
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// - The r/m field with mod specifies the destination operand (register or memory)
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var (_, reg, _, destinationOperand) = ModRMDecoder.ReadModRM16();
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// Note: The operand size is already set to 16-bit by the ReadModRM16 method
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// Create the source register operand with 16-bit size
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var sourceOperand = OperandFactory.CreateRegisterOperand(reg, 16);
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// Set the structured operands
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instruction.StructuredOperands =
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[
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destinationOperand,
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sourceOperand
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];
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return true;
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}
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}
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@ -297,6 +297,10 @@ public class InstructionHandlerFactory
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_handlers.Add(new AddRm32R32Handler(_decoder)); // ADD r/m32, r32 (opcode 01)
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_handlers.Add(new AddEaxImmHandler(_decoder)); // ADD EAX, imm32 (opcode 05)
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// Add ADD register-to-register handlers (16-bit)
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_handlers.Add(new AddR16Rm16Handler(_decoder)); // ADD r16, r/m16 (opcode 03 with 0x66 prefix)
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_handlers.Add(new AddRm16R16Handler(_decoder)); // ADD r/m16, r16 (opcode 01 with 0x66 prefix)
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// Add ADD register-to-register handlers (8-bit)
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_handlers.Add(new AddRm8R8Handler(_decoder)); // ADD r/m8, r8 (opcode 00)
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_handlers.Add(new AddR8Rm8Handler(_decoder)); // ADD r8, r/m8 (opcode 02)
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@ -31,6 +31,6 @@ RawBytes;Instructions
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810488AA000000;[{ "Type": "Add", "Operands": ["dword ptr [eax+ecx*4]", "0xAA"] }]
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# Mixed addressing modes
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00A314285600;[{ "Type": "Add", "Operands": ["byte ptr [ebx+0x562814]", "ah"] }]
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6601B310203040;[{ "Type": "Add", "Operands": ["si", "word ptr [ebx+0x40302010]"] }]
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030C8D10203040;[{ "Type": "Add", "Operands": ["ecx", "dword ptr [ebp*4+0x40302010]"] }]
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00A314285600;[{ "Type": "Add", "Operands": ["byte ptr [ebx+0x00562814]", "ah"] }]
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6601B310203040;[{ "Type": "Add", "Operands": ["word ptr [ebx+0x40302010]", "si"] }]
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030C8D10203040;[{ "Type": "Add", "Operands": ["ecx", "dword ptr [ecx*4+0x40302010]"] }]
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