new handlers and test fixes

X86Disassembler/X86/Handlers/Div/DivRm32Handler.cs

@@ -1,6 +1,6 @@
 using X86Disassembler.X86.Operands;
 
-namespace X86Disassembler.X86.Handlers.ArithmeticUnary;
+namespace X86Disassembler.X86.Handlers.Div;
 
 /// <summary>
 /// Handler for DIV r/m32 instruction (0xF7 /6)

X86Disassembler/X86/Handlers/Div/DivRm8Handler.cs

@@ -1,17 +1,17 @@
 using X86Disassembler.X86.Operands;
 
-namespace X86Disassembler.X86.Handlers.ArithmeticUnary;
+namespace X86Disassembler.X86.Handlers.Div;
 
 /// <summary>
-/// Handler for MUL r/m32 instruction (0xF7 /4)
+/// Handler for DIV r/m8 instruction (0xF6 /6)
 /// </summary>
-public class MulRm32Handler : InstructionHandler
+public class DivRm8Handler : InstructionHandler
 {
     /// <summary>
-    /// Initializes a new instance of the MulRm32Handler class
+    /// Initializes a new instance of the DivRm8Handler class
     /// </summary>
     /// <param name="decoder">The instruction decoder that owns this handler</param>
-    public MulRm32Handler(InstructionDecoder decoder)
+    public DivRm8Handler(InstructionDecoder decoder)
         : base(decoder)
     {
     }
@@ -23,20 +23,20 @@ public class MulRm32Handler : InstructionHandler
     /// <returns>True if this handler can decode the opcode</returns>
     public override bool CanHandle(byte opcode)
     {
-        if (opcode != 0xF7)
+        if (opcode != 0xF6)
             return false;
 
-        // Check if the reg field of the ModR/M byte is 4 (MUL)
+        // Check if the reg field of the ModR/M byte is 6 (DIV)
         if (!Decoder.CanReadByte())
             return false;
 
         var reg = ModRMDecoder.PeakModRMReg();
 
-        return reg == 4; // 4 = MUL
+        return reg == 6; // 6 = DIV
     }
 
     /// <summary>
-    /// Decodes a MUL r/m32 instruction
+    /// Decodes a DIV r/m8 instruction
     /// </summary>
     /// <param name="opcode">The opcode of the instruction</param>
     /// <param name="instruction">The instruction object to populate</param>
@@ -44,7 +44,7 @@ public class MulRm32Handler : InstructionHandler
     public override bool Decode(byte opcode, Instruction instruction)
     {
         // Set the instruction type
-        instruction.Type = InstructionType.Mul;
+        instruction.Type = InstructionType.Div;
 
         if (!Decoder.CanReadByte())
         {
@@ -52,19 +52,19 @@ public class MulRm32Handler : InstructionHandler
         }
 
         // Read the ModR/M byte
-        // For MUL r/m32 (0xF7 /4):
+        // For DIV r/m8 (0xF6 /6):
         // - The r/m field with mod specifies the operand (register or memory)
-        var (_, reg, _, operand) = ModRMDecoder.ReadModRM();
+        var (_, reg, _, operand) = ModRMDecoder.ReadModRM8();
         
-        // Verify this is a MUL instruction
+        // Verify this is a DIV instruction
-        // The reg field should be 4 (MUL), which maps to RegisterIndex.Sp in our enum
+        // The reg field should be 6 (DIV), which maps to RegisterIndex8.DH in our enum
-        if (reg != RegisterIndex.Sp)
+        if (reg != RegisterIndex8.DH)
         {
             return false;
         }
 
         // Set the structured operands
-        // MUL has only one operand
+        // DIV has only one operand
         instruction.StructuredOperands = 
         [
             operand

X86Disassembler/X86/Handlers/Idiv/IdivRm32Handler.cs

@@ -1,6 +1,6 @@
 using X86Disassembler.X86.Operands;
 
-namespace X86Disassembler.X86.Handlers.ArithmeticUnary;
+namespace X86Disassembler.X86.Handlers.Idiv;
 
 /// <summary>
 /// Handler for IDIV r/m32 instruction (0xF7 /7)
@@ -54,14 +54,7 @@ public class IdivRm32Handler : InstructionHandler
         // Read the ModR/M byte
         // For IDIV r/m32 (0xF7 /7):
         // - The r/m field with mod specifies the operand (register or memory)
-        var (_, reg, _, operand) = ModRMDecoder.ReadModRM();
+        var (_, _, _, operand) = ModRMDecoder.ReadModRM();
-        
-        // Verify this is an IDIV instruction
-        // The reg field should be 7 (IDIV)
-        if (reg != RegisterIndex.Di)
-        {
-            return false;
-        }
 
         // Set the structured operands
         // IDIV has only one operand

X86Disassembler/X86/Handlers/Idiv/IdivRm8Handler.cs

@@ -0,0 +1,68 @@
+using X86Disassembler.X86.Operands;
+
+namespace X86Disassembler.X86.Handlers.Idiv;
+
+/// <summary>
+/// Handler for IDIV r/m8 instruction (0xF6 /7)
+/// </summary>
+public class IdivRm8Handler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the IdivRm8Handler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public IdivRm8Handler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        if (opcode != 0xF6)
+            return false;
+
+        // Check if the reg field of the ModR/M byte is 7 (IDIV)
+        if (!Decoder.CanReadByte())
+            return false;
+
+        var reg = ModRMDecoder.PeakModRMReg();
+
+        return reg == 7; // 7 = IDIV
+    }
+
+    /// <summary>
+    /// Decodes an IDIV r/m8 instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        // Set the instruction type
+        instruction.Type = InstructionType.IDiv;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        // For IDIV r/m8 (0xF6 /7):
+        // - The r/m field with mod specifies the operand (register or memory)
+        var (_, _, _, operand) = ModRMDecoder.ReadModRM8();
+
+        // Set the structured operands
+        // IDIV has only one operand
+        instruction.StructuredOperands = 
+        [
+            operand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/Imul/ImulRm32Handler.cs

@@ -1,6 +1,6 @@
 using X86Disassembler.X86.Operands;
 
-namespace X86Disassembler.X86.Handlers.ArithmeticUnary;
+namespace X86Disassembler.X86.Handlers.Imul;
 
 /// <summary>
 /// Handler for IMUL r/m32 instruction (0xF7 /5)
@@ -54,14 +54,7 @@ public class ImulRm32Handler : InstructionHandler
         // Read the ModR/M byte
         // For IMUL r/m32 (0xF7 /5):
         // - The r/m field with mod specifies the operand (register or memory)
-        var (_, reg, _, operand) = ModRMDecoder.ReadModRM();
+        var (_, _, _, operand) = ModRMDecoder.ReadModRM();
-        
-        // Verify this is an IMUL instruction
-        // The reg field should be 5 (IMUL), which maps to RegisterIndex.Bp in our enum
-        if (reg != RegisterIndex.Bp)
-        {
-            return false;
-        }
         
         // Set the structured operands
         // IMUL has only one operand

X86Disassembler/X86/Handlers/Imul/ImulRm8Handler.cs

@@ -0,0 +1,68 @@
+using X86Disassembler.X86.Operands;
+
+namespace X86Disassembler.X86.Handlers.Imul;
+
+/// <summary>
+/// Handler for IMUL r/m8 instruction (0xF6 /5)
+/// </summary>
+public class ImulRm8Handler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the ImulRm8Handler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public ImulRm8Handler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        if (opcode != 0xF6)
+            return false;
+
+        // Check if the reg field of the ModR/M byte is 5 (IMUL)
+        if (!Decoder.CanReadByte())
+            return false;
+
+        var reg = ModRMDecoder.PeakModRMReg();
+
+        return reg == 5; // 5 = IMUL
+    }
+
+    /// <summary>
+    /// Decodes an IMUL r/m8 instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        // Set the instruction type
+        instruction.Type = InstructionType.IMul;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        // For IMUL r/m8 (0xF6 /5):
+        // - The r/m field with mod specifies the operand (register or memory)
+        var (_, _, _, operand) = ModRMDecoder.ReadModRM8();
+        
+        // Set the structured operands
+        // IMUL has only one operand
+        instruction.StructuredOperands = 
+        [
+            operand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/InstructionHandlerFactory.cs

@@ -1,11 +1,13 @@
 using X86Disassembler.X86.Handlers.Adc;
 using X86Disassembler.X86.Handlers.Add;
 using X86Disassembler.X86.Handlers.And;
-using X86Disassembler.X86.Handlers.ArithmeticUnary;
 using X86Disassembler.X86.Handlers.Call;
 using X86Disassembler.X86.Handlers.Cmp;
 using X86Disassembler.X86.Handlers.Dec;
+using X86Disassembler.X86.Handlers.Div;
 using X86Disassembler.X86.Handlers.FloatingPoint;
+using X86Disassembler.X86.Handlers.Idiv;
+using X86Disassembler.X86.Handlers.Imul;
 using X86Disassembler.X86.Handlers.Inc;
 using X86Disassembler.X86.Handlers.Jump;
 using X86Disassembler.X86.Handlers.Lea;
@@ -13,6 +15,7 @@ using X86Disassembler.X86.Handlers.Mov;
 using X86Disassembler.X86.Handlers.Mul;
 using X86Disassembler.X86.Handlers.Neg;
 using X86Disassembler.X86.Handlers.Nop;
+using X86Disassembler.X86.Handlers.Not;
 using X86Disassembler.X86.Handlers.Or;
 using X86Disassembler.X86.Handlers.Pop;
 using X86Disassembler.X86.Handlers.Push;
@@ -63,9 +66,13 @@ public class InstructionHandlerFactory
         RegisterArithmeticImmediateHandlers(); // Group 1 instructions (including 0x83)
         RegisterAddHandlers();
         RegisterAndHandlers();
-        RegisterArithmeticUnaryHandlers();
+        RegisterArithmeticUnaryHandlers(); // Empty, kept for consistency
         RegisterNegHandlers(); // Register NEG handlers
         RegisterMulHandlers(); // Register MUL handlers
+        RegisterNotHandlers(); // Register NOT handlers
+        RegisterImulHandlers(); // Register IMUL handlers
+        RegisterDivHandlers(); // Register DIV handlers
+        RegisterIdivHandlers(); // Register IDIV handlers
         RegisterCmpHandlers();
         RegisterXorHandlers();
         RegisterOrHandlers();
@@ -91,17 +98,7 @@ public class InstructionHandlerFactory
     /// </summary>
     private void RegisterArithmeticUnaryHandlers()
     {
-        // NOT handler
+        // This method is kept for consistency, but all handlers have been moved to their own namespaces
-        _handlers.Add(new NotRm32Handler(_decoder));
-
-        // IMUL handler
-        _handlers.Add(new ImulRm32Handler(_decoder));
-
-        // DIV handler
-        _handlers.Add(new DivRm32Handler(_decoder));
-
-        // IDIV handler
-        _handlers.Add(new IdivRm32Handler(_decoder));
     }
 
     /// <summary>
@@ -462,6 +459,54 @@ public class InstructionHandlerFactory
         _handlers.Add(new MulRm32Handler(_decoder));
     }
 
+    /// <summary>
+    /// Registers all NOT instruction handlers
+    /// </summary>
+    private void RegisterNotHandlers()
+    {
+        // NOT r/m8 handler (F6 /2)
+        _handlers.Add(new NotRm8Handler(_decoder));
+
+        // NOT r/m32 handler (F7 /2)
+        _handlers.Add(new NotRm32Handler(_decoder));
+    }
+
+    /// <summary>
+    /// Registers all IMUL instruction handlers
+    /// </summary>
+    private void RegisterImulHandlers()
+    {
+        // IMUL r/m8 handler (F6 /5)
+        _handlers.Add(new ImulRm8Handler(_decoder));
+
+        // IMUL r/m32 handler (F7 /5)
+        _handlers.Add(new ImulRm32Handler(_decoder));
+    }
+
+    /// <summary>
+    /// Registers all DIV instruction handlers
+    /// </summary>
+    private void RegisterDivHandlers()
+    {
+        // DIV r/m8 handler (F6 /6)
+        _handlers.Add(new DivRm8Handler(_decoder));
+
+        // DIV r/m32 handler (F7 /6)
+        _handlers.Add(new DivRm32Handler(_decoder));
+    }
+
+    /// <summary>
+    /// Registers all IDIV instruction handlers
+    /// </summary>
+    private void RegisterIdivHandlers()
+    {
+        // IDIV r/m8 handler (F6 /7)
+        _handlers.Add(new IdivRm8Handler(_decoder));
+
+        // IDIV r/m32 handler (F7 /7)
+        _handlers.Add(new IdivRm32Handler(_decoder));
+    }
+
     /// <summary>
     /// Gets the handler that can decode the given opcode
     /// </summary>

X86Disassembler/X86/Handlers/Mov/MovRegImm32Handler.cs

@@ -49,10 +49,10 @@ public class MovRegImm32Handler : InstructionHandler
         uint imm32 = Decoder.ReadUInt32();
 
         // Create the destination register operand
-        var destinationOperand = OperandFactory.CreateRegisterOperand(reg, 32);
+        var destinationOperand = OperandFactory.CreateRegisterOperand(reg);
         
         // Create the source immediate operand
-        var sourceOperand = OperandFactory.CreateImmediateOperand(imm32, 32);
+        var sourceOperand = OperandFactory.CreateImmediateOperand(imm32);
         
         // Set the structured operands
         instruction.StructuredOperands = 

X86Disassembler/X86/Handlers/Mov/MovRegImm8Handler.cs

@@ -38,7 +38,7 @@ public class MovRegImm8Handler : InstructionHandler
         instruction.Type = InstructionType.Mov;
 
         // Register is encoded in the low 3 bits of the opcode
-        RegisterIndex reg = (RegisterIndex)(opcode & 0x07);
+        RegisterIndex8 reg = (RegisterIndex8)(opcode & 0x07);
 
         // Read the immediate value
         if (!Decoder.CanReadByte())
@@ -49,7 +49,7 @@ public class MovRegImm8Handler : InstructionHandler
         byte imm8 = Decoder.ReadByte();
 
         // Create the destination register operand
-        var destinationOperand = OperandFactory.CreateRegisterOperand(reg, 8);
+        var destinationOperand = OperandFactory.CreateRegisterOperand8(reg);
         
         // Create the source immediate operand
         var sourceOperand = OperandFactory.CreateImmediateOperand(imm8, 8);

X86Disassembler/X86/Handlers/Mov/MovRm32Imm32Handler.cs

@@ -23,7 +23,22 @@ public class MovRm32Imm32Handler : InstructionHandler
     /// <returns>True if this handler can decode the opcode</returns>
     public override bool CanHandle(byte opcode)
     {
-        return opcode == 0xC7;
+        if (opcode != 0xC7)
+        {
+            return false;
+        }
+
+        // Then check if we can peek at the ModR/M byte
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+        
+        // Peek at the ModR/M byte without advancing the position
+        var reg = ModRMDecoder.PeakModRMReg();
+        
+        // MOV r/m8, imm8 only uses reg=0
+        return reg == 0;
     }
 
     /// <summary>
@@ -38,13 +53,7 @@ public class MovRm32Imm32Handler : InstructionHandler
         instruction.Type = InstructionType.Mov;
         
         // Read the ModR/M byte
-        var (_, reg, _, destinationOperand) = ModRMDecoder.ReadModRM();
+        var (_, _, _, destinationOperand) = ModRMDecoder.ReadModRM();
-        
-        // MOV r/m32, imm32 only uses reg=0
-        if (reg != 0)
-        {
-            return false;
-        }
         
         // Check if we have enough bytes for the immediate value (4 bytes)
         if (!Decoder.CanReadUInt())
@@ -56,7 +65,7 @@ public class MovRm32Imm32Handler : InstructionHandler
         uint imm32 = Decoder.ReadUInt32();
         
         // Create the immediate operand
-        var sourceOperand = OperandFactory.CreateImmediateOperand(imm32, 32);
+        var sourceOperand = OperandFactory.CreateImmediateOperand(imm32);
         
         // Set the structured operands
         instruction.StructuredOperands = 

X86Disassembler/X86/Handlers/Mov/MovRm8Imm8Handler.cs

@@ -23,7 +23,23 @@ public class MovRm8Imm8Handler : InstructionHandler
     /// <returns>True if this handler can decode the opcode</returns>
     public override bool CanHandle(byte opcode)
     {
-        return opcode == 0xC6;
+        // First check if the opcode matches
+        if (opcode != 0xC6)
+        {
+            return false;
+        }
+        
+        // Then check if we can peek at the ModR/M byte
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+        
+        // Peek at the ModR/M byte without advancing the position
+        var reg = ModRMDecoder.PeakModRMReg();
+        
+        // MOV r/m8, imm8 only uses reg=0
+        return reg == 0;
     }
 
     /// <summary>
@@ -47,13 +63,7 @@ public class MovRm8Imm8Handler : InstructionHandler
         // For MOV r/m8, imm8 (0xC6):
         // - The r/m field with mod specifies the destination operand (register or memory)
         // - The immediate value is the source operand
-        var (_, reg, _, destinationOperand) = ModRMDecoder.ReadModRM8();
+        var (_, _, _, destinationOperand) = ModRMDecoder.ReadModRM8();
-        
-        // MOV r/m8, imm8 only uses reg=0
-        if (reg != 0)
-        {
-            return false;
-        }
 
         // Note: The operand size is already set to 8-bit by the ReadModRM8 method
         

X86Disassembler/X86/Handlers/Mul/MulRm32Handler.cs

@@ -54,14 +54,7 @@ public class MulRm32Handler : InstructionHandler
         // Read the ModR/M byte
         // For MUL r/m32 (0xF7 /4):
         // - The r/m field with mod specifies the operand (register or memory)
-        var (_, reg, _, operand) = ModRMDecoder.ReadModRM();
+        var (_, _, _, operand) = ModRMDecoder.ReadModRM();
-        
-        // Verify this is a MUL instruction
-        // The reg field should be 4 (MUL), which maps to RegisterIndex.Sp in our enum
-        if (reg != RegisterIndex.Sp)
-        {
-            return false;
-        }
 
         // Set the structured operands
         // MUL has only one operand

X86Disassembler/X86/Handlers/Mul/MulRm8Handler.cs

@@ -54,14 +54,7 @@ public class MulRm8Handler : InstructionHandler
         // Read the ModR/M byte
         // For MUL r/m8 (0xF6 /4):
         // - The r/m field with mod specifies the operand (register or memory)
-        var (_, reg, _, operand) = ModRMDecoder.ReadModRM8();
+        var (_, _, _, operand) = ModRMDecoder.ReadModRM8();
-        
-        // Verify this is a MUL instruction
-        // The reg field should be 4 (MUL), which maps to RegisterIndex8.AH in our enum
-        if (reg != RegisterIndex8.AH)
-        {
-            return false;
-        }
 
         // Set the structured operands
         // MUL has only one operand

X86Disassembler/X86/Handlers/Neg/NegRm32Handler.cs

@@ -1,6 +1,6 @@
 using X86Disassembler.X86.Operands;
 
-namespace X86Disassembler.X86.Handlers.ArithmeticUnary;
+namespace X86Disassembler.X86.Handlers.Neg;
 
 /// <summary>
 /// Handler for NEG r/m32 instruction (0xF7 /3)
@@ -54,14 +54,7 @@ public class NegRm32Handler : InstructionHandler
         // Read the ModR/M byte
         // For NEG r/m32 (0xF7 /3):
         // - The r/m field with mod specifies the operand (register or memory)
-        var (_, reg, _, operand) = ModRMDecoder.ReadModRM();
+        var (_, _, _, operand) = ModRMDecoder.ReadModRM();
-        
-        // Verify this is a NEG instruction
-        // The reg field should be 3 (NEG), which maps to RegisterIndex.B in our enum
-        if (reg != RegisterIndex.B)
-        {
-            return false;
-        }
 
         // Set the structured operands
         // NEG has only one operand

X86Disassembler/X86/Handlers/Neg/NegRm8Handler.cs

@@ -1,6 +1,6 @@
 using X86Disassembler.X86.Operands;
 
-namespace X86Disassembler.X86.Handlers.ArithmeticUnary;
+namespace X86Disassembler.X86.Handlers.Neg;
 
 /// <summary>
 /// Handler for NEG r/m8 instruction (0xF6 /3)
@@ -51,10 +51,7 @@ public class NegRm8Handler : InstructionHandler
             return false;
         }
 
-        // Read the ModR/M byte
+        var (_, _, _, operand) = ModRMDecoder.ReadModRM8();
-        // For NEG r/m8 (0xF6 /3):
-        // - The r/m field with mod specifies the operand (register or memory)
-        var (_, reg, _, operand) = ModRMDecoder.ReadModRM8();
 
         // Set the structured operands
         // NEG has only one operand

X86Disassembler/X86/Handlers/Not/NotRm32Handler.cs

@@ -1,6 +1,6 @@
 using X86Disassembler.X86.Operands;
 
-namespace X86Disassembler.X86.Handlers.ArithmeticUnary;
+namespace X86Disassembler.X86.Handlers.Not;
 
 /// <summary>
 /// Handler for NOT r/m32 instruction (0xF7 /2)
@@ -57,13 +57,6 @@ public class NotRm32Handler : InstructionHandler
         // - The r/m field with mod specifies the operand (register or memory)
         var (_, reg, _, operand) = ModRMDecoder.ReadModRM();
 
-        // Verify this is a NOT instruction
-        // The reg field should be 2 (NOT), which maps to RegisterIndex.D in our enum
-        if (reg != RegisterIndex.D)
-        {
-            return false;
-        }
-
         // Set the structured operands
         // NOT has only one operand
         instruction.StructuredOperands = 

X86Disassembler/X86/Handlers/Not/NotRm8Handler.cs

@@ -0,0 +1,69 @@
+using X86Disassembler.X86.Operands;
+
+namespace X86Disassembler.X86.Handlers.Not;
+
+/// <summary>
+/// Handler for NOT r/m8 instruction (0xF6 /2)
+/// </summary>
+public class NotRm8Handler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the NotRm8Handler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public NotRm8Handler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // This handler only handles opcode 0xF6
+        if (opcode != 0xF6)
+            return false;
+
+        // Check if the reg field of the ModR/M byte is 2 (NOT)
+        if (!Decoder.CanReadByte())
+            return false;
+
+        var reg = ModRMDecoder.PeakModRMReg();
+
+        return reg == 2; // 2 = NOT
+    }
+
+    /// <summary>
+    /// Decodes a NOT r/m8 instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        // Set the instruction type
+        instruction.Type = InstructionType.Not;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        // For NOT r/m8 (0xF6 /2):
+        // - The r/m field with mod specifies the operand (register or memory)
+        var (_, reg, _, operand) = ModRMDecoder.ReadModRM8();
+
+        // Set the structured operands
+        // NOT has only one operand
+        instruction.StructuredOperands = 
+        [
+            operand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/SIBDecoder.cs

@@ -69,6 +69,7 @@ public class SIBDecoder
         {
             if (_decoder.CanReadUInt())
             {
+                // For other instructions, read the 32-bit displacement
                 uint disp32 = _decoder.ReadUInt32();
                 int scaleValue = 1 << scale; // 1, 2, 4, or 8
                 
@@ -83,7 +84,7 @@ public class SIBDecoder
                 return OperandFactory.CreateScaledIndexMemoryOperand(
                     index,
                     scaleValue,
-                    null,
+                    null,   // No base register
                     (int)disp32,
                     operandSize);
             }

X86DisassemblerTests/TestData/lea_tests.csv

@@ -13,7 +13,7 @@ RawBytes;Instructions
 # The correct encoding for "LEA eax, [ebp]" would be 8D4500 (with Mod=01 and a zero displacement).
 # 8D05;[{ "Type": "Lea", "Operands": ["eax", "dword ptr [ebp]"] }]
 # Adding the correct test case:
-8D4500;[{ "Type": "Lea", "Operands": ["eax", "dword ptr [ebp+0x0]"] }]
+8D4500;[{ "Type": "Lea", "Operands": ["eax", "dword ptr [ebp+0x00]"] }]
 
 8D06;[{ "Type": "Lea", "Operands": ["eax", "dword ptr [esi]"] }]
 8D07;[{ "Type": "Lea", "Operands": ["eax", "dword ptr [edi]"] }]

X86DisassemblerTests/TestData/neg_tests.csv

@@ -30,4 +30,4 @@ F618;[{ "Type": "Neg", "Operands": ["byte ptr [eax]"] }]
 F718;[{ "Type": "Neg", "Operands": ["dword ptr [eax]"] }]
 
 # This test case is correct, as it includes the required displacement
-F71C2510000000;[{ "Type": "Neg", "Operands": ["dword ptr [eax+0x10]"] }]
+F71C2510000000;[{ "Type": "Neg", "Operands": ["dword ptr [0x10]"] }]