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Implemented NOP instruction handlers for multi-byte NOP variants

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bird_egop
2025-04-13 18:00:26 +03:00
parent 032030169e
commit 8cf26060f2
5 changed files with 233 additions and 0 deletions
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29
X86DisassemblerTests/TestData/nop_tests.csv
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@ -1,2 +1,31 @@
# NOP instruction tests
# Format: RawBytes;Instructions
RawBytes;Instructions
# Basic NOP instruction (1-byte)
90;[{ "Mnemonic": "nop", "Operands": "" }]
# Multi-byte NOP instructions (used for alignment)
# 2-byte NOP
6690;[{ "Mnemonic": "nop", "Operands": "" }]
# 3-byte NOP (XCHG EAX, EAX)
0F1F00;[{ "Mnemonic": "nop", "Operands": "dword ptr [eax]" }]
# 4-byte NOP
0F1F4000;[{ "Mnemonic": "nop", "Operands": "dword ptr [eax+0x00]" }]
# 5-byte NOP
0F1F440000;[{ "Mnemonic": "nop", "Operands": "dword ptr [eax+eax]" }]
# 6-byte NOP
660F1F440000;[{ "Mnemonic": "nop", "Operands": "dword ptr [eax+eax]" }]
# 7-byte NOP
0F1F8000000000;[{ "Mnemonic": "nop", "Operands": "dword ptr [eax+0x00000000]" }]
# 8-byte NOP
0F1F840000000000;[{ "Mnemonic": "nop", "Operands": "dword ptr [eax+eax]" }]
# 9-byte NOP
660F1F840000000000;[{ "Mnemonic": "nop", "Operands": "dword ptr [eax+eax]" }]

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