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Code Issues Releases Activity

unbreak tests

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bird_egop
2025-04-14 23:08:52 +03:00
parent 685eeda03d
commit 9117830ff1
41 changed files with 3820 additions and 736 deletions
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53
X86DisassemblerTests/InstructionTests/SbbInstructionTests.cs
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@ -1,4 +1,5 @@
using X86Disassembler.X86;
using X86Disassembler.X86.Operands;
namespace X86DisassemblerTests.InstructionTests;
@ -17,15 +18,33 @@ public class SbbInstructionTests
// SBB EAX, 0x12345678 (81 D8 78 56 34 12) - ModR/M byte D8 = 11 011 000 (mod=3, reg=3, rm=0)
// mod=3 means direct register addressing, reg=3 is the SBB opcode extension, rm=0 is EAX
byte[] codeBuffer = new byte[] { 0x81, 0xD8, 0x78, 0x56, 0x34, 0x12 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
var disassembler = new Disassembler(codeBuffer, 0);
// Act
var instruction = decoder.DecodeInstruction();
var instructions = disassembler.Disassemble();
// Assert
Assert.Single(instructions);
var instruction = instructions[0];
Assert.NotNull(instruction);
Assert.Equal("sbb", instruction.Mnemonic);
Assert.Equal("eax, 0x12345678", instruction.Operands);
Assert.Equal(InstructionType.Sbb, instruction.Type);
// Check that we have two operands
Assert.Equal(2, instruction.StructuredOperands.Count);
// Check the first operand (EAX)
var eaxOperand = instruction.StructuredOperands[0];
Assert.IsType<RegisterOperand>(eaxOperand);
var registerOperand = (RegisterOperand)eaxOperand;
Assert.Equal(RegisterIndex.A, registerOperand.Register);
Assert.Equal(32, registerOperand.Size); // Validate that it's a 32-bit register (EAX)
// Check the second operand (immediate value)
var immOperand = instruction.StructuredOperands[1];
Assert.IsType<ImmediateOperand>(immOperand);
var immediateOperand = (ImmediateOperand)immOperand;
Assert.Equal(0x12345678U, immediateOperand.Value);
Assert.Equal(32, immediateOperand.Size); // Validate that it's a 32-bit immediate
}
/// <summary>
@ -38,14 +57,32 @@ public class SbbInstructionTests
// SBB EAX, 0x42 (83 D8 42) - ModR/M byte D8 = 11 011 000 (mod=3, reg=3, rm=0)
// mod=3 means direct register addressing, reg=3 is the SBB opcode extension, rm=0 is EAX
byte[] codeBuffer = new byte[] { 0x83, 0xD8, 0x42 };
var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
var disassembler = new Disassembler(codeBuffer, 0);
// Act
var instruction = decoder.DecodeInstruction();
var instructions = disassembler.Disassemble();
// Assert
Assert.Single(instructions);
var instruction = instructions[0];
Assert.NotNull(instruction);
Assert.Equal("sbb", instruction.Mnemonic);
Assert.Equal("eax, 0x00000042", instruction.Operands);
Assert.Equal(InstructionType.Sbb, instruction.Type);
// Check that we have two operands
Assert.Equal(2, instruction.StructuredOperands.Count);
// Check the first operand (EAX)
var eaxOperand = instruction.StructuredOperands[0];
Assert.IsType<RegisterOperand>(eaxOperand);
var registerOperand = (RegisterOperand)eaxOperand;
Assert.Equal(RegisterIndex.A, registerOperand.Register);
Assert.Equal(32, registerOperand.Size); // Validate that it's a 32-bit register (EAX)
// Check the second operand (immediate value)
var immOperand = instruction.StructuredOperands[1];
Assert.IsType<ImmediateOperand>(immOperand);
var immediateOperand = (ImmediateOperand)immOperand;
Assert.Equal(0x00000042U, immediateOperand.Value);
Assert.Equal(32, immediateOperand.Size); // Validate that it's a 32-bit immediate
}
}