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Refactor floating point handlers to use ReadModRMFpu method
This commit is contained in:
parent
df453b930f
commit
963248dca0
@ -0,0 +1,91 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint;
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using Operands;
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/// <summary>
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/// Handler for FADD float32 instruction (D8 /0)
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/// </summary>
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public class FaddFloat32Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FaddFloat32Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FaddFloat32Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FADD is D8 /0
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if (opcode != 0xD8) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 0
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 0;
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}
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/// <summary>
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/// Decodes a FADD float32 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Verify reg field is 0 (FADD)
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if (reg != 0)
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{
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return false;
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}
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// Set the instruction type
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instruction.Type = InstructionType.Fadd;
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// For memory operands, set the operand
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM
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instruction.StructuredOperands =
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[
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rawOperand
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];
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}
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else // Register operand (ST(i))
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{
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// For register operands, we need to handle the stack registers
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var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
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// Set the structured operands
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instruction.StructuredOperands =
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[
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st0Operand,
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stiOperand
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];
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}
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return true;
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}
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}
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@ -0,0 +1,91 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint;
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using Operands;
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/// <summary>
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/// Handler for FADD float64 instruction (DC /0)
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/// </summary>
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public class FaddFloat64Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FaddFloat64Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FaddFloat64Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FADD is DC /0
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if (opcode != 0xDC) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 0
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 0;
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}
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/// <summary>
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/// Decodes a FADD float64 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Verify reg field is 0 (FADD)
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if (reg != 0)
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{
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return false;
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}
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// Set the instruction type
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instruction.Type = InstructionType.Fadd;
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// For memory operands, set the operand
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM64
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instruction.StructuredOperands =
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[
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rawOperand
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];
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}
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else // Register operand (ST(i))
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{
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// For DC C0-DC FF, the operands are reversed: ST(i), ST(0)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
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var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
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// Set the structured operands
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instruction.StructuredOperands =
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[
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stiOperand,
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st0Operand
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];
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}
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return true;
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}
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}
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@ -0,0 +1,85 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint;
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using Operands;
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/// <summary>
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/// Handler for FCOM float32 instruction (D8 /2)
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/// </summary>
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public class FcomFloat32Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FcomFloat32Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FcomFloat32Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FCOM is D8 /2
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if (opcode != 0xD8) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 2
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 2;
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}
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/// <summary>
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/// Decodes a FCOM float32 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Set the instruction type
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instruction.Type = InstructionType.Fcom;
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// For memory operands, set the operand
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM
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instruction.StructuredOperands =
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[
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rawOperand
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];
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}
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else // Register operand (ST(i))
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{
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// For register operands, we need to handle the stack registers
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var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
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// Set the structured operands
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instruction.StructuredOperands =
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[
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st0Operand,
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stiOperand
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];
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}
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return true;
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}
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}
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@ -0,0 +1,85 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint;
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using Operands;
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/// <summary>
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/// Handler for FCOMP float32 instruction (D8 /3)
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/// </summary>
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public class FcompFloat32Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FcompFloat32Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FcompFloat32Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FCOMP is D8 /3
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if (opcode != 0xD8) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 3
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 3;
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}
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/// <summary>
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/// Decodes a FCOMP float32 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Set the instruction type
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instruction.Type = InstructionType.Fcomp;
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// For memory operands, set the operand
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if (mod != 3) // Memory operand
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{
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// Set the structured operands - the operand already has the correct size from ReadModRM
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instruction.StructuredOperands =
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[
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rawOperand
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];
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}
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else // Register operand (ST(i))
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{
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// For register operands, we need to handle the stack registers
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var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
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var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
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// Set the structured operands
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instruction.StructuredOperands =
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[
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st0Operand,
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stiOperand
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];
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}
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return true;
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}
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}
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@ -0,0 +1,85 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint;
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using Operands;
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/// <summary>
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/// Handler for FDIV float32 instruction (D8 /6)
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/// </summary>
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public class FdivFloat32Handler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FdivFloat32Handler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FdivFloat32Handler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FDIV is D8 /6
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if (opcode != 0xD8) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 6
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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return reg == 6;
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}
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/// <summary>
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/// Decodes a FDIV float32 instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte using the specialized FPU method
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var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
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// Set the instruction type
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instruction.Type = InstructionType.Fdiv;
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// For memory operands, set the operand
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if (mod != 3) // Memory operand
|
||||||
|
{
|
||||||
|
// Set the structured operands - the operand already has the correct size from ReadModRM
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
rawOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
else // Register operand (ST(i))
|
||||||
|
{
|
||||||
|
// For register operands, we need to handle the stack registers
|
||||||
|
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
|
||||||
|
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
st0Operand,
|
||||||
|
stiOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,85 @@
|
|||||||
|
namespace X86Disassembler.X86.Handlers.FloatingPoint;
|
||||||
|
|
||||||
|
using Operands;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Handler for FDIVR float32 instruction (D8 /7)
|
||||||
|
/// </summary>
|
||||||
|
public class FdivrFloat32Handler : InstructionHandler
|
||||||
|
{
|
||||||
|
/// <summary>
|
||||||
|
/// Initializes a new instance of the FdivrFloat32Handler class
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||||
|
public FdivrFloat32Handler(InstructionDecoder decoder)
|
||||||
|
: base(decoder)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Checks if this handler can decode the given opcode
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode to check</param>
|
||||||
|
/// <returns>True if this handler can decode the opcode</returns>
|
||||||
|
public override bool CanHandle(byte opcode)
|
||||||
|
{
|
||||||
|
// FDIVR is D8 /7
|
||||||
|
if (opcode != 0xD8) return false;
|
||||||
|
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check if the ModR/M byte has reg field = 7
|
||||||
|
byte modRm = Decoder.PeakByte();
|
||||||
|
byte reg = (byte)((modRm >> 3) & 0x7);
|
||||||
|
|
||||||
|
return reg == 7;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Decodes a FDIVR float32 instruction
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode of the instruction</param>
|
||||||
|
/// <param name="instruction">The instruction object to populate</param>
|
||||||
|
/// <returns>True if the instruction was successfully decoded</returns>
|
||||||
|
public override bool Decode(byte opcode, Instruction instruction)
|
||||||
|
{
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read the ModR/M byte using the specialized FPU method
|
||||||
|
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
|
||||||
|
|
||||||
|
// Set the instruction type
|
||||||
|
instruction.Type = InstructionType.Fdivr;
|
||||||
|
|
||||||
|
// For memory operands, set the operand
|
||||||
|
if (mod != 3) // Memory operand
|
||||||
|
{
|
||||||
|
// Set the structured operands - the operand already has the correct size from ReadModRM
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
rawOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
else // Register operand (ST(i))
|
||||||
|
{
|
||||||
|
// For register operands, we need to handle the stack registers
|
||||||
|
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
|
||||||
|
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
st0Operand,
|
||||||
|
stiOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,89 @@
|
|||||||
|
namespace X86Disassembler.X86.Handlers.FloatingPoint;
|
||||||
|
|
||||||
|
using Operands;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Handler for FLD float32 instruction (D9 /0)
|
||||||
|
/// </summary>
|
||||||
|
public class FldFloat32Handler : InstructionHandler
|
||||||
|
{
|
||||||
|
/// <summary>
|
||||||
|
/// Initializes a new instance of the FldFloat32Handler class
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||||
|
public FldFloat32Handler(InstructionDecoder decoder)
|
||||||
|
: base(decoder)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Checks if this handler can decode the given opcode
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode to check</param>
|
||||||
|
/// <returns>True if this handler can decode the opcode</returns>
|
||||||
|
public override bool CanHandle(byte opcode)
|
||||||
|
{
|
||||||
|
// FLD is D9 /0
|
||||||
|
if (opcode != 0xD9) return false;
|
||||||
|
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check if the ModR/M byte has reg field = 0
|
||||||
|
byte modRm = Decoder.PeakByte();
|
||||||
|
byte reg = (byte)((modRm >> 3) & 0x7);
|
||||||
|
|
||||||
|
return reg == 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Decodes an FLD float32 instruction
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode of the instruction</param>
|
||||||
|
/// <param name="instruction">The instruction object to populate</param>
|
||||||
|
/// <returns>True if the instruction was successfully decoded</returns>
|
||||||
|
public override bool Decode(byte opcode, Instruction instruction)
|
||||||
|
{
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read the ModR/M byte using the specialized FPU method
|
||||||
|
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
|
||||||
|
|
||||||
|
// Verify reg field is 0 (FLD)
|
||||||
|
if (reg != 0)
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Set the instruction type
|
||||||
|
instruction.Type = InstructionType.Fld;
|
||||||
|
|
||||||
|
// Handle based on addressing mode
|
||||||
|
if (mod != 3) // Memory operand
|
||||||
|
{
|
||||||
|
// Set the structured operands - the operand already has the correct size from ReadModRM
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
rawOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
else // Register operand (ST(i))
|
||||||
|
{
|
||||||
|
// For register operands with mod=3, this is FLD ST(i)
|
||||||
|
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
stiOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,87 @@
|
|||||||
|
namespace X86Disassembler.X86.Handlers.FloatingPoint;
|
||||||
|
|
||||||
|
using Operands;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Handler for FMUL float32 instruction (D8 /1)
|
||||||
|
/// </summary>
|
||||||
|
public class FmulFloat32Handler : InstructionHandler
|
||||||
|
{
|
||||||
|
/// <summary>
|
||||||
|
/// Initializes a new instance of the FmulFloat32Handler class
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||||
|
public FmulFloat32Handler(InstructionDecoder decoder)
|
||||||
|
: base(decoder)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Checks if this handler can decode the given opcode
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode to check</param>
|
||||||
|
/// <returns>True if this handler can decode the opcode</returns>
|
||||||
|
public override bool CanHandle(byte opcode)
|
||||||
|
{
|
||||||
|
// FMUL is D8 /1
|
||||||
|
if (opcode != 0xD8) return false;
|
||||||
|
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check if the ModR/M byte has reg field = 1
|
||||||
|
byte modRm = Decoder.PeakByte();
|
||||||
|
byte reg = (byte)((modRm >> 3) & 0x7);
|
||||||
|
|
||||||
|
return reg == 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Decodes a FMUL float32 instruction
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode of the instruction</param>
|
||||||
|
/// <param name="instruction">The instruction object to populate</param>
|
||||||
|
/// <returns>True if the instruction was successfully decoded</returns>
|
||||||
|
public override bool Decode(byte opcode, Instruction instruction)
|
||||||
|
{
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read the ModR/M byte using the specialized FPU method
|
||||||
|
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
|
||||||
|
|
||||||
|
// Set the instruction type
|
||||||
|
instruction.Type = InstructionType.Fmul;
|
||||||
|
|
||||||
|
// For memory operands, set the operand
|
||||||
|
if (mod != 3) // Memory operand
|
||||||
|
{
|
||||||
|
// Set the structured operands - the operand already has the correct size from ReadModRM
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
rawOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
else // Register operand (ST(i))
|
||||||
|
{
|
||||||
|
// For register operands, we need to handle the stack registers
|
||||||
|
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
|
||||||
|
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
st0Operand,
|
||||||
|
stiOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,85 @@
|
|||||||
|
namespace X86Disassembler.X86.Handlers.FloatingPoint;
|
||||||
|
|
||||||
|
using Operands;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Handler for FMUL float64 instruction (DC /1)
|
||||||
|
/// </summary>
|
||||||
|
public class FmulFloat64Handler : InstructionHandler
|
||||||
|
{
|
||||||
|
/// <summary>
|
||||||
|
/// Initializes a new instance of the FmulFloat64Handler class
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||||
|
public FmulFloat64Handler(InstructionDecoder decoder)
|
||||||
|
: base(decoder)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Checks if this handler can decode the given opcode
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode to check</param>
|
||||||
|
/// <returns>True if this handler can decode the opcode</returns>
|
||||||
|
public override bool CanHandle(byte opcode)
|
||||||
|
{
|
||||||
|
// FMUL is DC /1
|
||||||
|
if (opcode != 0xDC) return false;
|
||||||
|
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check if the ModR/M byte has reg field = 1
|
||||||
|
byte modRm = Decoder.PeakByte();
|
||||||
|
byte reg = (byte)((modRm >> 3) & 0x7);
|
||||||
|
|
||||||
|
return reg == 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Decodes a FMUL float64 instruction
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode of the instruction</param>
|
||||||
|
/// <param name="instruction">The instruction object to populate</param>
|
||||||
|
/// <returns>True if the instruction was successfully decoded</returns>
|
||||||
|
public override bool Decode(byte opcode, Instruction instruction)
|
||||||
|
{
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read the ModR/M byte using the specialized FPU method
|
||||||
|
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
|
||||||
|
|
||||||
|
// Set the instruction type
|
||||||
|
instruction.Type = InstructionType.Fmul;
|
||||||
|
|
||||||
|
// For memory operands, set the operand
|
||||||
|
if (mod != 3) // Memory operand
|
||||||
|
{
|
||||||
|
// Set the structured operands - the operand already has the correct size from ReadModRM64
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
rawOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
else // Register operand (ST(i))
|
||||||
|
{
|
||||||
|
// For DC C0-DC FF, the operands are reversed: ST(i), ST(0)
|
||||||
|
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
||||||
|
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
stiOperand,
|
||||||
|
st0Operand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,83 @@
|
|||||||
|
namespace X86Disassembler.X86.Handlers.FloatingPoint;
|
||||||
|
|
||||||
|
using Operands;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Handler for FST float32 instruction (D9 /2)
|
||||||
|
/// </summary>
|
||||||
|
public class FstFloat32Handler : InstructionHandler
|
||||||
|
{
|
||||||
|
/// <summary>
|
||||||
|
/// Initializes a new instance of the FstFloat32Handler class
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||||
|
public FstFloat32Handler(InstructionDecoder decoder)
|
||||||
|
: base(decoder)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Checks if this handler can decode the given opcode
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode to check</param>
|
||||||
|
/// <returns>True if this handler can decode the opcode</returns>
|
||||||
|
public override bool CanHandle(byte opcode)
|
||||||
|
{
|
||||||
|
// FST is D9 /2
|
||||||
|
if (opcode != 0xD9) return false;
|
||||||
|
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check if the ModR/M byte has reg field = 2
|
||||||
|
byte modRm = Decoder.PeakByte();
|
||||||
|
byte reg = (byte)((modRm >> 3) & 0x7);
|
||||||
|
|
||||||
|
return reg == 2;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Decodes an FST float32 instruction
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode of the instruction</param>
|
||||||
|
/// <param name="instruction">The instruction object to populate</param>
|
||||||
|
/// <returns>True if the instruction was successfully decoded</returns>
|
||||||
|
public override bool Decode(byte opcode, Instruction instruction)
|
||||||
|
{
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read the ModR/M byte using the specialized FPU method
|
||||||
|
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
|
||||||
|
|
||||||
|
// Set the instruction type
|
||||||
|
instruction.Type = InstructionType.Fst;
|
||||||
|
|
||||||
|
// Handle based on addressing mode
|
||||||
|
if (mod != 3) // Memory operand
|
||||||
|
{
|
||||||
|
// Set the structured operands - the operand already has the correct size from ReadModRM
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
rawOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
else // Register operand (ST(i))
|
||||||
|
{
|
||||||
|
// For register operands with mod=3, this is FST ST(i)
|
||||||
|
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
stiOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,83 @@
|
|||||||
|
namespace X86Disassembler.X86.Handlers.FloatingPoint;
|
||||||
|
|
||||||
|
using Operands;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Handler for FSTP float32 instruction (D9 /3)
|
||||||
|
/// </summary>
|
||||||
|
public class FstpFloat32Handler : InstructionHandler
|
||||||
|
{
|
||||||
|
/// <summary>
|
||||||
|
/// Initializes a new instance of the FstpFloat32Handler class
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||||
|
public FstpFloat32Handler(InstructionDecoder decoder)
|
||||||
|
: base(decoder)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Checks if this handler can decode the given opcode
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode to check</param>
|
||||||
|
/// <returns>True if this handler can decode the opcode</returns>
|
||||||
|
public override bool CanHandle(byte opcode)
|
||||||
|
{
|
||||||
|
// FSTP is D9 /3
|
||||||
|
if (opcode != 0xD9) return false;
|
||||||
|
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check if the ModR/M byte has reg field = 3
|
||||||
|
byte modRm = Decoder.PeakByte();
|
||||||
|
byte reg = (byte)((modRm >> 3) & 0x7);
|
||||||
|
|
||||||
|
return reg == 3;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Decodes an FSTP float32 instruction
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode of the instruction</param>
|
||||||
|
/// <param name="instruction">The instruction object to populate</param>
|
||||||
|
/// <returns>True if the instruction was successfully decoded</returns>
|
||||||
|
public override bool Decode(byte opcode, Instruction instruction)
|
||||||
|
{
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read the ModR/M byte using the specialized FPU method
|
||||||
|
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
|
||||||
|
|
||||||
|
// Set the instruction type
|
||||||
|
instruction.Type = InstructionType.Fstp;
|
||||||
|
|
||||||
|
// Handle based on addressing mode
|
||||||
|
if (mod != 3) // Memory operand
|
||||||
|
{
|
||||||
|
// Set the structured operands - the operand already has the correct size from ReadModRM
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
rawOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
else // Register operand (ST(i))
|
||||||
|
{
|
||||||
|
// For register operands with mod=3, this is FSTP ST(i)
|
||||||
|
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
stiOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,85 @@
|
|||||||
|
namespace X86Disassembler.X86.Handlers.FloatingPoint;
|
||||||
|
|
||||||
|
using Operands;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Handler for FSUB float32 instruction (D8 /4)
|
||||||
|
/// </summary>
|
||||||
|
public class FsubFloat32Handler : InstructionHandler
|
||||||
|
{
|
||||||
|
/// <summary>
|
||||||
|
/// Initializes a new instance of the FsubFloat32Handler class
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||||
|
public FsubFloat32Handler(InstructionDecoder decoder)
|
||||||
|
: base(decoder)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Checks if this handler can decode the given opcode
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode to check</param>
|
||||||
|
/// <returns>True if this handler can decode the opcode</returns>
|
||||||
|
public override bool CanHandle(byte opcode)
|
||||||
|
{
|
||||||
|
// FSUB is D8 /4
|
||||||
|
if (opcode != 0xD8) return false;
|
||||||
|
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check if the ModR/M byte has reg field = 4
|
||||||
|
byte modRm = Decoder.PeakByte();
|
||||||
|
byte reg = (byte)((modRm >> 3) & 0x7);
|
||||||
|
|
||||||
|
return reg == 4;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Decodes a FSUB float32 instruction
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode of the instruction</param>
|
||||||
|
/// <param name="instruction">The instruction object to populate</param>
|
||||||
|
/// <returns>True if the instruction was successfully decoded</returns>
|
||||||
|
public override bool Decode(byte opcode, Instruction instruction)
|
||||||
|
{
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read the ModR/M byte using the specialized FPU method
|
||||||
|
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
|
||||||
|
|
||||||
|
// Set the instruction type
|
||||||
|
instruction.Type = InstructionType.Fsub;
|
||||||
|
|
||||||
|
// For memory operands, set the operand
|
||||||
|
if (mod != 3) // Memory operand
|
||||||
|
{
|
||||||
|
// Set the structured operands - the operand already has the correct size from ReadModRM
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
rawOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
else // Register operand (ST(i))
|
||||||
|
{
|
||||||
|
// For register operands, we need to handle the stack registers
|
||||||
|
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
|
||||||
|
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
st0Operand,
|
||||||
|
stiOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
@ -0,0 +1,85 @@
|
|||||||
|
namespace X86Disassembler.X86.Handlers.FloatingPoint;
|
||||||
|
|
||||||
|
using Operands;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Handler for FSUBR float32 instruction (D8 /5)
|
||||||
|
/// </summary>
|
||||||
|
public class FsubrFloat32Handler : InstructionHandler
|
||||||
|
{
|
||||||
|
/// <summary>
|
||||||
|
/// Initializes a new instance of the FsubrFloat32Handler class
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||||
|
public FsubrFloat32Handler(InstructionDecoder decoder)
|
||||||
|
: base(decoder)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Checks if this handler can decode the given opcode
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode to check</param>
|
||||||
|
/// <returns>True if this handler can decode the opcode</returns>
|
||||||
|
public override bool CanHandle(byte opcode)
|
||||||
|
{
|
||||||
|
// FSUBR is D8 /5
|
||||||
|
if (opcode != 0xD8) return false;
|
||||||
|
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Check if the ModR/M byte has reg field = 5
|
||||||
|
byte modRm = Decoder.PeakByte();
|
||||||
|
byte reg = (byte)((modRm >> 3) & 0x7);
|
||||||
|
|
||||||
|
return reg == 5;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Decodes a FSUBR float32 instruction
|
||||||
|
/// </summary>
|
||||||
|
/// <param name="opcode">The opcode of the instruction</param>
|
||||||
|
/// <param name="instruction">The instruction object to populate</param>
|
||||||
|
/// <returns>True if the instruction was successfully decoded</returns>
|
||||||
|
public override bool Decode(byte opcode, Instruction instruction)
|
||||||
|
{
|
||||||
|
if (!Decoder.CanReadByte())
|
||||||
|
{
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read the ModR/M byte using the specialized FPU method
|
||||||
|
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
|
||||||
|
|
||||||
|
// Set the instruction type
|
||||||
|
instruction.Type = InstructionType.Fsubr;
|
||||||
|
|
||||||
|
// For memory operands, set the operand
|
||||||
|
if (mod != 3) // Memory operand
|
||||||
|
{
|
||||||
|
// Set the structured operands - the operand already has the correct size from ReadModRM
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
rawOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
else // Register operand (ST(i))
|
||||||
|
{
|
||||||
|
// For register operands, we need to handle the stack registers
|
||||||
|
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
|
||||||
|
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
|
||||||
|
|
||||||
|
// Set the structured operands
|
||||||
|
instruction.StructuredOperands =
|
||||||
|
[
|
||||||
|
st0Operand,
|
||||||
|
stiOperand
|
||||||
|
];
|
||||||
|
}
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
@ -373,13 +373,35 @@ public class InstructionHandlerFactory
|
|||||||
/// </summary>
|
/// </summary>
|
||||||
private void RegisterFloatingPointHandlers()
|
private void RegisterFloatingPointHandlers()
|
||||||
{
|
{
|
||||||
// Add Floating Point handlers
|
// Add specialized Floating Point handlers
|
||||||
_handlers.Add(new FnstswHandler(_decoder)); // FSTSW (opcode DF /7)
|
|
||||||
_handlers.Add(new Float32OperationHandler(_decoder)); // Floating Point operations on 32-bit values
|
// D8 opcode handlers (float32 operations)
|
||||||
_handlers.Add(new LoadStoreControlHandler(_decoder)); // Load and store control words (opcode D9 /0)
|
_handlers.Add(new FaddFloat32Handler(_decoder)); // FADD float32 (D8 /0)
|
||||||
|
_handlers.Add(new FmulFloat32Handler(_decoder)); // FMUL float32 (D8 /1)
|
||||||
|
_handlers.Add(new FcomFloat32Handler(_decoder)); // FCOM float32 (D8 /2)
|
||||||
|
_handlers.Add(new FcompFloat32Handler(_decoder)); // FCOMP float32 (D8 /3)
|
||||||
|
_handlers.Add(new FsubFloat32Handler(_decoder)); // FSUB float32 (D8 /4)
|
||||||
|
_handlers.Add(new FsubrFloat32Handler(_decoder)); // FSUBR float32 (D8 /5)
|
||||||
|
_handlers.Add(new FdivFloat32Handler(_decoder)); // FDIV float32 (D8 /6)
|
||||||
|
_handlers.Add(new FdivrFloat32Handler(_decoder)); // FDIVR float32 (D8 /7)
|
||||||
|
|
||||||
|
// D9 opcode handlers (load/store float32 and control operations)
|
||||||
|
_handlers.Add(new FldFloat32Handler(_decoder)); // FLD float32 (D9 /0)
|
||||||
|
_handlers.Add(new FstFloat32Handler(_decoder)); // FST float32 (D9 /2)
|
||||||
|
_handlers.Add(new FstpFloat32Handler(_decoder)); // FSTP float32 (D9 /3)
|
||||||
|
|
||||||
|
// DC opcode handlers (float64 operations)
|
||||||
|
_handlers.Add(new FaddFloat64Handler(_decoder)); // FADD float64 (DC /0)
|
||||||
|
_handlers.Add(new FmulFloat64Handler(_decoder)); // FMUL float64 (DC /1)
|
||||||
|
|
||||||
|
// Other floating point handlers
|
||||||
|
_handlers.Add(new FnstswHandler(_decoder)); // FNSTSW AX (DF E0)
|
||||||
|
|
||||||
|
// Keep the existing handlers for operations not yet migrated to specialized handlers
|
||||||
|
_handlers.Add(new LoadStoreControlHandler(_decoder)); // Load and store control words (D9 /4-/7)
|
||||||
_handlers.Add(new Int32OperationHandler(_decoder)); // Integer operations on 32-bit values
|
_handlers.Add(new Int32OperationHandler(_decoder)); // Integer operations on 32-bit values
|
||||||
_handlers.Add(new LoadStoreInt32Handler(_decoder)); // Load and store 32-bit values
|
_handlers.Add(new LoadStoreInt32Handler(_decoder)); // Load and store 32-bit values
|
||||||
_handlers.Add(new Float64OperationHandler(_decoder)); // Floating Point operations on 64-bit values
|
_handlers.Add(new Float64OperationHandler(_decoder)); // Remaining float64 operations
|
||||||
_handlers.Add(new LoadStoreFloat64Handler(_decoder)); // Load and store 64-bit values
|
_handlers.Add(new LoadStoreFloat64Handler(_decoder)); // Load and store 64-bit values
|
||||||
_handlers.Add(new Int16OperationHandler(_decoder)); // Integer operations on 16-bit values
|
_handlers.Add(new Int16OperationHandler(_decoder)); // Integer operations on 16-bit values
|
||||||
_handlers.Add(new LoadStoreInt16Handler(_decoder)); // Load and store 16-bit values
|
_handlers.Add(new LoadStoreInt16Handler(_decoder)); // Load and store 16-bit values
|
||||||
|
@ -206,6 +206,20 @@ public class ModRMDecoder
|
|||||||
/// <returns>A tuple containing the mod, reg, rm fields and the decoded operand</returns>
|
/// <returns>A tuple containing the mod, reg, rm fields and the decoded operand</returns>
|
||||||
public (byte mod, RegisterIndex reg, RegisterIndex rm, Operand operand) ReadModRM64() => ReadModRMInternal(true);
|
public (byte mod, RegisterIndex reg, RegisterIndex rm, Operand operand) ReadModRM64() => ReadModRMInternal(true);
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Reads and decodes a ModR/M byte for FPU instructions
|
||||||
|
/// </summary>
|
||||||
|
/// <returns>A tuple containing the mod, reg, rm fields (with rm as FpuRegisterIndex) and the decoded operand</returns>
|
||||||
|
public (byte mod, RegisterIndex reg, FpuRegisterIndex fpuRm, Operand operand) ReadModRMFpu()
|
||||||
|
{
|
||||||
|
var (mod, reg, rm, operand) = ReadModRMInternal(false);
|
||||||
|
|
||||||
|
// Convert the RegisterIndex rm to FpuRegisterIndex
|
||||||
|
FpuRegisterIndex fpuRm = (FpuRegisterIndex)(int)rm;
|
||||||
|
|
||||||
|
return (mod, reg, fpuRm, operand);
|
||||||
|
}
|
||||||
|
|
||||||
/// <summary>
|
/// <summary>
|
||||||
/// Reads and decodes a ModR/M byte for 8-bit operands
|
/// Reads and decodes a ModR/M byte for 8-bit operands
|
||||||
/// </summary>
|
/// </summary>
|
||||||
|
Loading…
x
Reference in New Issue
Block a user