Added comprehensive test coverage for arithmetic and logical instructions. Implemented AND instruction handlers and added tests for ADC, SBB, and arithmetic unary operations.

X86DisassemblerTests/AdcInstructionTests.cs

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+namespace X86DisassemblerTests;
+
+using System;
+using Xunit;
+using X86Disassembler.X86;
+
+/// <summary>
+/// Tests for ADC (Add with Carry) instruction handlers
+/// </summary>
+public class AdcInstructionTests
+{
+    /// <summary>
+    /// Tests the AdcImmToRm32Handler for decoding ADC r/m32, imm32 instruction
+    /// </summary>
+    [Fact]
+    public void AdcImmToRm32Handler_DecodesAdcRm32Imm32_Correctly()
+    {
+        // Arrange
+        // ADC EAX, 0x12345678 (81 D0 78 56 34 12) - ModR/M byte D0 = 11 010 000 (mod=3, reg=2, rm=0)
+        // mod=3 means direct register addressing, reg=2 is the ADC opcode extension, rm=0 is EAX
+        byte[] codeBuffer = new byte[] { 0x81, 0xD0, 0x78, 0x56, 0x34, 0x12 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("adc", instruction.Mnemonic);
+        Assert.Equal("eax, 0x12345678", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the AdcImmToRm32SignExtendedHandler for decoding ADC r/m32, imm8 instruction
+    /// </summary>
+    [Fact]
+    public void AdcImmToRm32SignExtendedHandler_DecodesAdcRm32Imm8_Correctly()
+    {
+        // Arrange
+        // ADC EAX, 0x42 (83 D0 42) - ModR/M byte D0 = 11 010 000 (mod=3, reg=2, rm=0)
+        // mod=3 means direct register addressing, reg=2 is the ADC opcode extension, rm=0 is EAX
+        byte[] codeBuffer = new byte[] { 0x83, 0xD0, 0x42 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("adc", instruction.Mnemonic);
+        Assert.Equal("eax, 0x00000042", instruction.Operands);
+    }
+}

X86DisassemblerTests/AndInstructionTests.cs

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+namespace X86DisassemblerTests;
+
+using System;
+using Xunit;
+using X86Disassembler.X86;
+
+/// <summary>
+/// Tests for AND instruction handlers
+/// </summary>
+public class AndInstructionTests
+{
+    /// <summary>
+    /// Tests the AndImmWithRm32Handler for decoding AND r/m32, imm32 instruction
+    /// </summary>
+    [Fact]
+    public void AndImmWithRm32Handler_DecodesAndRm32Imm32_Correctly()
+    {
+        // Arrange
+        // AND EAX, 0x12345678 (81 E0 78 56 34 12) - ModR/M byte E0 = 11 100 000 (mod=3, reg=4, rm=0)
+        // mod=3 means direct register addressing, reg=4 is the AND opcode extension, rm=0 is EAX
+        byte[] codeBuffer = new byte[] { 0x81, 0xE0, 0x78, 0x56, 0x34, 0x12 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("and", instruction.Mnemonic);
+        Assert.Equal("eax, 0x12345678", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the AndImmWithRm32SignExtendedHandler for decoding AND r/m32, imm8 instruction
+    /// </summary>
+    [Fact]
+    public void AndImmWithRm32SignExtendedHandler_DecodesAndRm32Imm8_Correctly()
+    {
+        // Arrange
+        // AND EAX, 0x42 (83 E0 42) - ModR/M byte E0 = 11 100 000 (mod=3, reg=4, rm=0)
+        // mod=3 means direct register addressing, reg=4 is the AND opcode extension, rm=0 is EAX
+        byte[] codeBuffer = new byte[] { 0x83, 0xE0, 0x42 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("and", instruction.Mnemonic);
+        Assert.Equal("eax, 0x00000042", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the AND r32, r/m32 instruction
+    /// </summary>
+    [Fact]
+    public void And_DecodesAndR32Rm32_Correctly()
+    {
+        // Arrange
+        // AND EAX, ECX (23 C1) - ModR/M byte C1 = 11 000 001 (mod=3, reg=0, rm=1)
+        // mod=3 means direct register addressing, reg=0 is EAX, rm=1 is ECX
+        byte[] codeBuffer = new byte[] { 0x23, 0xC1 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("and", instruction.Mnemonic);
+        Assert.Equal("eax, ecx", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the AND r/m32, r32 instruction
+    /// </summary>
+    [Fact]
+    public void And_DecodesAndRm32R32_Correctly()
+    {
+        // Arrange
+        // AND ECX, EAX (21 C1) - ModR/M byte C1 = 11 000 001 (mod=3, reg=0, rm=1)
+        // mod=3 means direct register addressing, reg=0 is EAX, rm=1 is ECX
+        byte[] codeBuffer = new byte[] { 0x21, 0xC1 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("and", instruction.Mnemonic);
+        Assert.Equal("ecx, eax", instruction.Operands);
+    }
+}

X86DisassemblerTests/ArithmeticUnaryTests.cs

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+namespace X86DisassemblerTests;
+
+using System;
+using Xunit;
+using X86Disassembler.X86;
+
+/// <summary>
+/// Tests for arithmetic unary operations (DIV, IDIV, MUL, IMUL, NEG, NOT)
+/// </summary>
+public class ArithmeticUnaryTests
+{
+    /// <summary>
+    /// Tests the DivRm32Handler for decoding DIV r/m32 instruction
+    /// </summary>
+    [Fact]
+    public void DivRm32Handler_DecodesDivRm32_Correctly()
+    {
+        // Arrange
+        // DIV ECX (F7 F1) - ModR/M byte F1 = 11 110 001 (mod=3, reg=6, rm=1)
+        // mod=3 means direct register addressing, reg=6 is the DIV opcode extension, rm=1 is ECX
+        byte[] codeBuffer = new byte[] { 0xF7, 0xF1 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("div", instruction.Mnemonic);
+        Assert.Equal("ecx", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the IdivRm32Handler for decoding IDIV r/m32 instruction
+    /// </summary>
+    [Fact]
+    public void IdivRm32Handler_DecodesIdivRm32_Correctly()
+    {
+        // Arrange
+        // IDIV ECX (F7 F9) - ModR/M byte F9 = 11 111 001 (mod=3, reg=7, rm=1)
+        // mod=3 means direct register addressing, reg=7 is the IDIV opcode extension, rm=1 is ECX
+        byte[] codeBuffer = new byte[] { 0xF7, 0xF9 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("idiv", instruction.Mnemonic);
+        Assert.Equal("ecx", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the MulRm32Handler for decoding MUL r/m32 instruction
+    /// </summary>
+    [Fact]
+    public void MulRm32Handler_DecodesMulRm32_Correctly()
+    {
+        // Arrange
+        // MUL ECX (F7 E1) - ModR/M byte E1 = 11 100 001 (mod=3, reg=4, rm=1)
+        // mod=3 means direct register addressing, reg=4 is the MUL opcode extension, rm=1 is ECX
+        byte[] codeBuffer = new byte[] { 0xF7, 0xE1 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("mul", instruction.Mnemonic);
+        Assert.Equal("ecx", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the ImulRm32Handler for decoding IMUL r/m32 instruction
+    /// </summary>
+    [Fact]
+    public void ImulRm32Handler_DecodesImulRm32_Correctly()
+    {
+        // Arrange
+        // IMUL ECX (F7 E9) - ModR/M byte E9 = 11 101 001 (mod=3, reg=5, rm=1)
+        // mod=3 means direct register addressing, reg=5 is the IMUL opcode extension, rm=1 is ECX
+        byte[] codeBuffer = new byte[] { 0xF7, 0xE9 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("imul", instruction.Mnemonic);
+        Assert.Equal("ecx", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the NegRm32Handler for decoding NEG r/m32 instruction
+    /// </summary>
+    [Fact]
+    public void NegRm32Handler_DecodesNegRm32_Correctly()
+    {
+        // Arrange
+        // NEG ECX (F7 D9) - ModR/M byte D9 = 11 011 001 (mod=3, reg=3, rm=1)
+        // mod=3 means direct register addressing, reg=3 is the NEG opcode extension, rm=1 is ECX
+        byte[] codeBuffer = new byte[] { 0xF7, 0xD9 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("neg", instruction.Mnemonic);
+        Assert.Equal("ecx", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the NotRm32Handler for decoding NOT r/m32 instruction
+    /// </summary>
+    [Fact]
+    public void NotRm32Handler_DecodesNotRm32_Correctly()
+    {
+        // Arrange
+        // NOT ECX (F7 D1) - ModR/M byte D1 = 11 010 001 (mod=3, reg=2, rm=1)
+        // mod=3 means direct register addressing, reg=2 is the NOT opcode extension, rm=1 is ECX
+        byte[] codeBuffer = new byte[] { 0xF7, 0xD1 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("not", instruction.Mnemonic);
+        Assert.Equal("ecx", instruction.Operands);
+    }
+}

X86DisassemblerTests/DebugHandlerRegistration.cs

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+using System.Reflection;
+using System.Text;
+using X86Disassembler.X86;
+using X86Disassembler.X86.Handlers;
+using Xunit;
+using Xunit.Abstractions;
+
+namespace X86DisassemblerTests;
+
+/// <summary>
+/// Debug test to find missing handler registrations
+/// </summary>
+public class DebugHandlerRegistration
+{
+    private readonly ITestOutputHelper _output;
+
+    public DebugHandlerRegistration(ITestOutputHelper output)
+    {
+        _output = output;
+    }
+
+    /// <summary>
+    /// Find which handlers are not registered in the factory
+    /// </summary>
+    [Fact]
+    public void FindMissingHandlers()
+    {
+        // Create a factory
+        byte[] codeBuffer = new byte[1];
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        var sut = new InstructionHandlerFactory(codeBuffer, decoder, codeBuffer.Length);
+
+        // Get the handlers registered in the factory
+        var handlers = (List<IInstructionHandler>)sut.GetType()
+            .GetField("_handlers", BindingFlags.Instance | BindingFlags.NonPublic)!
+            .GetValue(sut)!;
+
+        // Get all handler types in the assembly
+        var handlerTypes = typeof(InstructionHandler).Assembly.GetExportedTypes()
+            .Where(x => x.IsAssignableTo(typeof(InstructionHandler)) && x is { IsAbstract: false, IsInterface: false })
+            .ToList();
+
+        // Find missing handlers
+        var missingHandlers = new StringBuilder();
+        foreach (var handlerType in handlerTypes)
+        {
+            if (!handlers.Any(x => x.GetType() == handlerType))
+            {
+                missingHandlers.AppendLine($"Missing handler: {handlerType.FullName}");
+            }
+        }
+
+        // Output missing handlers
+        if (missingHandlers.Length > 0)
+        {
+            _output.WriteLine("The following handlers are not registered in the factory:");
+            _output.WriteLine(missingHandlers.ToString());
+            Assert.False(true, "Missing handlers detected");
+        }
+        else
+        {
+            _output.WriteLine("All handlers are registered correctly.");
+        }
+    }
+}

X86DisassemblerTests/SbbInstructionTests.cs

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+namespace X86DisassemblerTests;
+
+using System;
+using Xunit;
+using X86Disassembler.X86;
+
+/// <summary>
+/// Tests for SBB (Subtract with Borrow) instruction handlers
+/// </summary>
+public class SbbInstructionTests
+{
+    /// <summary>
+    /// Tests the SbbImmFromRm32Handler for decoding SBB r/m32, imm32 instruction
+    /// </summary>
+    [Fact]
+    public void SbbImmFromRm32Handler_DecodesSbbRm32Imm32_Correctly()
+    {
+        // Arrange
+        // SBB EAX, 0x12345678 (81 D8 78 56 34 12) - ModR/M byte D8 = 11 011 000 (mod=3, reg=3, rm=0)
+        // mod=3 means direct register addressing, reg=3 is the SBB opcode extension, rm=0 is EAX
+        byte[] codeBuffer = new byte[] { 0x81, 0xD8, 0x78, 0x56, 0x34, 0x12 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("sbb", instruction.Mnemonic);
+        Assert.Equal("eax, 0x12345678", instruction.Operands);
+    }
+    
+    /// <summary>
+    /// Tests the SbbImmFromRm32SignExtendedHandler for decoding SBB r/m32, imm8 instruction
+    /// </summary>
+    [Fact]
+    public void SbbImmFromRm32SignExtendedHandler_DecodesSbbRm32Imm8_Correctly()
+    {
+        // Arrange
+        // SBB EAX, 0x42 (83 D8 42) - ModR/M byte D8 = 11 011 000 (mod=3, reg=3, rm=0)
+        // mod=3 means direct register addressing, reg=3 is the SBB opcode extension, rm=0 is EAX
+        byte[] codeBuffer = new byte[] { 0x83, 0xD8, 0x42 };
+        var decoder = new InstructionDecoder(codeBuffer, codeBuffer.Length);
+        
+        // Act
+        var instruction = decoder.DecodeInstruction();
+        
+        // Assert
+        Assert.NotNull(instruction);
+        Assert.Equal("sbb", instruction.Mnemonic);
+        Assert.Equal("eax, 0x00000042", instruction.Operands);
+    }
+}