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Fixed MUL instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] and direct memory addressing.

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bird_egop 2025-04-16 20:40:18 +03:00
parent 72ad1c0d90
commit be2dfc3dc5
1 changed files with 14 additions and 3 deletions
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17
X86DisassemblerTests/TestData/mul_tests.csv
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@ -19,6 +19,17 @@ F7E6;[{ "Type": "Mul", "Operands": ["esi"] }]
F7E7;[{ "Type": "Mul", "Operands": ["edi"] }]
# MUL with memory operands
F62425;[{ "Type": "Mul", "Operands": ["byte ptr [eax]"] }]
F72425;[{ "Type": "Mul", "Operands": ["dword ptr [eax]"] }]
F7242510000000;[{ "Type": "Mul", "Operands": ["dword ptr [eax+0x10]"] }]
# SPECIAL CASE: When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement
# The correct encoding for "MUL byte ptr [eax]" would be F620 (with Mod=00, R/M=0 for EAX)
# F62425;[{ "Type": "Mul", "Operands": ["byte ptr [eax]"] }]
F620;[{ "Type": "Mul", "Operands": ["byte ptr [eax]"] }]
# The correct encoding for "MUL dword ptr [eax]" would be F720 (with Mod=00, R/M=0 for EAX)
# F72425;[{ "Type": "Mul", "Operands": ["dword ptr [eax]"] }]
F720;[{ "Type": "Mul", "Operands": ["dword ptr [eax]"] }]
# This test case has an issue - it should be a direct memory operand with a displacement
# F7242510000000;[{ "Type": "Mul", "Operands": ["dword ptr [0x10]"] }]
# The correct encoding for "MUL dword ptr [0x10]" would be F72510000000 (with Mod=00, R/M=5 for direct addressing)
F72510000000;[{ "Type": "Mul", "Operands": ["dword ptr [0x10]"] }]

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