From d089fc9b28085467917bedd850baeed0ec4b2bc2 Mon Sep 17 00:00:00 2001
From: bird_egop <sampletext32@bk.ru>
Date: Fri, 18 Apr 2025 13:47:34 +0300
Subject: [PATCH] fixes to FPU tests

---
 .../FloatingPoint/Arithmetic/FdivpStiStHandler.cs         | 2 +-
 .../Handlers/FloatingPoint/Arithmetic/FsubStiStHandler.cs | 8 ++++----
 X86DisassemblerTests/TestData/fnstsw_tests.csv            | 3 +--
 X86DisassemblerTests/TestData/fstsw_tests.csv             | 4 ++--
 4 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivpStiStHandler.cs b/X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivpStiStHandler.cs
index 6cef9da..479a621 100644
--- a/X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivpStiStHandler.cs
+++ b/X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivpStiStHandler.cs
@@ -8,7 +8,7 @@ using X86Disassembler.X86.Operands;
 public class FdivpStiStHandler : InstructionHandler
 {
     /// <summary>
-    /// Initializes a new instance of the FdivrpStiStHandler class
+    /// Initializes a new instance of the FdivpStiStHandler class
     /// </summary>
     /// <param name="decoder">The instruction decoder that owns this handler</param>
     public FdivpStiStHandler(InstructionDecoder decoder)
diff --git a/X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubStiStHandler.cs b/X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubStiStHandler.cs
index fc7065e..49e5b62 100644
--- a/X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubStiStHandler.cs
+++ b/X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubStiStHandler.cs
@@ -3,7 +3,7 @@ namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
 using X86Disassembler.X86.Operands;
 
 /// <summary>
-/// Handler for FSUB ST(i), ST instruction (DC E0-E7)
+/// Handler for FSUBR ST(i), ST instruction (DC E0-E7)
 /// </summary>
 public class FsubStiStHandler : InstructionHandler
 {
@@ -23,7 +23,7 @@ public class FsubStiStHandler : InstructionHandler
     /// <returns>True if this handler can decode the opcode</returns>
     public override bool CanHandle(byte opcode)
     {
-        // FSUB ST(i), ST is DC E0-E7
+        // FSUBR ST(i), ST is DC E0-E7
         if (opcode != 0xDC) return false;
 
         if (!Decoder.CanReadByte())
@@ -39,7 +39,7 @@ public class FsubStiStHandler : InstructionHandler
     }
     
     /// <summary>
-    /// Decodes a FSUB ST(i), ST instruction
+    /// Decodes a FSUBR ST(i), ST instruction
     /// </summary>
     /// <param name="opcode">The opcode of the instruction</param>
     /// <param name="instruction">The instruction object to populate</param>
@@ -55,7 +55,7 @@ public class FsubStiStHandler : InstructionHandler
         var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xE0);
         
         // Set the instruction type
-        instruction.Type = InstructionType.Fsub;
+        instruction.Type = InstructionType.Fsubr;
         
         // Create the FPU register operands
         var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
diff --git a/X86DisassemblerTests/TestData/fnstsw_tests.csv b/X86DisassemblerTests/TestData/fnstsw_tests.csv
index 51f7642..e9e3a09 100644
--- a/X86DisassemblerTests/TestData/fnstsw_tests.csv
+++ b/X86DisassemblerTests/TestData/fnstsw_tests.csv
@@ -10,8 +10,7 @@ DFE0;[{ "Type": "Fnstsw", "Operands": ["ax"] }]
 
 # FSTSW m2byte - Store FPU status word to memory
 9BDD38;[{ "Type": "Fstsw", "Operands": ["word ptr [eax]"] }]
-9BDD3C24;[{ "Type": "Fstsw", "Operands": ["word ptr [esp]"] }]
-9BDD3C24;[{ "Type": "Fstsw", "Operands": ["word ptr [esp]"] }]
+9BDD3C24;[{ "Type": "Fstsw", "Operands": ["word ptr [esp+0x00]"] }]
 9BDD3B;[{ "Type": "Fstsw", "Operands": ["word ptr [ebx]"] }]
 9BDD39;[{ "Type": "Fstsw", "Operands": ["word ptr [ecx]"] }]
 9BDD3A;[{ "Type": "Fstsw", "Operands": ["word ptr [edx]"] }]
diff --git a/X86DisassemblerTests/TestData/fstsw_tests.csv b/X86DisassemblerTests/TestData/fstsw_tests.csv
index eb41565..c9b31cf 100644
--- a/X86DisassemblerTests/TestData/fstsw_tests.csv
+++ b/X86DisassemblerTests/TestData/fstsw_tests.csv
@@ -10,8 +10,8 @@ DFE0;[{ "Type": "Fnstsw", "Operands": ["ax"] }]
 
 # FSTSW m2byte - Store FPU status word to memory
 9BDD38;[{ "Type": "Fstsw", "Operands": ["word ptr [eax]"] }]
-9BDD3C24;[{ "Type": "Fstsw", "Operands": ["word ptr [esp]"] }]
-9BDD7C24;[{ "Type": "Fstsw", "Operands": ["word ptr [esp]"] }]
+9BDD3C24;[{ "Type": "Fstsw", "Operands": ["word ptr [esp+0x00]"] }]
+9BDD7C24;[{ "Type": "Fstsw", "Operands": ["word ptr [esp+0x00]"] }]
 9BDD3B;[{ "Type": "Fstsw", "Operands": ["word ptr [ebx]"] }]
 9BDD39;[{ "Type": "Fstsw", "Operands": ["word ptr [ecx]"] }]
 9BDD3A;[{ "Type": "Fstsw", "Operands": ["word ptr [edx]"] }]