Refactored floating point instruction handlers for better organization and maintainability. Split generic handlers into specialized classes for DD and DF opcodes.

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FaddRegisterHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FADD ST(i), ST(0) instruction (DC C0-C7)
+/// </summary>
+public class FaddRegisterHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FaddRegisterHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FaddRegisterHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FADD ST(i), ST(0) is DC C0-C7
+        if (opcode != 0xDC) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 0 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 0
+        return reg == 0 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FADD ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fadd;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            stiOperand,
+            st0Operand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FaddpHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FADDP ST(i), ST(0) instruction (DE C0-C7)
+/// </summary>
+public class FaddpHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FaddpHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FaddpHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FADDP ST(i), ST(0) is DE C0-C7
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 0 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 0
+        return reg == 0 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FADDP ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Faddp;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            destOperand,
+            srcOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivRegisterHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FDIV ST(i), ST(0) instruction (DC F0-F7)
+/// </summary>
+public class FdivRegisterHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FdivRegisterHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FdivRegisterHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FDIV ST(i), ST(0) is DC F0-F7
+        if (opcode != 0xDC) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 6 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 6
+        return reg == 6 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FDIV ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fdiv;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            stiOperand,
+            st0Operand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivpHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FDIVP ST(i), ST(0) instruction (DE F0-F7)
+/// </summary>
+public class FdivpHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FdivpHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FdivpHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FDIVP ST(i), ST(0) is DE F0-F7
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 6 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 6
+        return reg == 6 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FDIVP ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fdivp;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            destOperand,
+            srcOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivrRegisterHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FDIVR ST(i), ST(0) instruction (DC F8-FF)
+/// </summary>
+public class FdivrRegisterHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FdivrRegisterHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FdivrRegisterHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FDIVR ST(i), ST(0) is DC F8-FF
+        if (opcode != 0xDC) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 7 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 7
+        return reg == 7 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FDIVR ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fdivr;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            stiOperand,
+            st0Operand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FdivrpHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FDIVRP ST(i), ST(0) instruction (DE F8-FF)
+/// </summary>
+public class FdivrpHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FdivrpHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FdivrpHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FDIVRP ST(i), ST(0) is DE F8-FF
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 7 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 7
+        return reg == 7 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FDIVRP ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fdivrp;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            destOperand,
+            srcOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FiaddInt16Handler.cs

@@ -0,0 +1,70 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FIADD int16 instruction (DE /0)
+/// </summary>
+public class FiaddInt16Handler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FiaddInt16Handler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FiaddInt16Handler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FIADD int16 is DE /0
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 0
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle memory operands (mod != 3) with reg = 0
+        return reg == 0 && mod != 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FIADD int16 instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte, specifying that we're dealing with 16-bit operands
+        var (mod, reg, rm, memoryOperand) = ModRMDecoder.ReadModRM16();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fiadd;
+
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            memoryOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FidivInt16Handler.cs

@@ -0,0 +1,70 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FIDIV int16 instruction (DE /6)
+/// </summary>
+public class FidivInt16Handler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FidivInt16Handler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FidivInt16Handler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FIDIV int16 is DE /6
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 6
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle memory operands (mod != 3) with reg = 6
+        return reg == 6 && mod != 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FIDIV int16 instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte, specifying that we're dealing with 16-bit operands
+        var (mod, reg, rm, memoryOperand) = ModRMDecoder.ReadModRM16();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fidiv;
+
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            memoryOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FidivrInt16Handler.cs

@@ -0,0 +1,70 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FIDIVR int16 instruction (DE /7)
+/// </summary>
+public class FidivrInt16Handler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FidivrInt16Handler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FidivrInt16Handler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FIDIVR int16 is DE /7
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 7
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle memory operands (mod != 3) with reg = 7
+        return reg == 7 && mod != 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FIDIVR int16 instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte, specifying that we're dealing with 16-bit operands
+        var (mod, reg, rm, memoryOperand) = ModRMDecoder.ReadModRM16();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fidivr;
+
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            memoryOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FimulInt16Handler.cs

@@ -0,0 +1,70 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FIMUL int16 instruction (DE /1)
+/// </summary>
+public class FimulInt16Handler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FimulInt16Handler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FimulInt16Handler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FIMUL int16 is DE /1
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 1
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle memory operands (mod != 3) with reg = 1
+        return reg == 1 && mod != 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FIMUL int16 instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte, specifying that we're dealing with 16-bit operands
+        var (mod, reg, rm, memoryOperand) = ModRMDecoder.ReadModRM16();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fimul;
+
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            memoryOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FisubInt16Handler.cs

@@ -0,0 +1,70 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FISUB int16 instruction (DE /4)
+/// </summary>
+public class FisubInt16Handler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FisubInt16Handler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FisubInt16Handler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FISUB int16 is DE /4
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 4
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle memory operands (mod != 3) with reg = 4
+        return reg == 4 && mod != 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FISUB int16 instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte, specifying that we're dealing with 16-bit operands
+        var (mod, reg, rm, memoryOperand) = ModRMDecoder.ReadModRM16();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fisub;
+
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            memoryOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FisubrInt16Handler.cs

@@ -0,0 +1,70 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FISUBR int16 instruction (DE /5)
+/// </summary>
+public class FisubrInt16Handler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FisubrInt16Handler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FisubrInt16Handler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FISUBR int16 is DE /5
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 5
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle memory operands (mod != 3) with reg = 5
+        return reg == 5 && mod != 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FISUBR int16 instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte, specifying that we're dealing with 16-bit operands
+        var (mod, reg, rm, memoryOperand) = ModRMDecoder.ReadModRM16();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fisubr;
+
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            memoryOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FmulRegisterHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FMUL ST(i), ST(0) instruction (DC C8-CF)
+/// </summary>
+public class FmulRegisterHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FmulRegisterHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FmulRegisterHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FMUL ST(i), ST(0) is DC C8-CF
+        if (opcode != 0xDC) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 1 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 1
+        return reg == 1 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FMUL ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fmul;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            stiOperand,
+            st0Operand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FmulpHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FMULP ST(i), ST(0) instruction (DE C8-CF)
+/// </summary>
+public class FmulpHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FmulpHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FmulpHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FMULP ST(i), ST(0) is DE C8-CF
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 1 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 1
+        return reg == 1 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FMULP ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fmulp;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            destOperand,
+            srcOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubRegisterHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FSUB ST(i), ST(0) instruction (DC E0-E7)
+/// </summary>
+public class FsubRegisterHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FsubRegisterHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FsubRegisterHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FSUB ST(i), ST(0) is DC E0-E7
+        if (opcode != 0xDC) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 4 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 4
+        return reg == 4 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FSUB ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fsub;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            stiOperand,
+            st0Operand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubpHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FSUBP ST(i), ST(0) instruction (DE E0-E7)
+/// </summary>
+public class FsubpHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FsubpHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FsubpHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FSUBP ST(i), ST(0) is DE E0-E7
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 4 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 4
+        return reg == 4 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FSUBP ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fsubp;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            destOperand,
+            srcOperand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubrRegisterHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FSUBR ST(i), ST(0) instruction (DC E8-EF)
+/// </summary>
+public class FsubrRegisterHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FsubrRegisterHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FsubrRegisterHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FSUBR ST(i), ST(0) is DC E8-EF
+        if (opcode != 0xDC) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 5 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 5
+        return reg == 5 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FSUBR ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fsubr;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            stiOperand,
+            st0Operand
+        ];
+
+        return true;
+    }
+}

X86Disassembler/X86/Handlers/FloatingPoint/Arithmetic/FsubrpHandler.cs

@@ -0,0 +1,89 @@
+namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
+
+using X86Disassembler.X86.Operands;
+
+/// <summary>
+/// Handler for FSUBRP ST(i), ST(0) instruction (DE E8-EF)
+/// </summary>
+public class FsubrpHandler : InstructionHandler
+{
+    /// <summary>
+    /// Initializes a new instance of the FsubrpHandler class
+    /// </summary>
+    /// <param name="decoder">The instruction decoder that owns this handler</param>
+    public FsubrpHandler(InstructionDecoder decoder)
+        : base(decoder)
+    {
+    }
+
+    /// <summary>
+    /// Checks if this handler can decode the given opcode
+    /// </summary>
+    /// <param name="opcode">The opcode to check</param>
+    /// <returns>True if this handler can decode the opcode</returns>
+    public override bool CanHandle(byte opcode)
+    {
+        // FSUBRP ST(i), ST(0) is DE E8-EF
+        if (opcode != 0xDE) return false;
+
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Check if the ModR/M byte has reg field = 5 and mod = 3
+        byte modRm = Decoder.PeakByte();
+        byte reg = (byte)((modRm >> 3) & 0x7);
+        byte mod = (byte)((modRm >> 6) & 0x3);
+        
+        // Only handle register operands (mod = 3) with reg = 5
+        return reg == 5 && mod == 3;
+    }
+    
+    /// <summary>
+    /// Decodes a FSUBRP ST(i), ST(0) instruction
+    /// </summary>
+    /// <param name="opcode">The opcode of the instruction</param>
+    /// <param name="instruction">The instruction object to populate</param>
+    /// <returns>True if the instruction was successfully decoded</returns>
+    public override bool Decode(byte opcode, Instruction instruction)
+    {
+        if (!Decoder.CanReadByte())
+        {
+            return false;
+        }
+
+        // Read the ModR/M byte
+        var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
+        
+        // Set the instruction type
+        instruction.Type = InstructionType.Fsubrp;
+
+        // Map rm field to FPU register index
+        FpuRegisterIndex stIndex = rm switch
+        {
+            RegisterIndex.A => FpuRegisterIndex.ST0,
+            RegisterIndex.C => FpuRegisterIndex.ST1,
+            RegisterIndex.D => FpuRegisterIndex.ST2,
+            RegisterIndex.B => FpuRegisterIndex.ST3,
+            RegisterIndex.Sp => FpuRegisterIndex.ST4,
+            RegisterIndex.Bp => FpuRegisterIndex.ST5,
+            RegisterIndex.Si => FpuRegisterIndex.ST6,
+            RegisterIndex.Di => FpuRegisterIndex.ST7,
+            _ => FpuRegisterIndex.ST0 // Default case, should not happen
+        };
+        
+        // Create the FPU register operands
+        var destOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
+        var srcOperand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
+        
+        // Set the structured operands
+        instruction.StructuredOperands = 
+        [
+            destOperand,
+            srcOperand
+        ];
+
+        return true;
+    }
+}