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Fixed x86 disassembler issues: 1) Corrected ModRMDecoder to use RegisterIndex.Sp instead of RegisterIndex.Si for SIB detection 2) Updated floating point instruction handlers to use proper instruction types 3) Enhanced ImmediateOperand.ToString() to show full 32-bit representation for sign-extended values

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bird_egop
2025-04-15 00:14:28 +03:00
parent 9117830ff1
commit d351f41808
6 changed files with 170 additions and 59 deletions
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16
X86Disassembler/X86/Handlers/FloatingPoint/Int16OperationHandler.cs
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@ -10,14 +10,14 @@ public class Int16OperationHandler : InstructionHandler
// Memory operand instruction types for DE opcode - operations on int16
private static readonly InstructionType[] MemoryInstructionTypes =
[
InstructionType.Unknown, // fiadd - not in enum
InstructionType.Unknown, // fimul - not in enum
InstructionType.Unknown, // ficom - not in enum
InstructionType.Unknown, // ficomp - not in enum
InstructionType.Unknown, // fisub - not in enum
InstructionType.Unknown, // fisubr - not in enum
InstructionType.Unknown, // fidiv - not in enum
InstructionType.Unknown // fidivr - not in enum
InstructionType.Fiadd, // fiadd word ptr [r/m]
InstructionType.Fmul, // fimul word ptr [r/m]
InstructionType.Fcom, // ficom word ptr [r/m]
InstructionType.Fcomp, // ficomp word ptr [r/m]
InstructionType.Fsub, // fisub word ptr [r/m]
InstructionType.Fsubr, // fisubr word ptr [r/m]
InstructionType.Fdiv, // fidiv word ptr [r/m]
InstructionType.Fdivr // fidivr word ptr [r/m]
];
// Register-register operations mapping (mod=3)