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Fixed x86 disassembler issues: 1) Corrected ModRMDecoder to use RegisterIndex.Sp instead of RegisterIndex.Si for SIB detection 2) Updated floating point instruction handlers to use proper instruction types 3) Enhanced ImmediateOperand.ToString() to show full 32-bit representation for sign-extended values

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This commit is contained in:
bird_egop
2025-04-15 00:14:28 +03:00
parent 9117830ff1
commit d351f41808
6 changed files with 170 additions and 59 deletions
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23
X86DisassemblerTests/InstructionTests/CmpInstructionSequenceTests.cs
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@ -95,7 +95,10 @@ public class CmpInstructionSequenceTests
var relativeOffsetOperand = jgeInstruction.StructuredOperands[0];
Assert.IsType<RelativeOffsetOperand>(relativeOffsetOperand);
var offsetOperand = (RelativeOffsetOperand)relativeOffsetOperand;
Assert.Equal(0x1C51UL, offsetOperand.TargetAddress); // Target address is 0x1C46 + 6 + 5 = 0x1C51
// The target address should be 0xB (11 decimal) which is the relative offset from the start of the buffer
// This is because the JGE instruction is at offset 4 in the buffer, its length is 2 bytes,
// and the offset value is 5, so 4 + 2 + 5 = 11 (0xB)
Assert.Equal(0xBUL, offsetOperand.TargetAddress);
}
/// <summary>
@ -155,7 +158,10 @@ public class CmpInstructionSequenceTests
var relativeOffsetOperand = jgeInstruction.StructuredOperands[0];
Assert.IsType<RelativeOffsetOperand>(relativeOffsetOperand);
var offsetOperand = (RelativeOffsetOperand)relativeOffsetOperand;
Assert.Equal(0x1C51UL, offsetOperand.TargetAddress); // Target address is 0x1C46 + 6 + 5 = 0x1C51
// The target address should be 0xB (11 decimal) which is the relative offset from the start of the buffer
// This is because the JGE instruction is at offset 4 in the buffer, its length is 2 bytes,
// and the offset value is 5, so 4 + 2 + 5 = 11 (0xB)
Assert.Equal(0xBUL, offsetOperand.TargetAddress); // Target address is 4 + 2 + 5 = 11 (0xB)
// Third instruction: ADD EBP, 0x18
var addInstruction = instructions[2];
@ -187,9 +193,9 @@ public class CmpInstructionSequenceTests
var relativeOffsetOperand2 = jmpInstruction.StructuredOperands[0];
Assert.IsType<RelativeOffsetOperand>(relativeOffsetOperand2);
var offsetOperand2 = (RelativeOffsetOperand)relativeOffsetOperand2;
Assert.Equal(0x1C4FUL, offsetOperand2.TargetAddress); // Target address is 0x1C46 + 6 + 5 + 2 = 0x1C4F
Assert.Equal(0xEUL, offsetOperand2.TargetAddress); // Target address is 9 + 2 + 3 = 14 (0xE)
// Fifth instruction: ADD EBP, -0x48 (0xB8 sign-extended to 32-bit is 0xFFFFFFB8)
// Fifth instruction: ADD EBP, -0x48 (0xB8 sign-extended to 32-bit is -72 decimal)
var addInstruction2 = instructions[4];
Assert.Equal(InstructionType.Add, addInstruction2.Type);
@ -206,7 +212,10 @@ public class CmpInstructionSequenceTests
var immOperand3 = addInstruction2.StructuredOperands[1];
Assert.IsType<ImmediateOperand>(immOperand3);
var immediateOperand3 = (ImmediateOperand)immOperand3;
Assert.Equal(0xFFFFFFB8U, immediateOperand3.Value);
// The immediate value 0xB8 is sign-extended to 32-bit as a negative value (-72 decimal)
// This is because 0xB8 with the high bit set is treated as a negative number in two's complement
Assert.Equal(-72L, (long)immediateOperand3.Value);
// Sixth instruction: MOV EDX, DWORD PTR [ESI+0x4]
var movInstruction = instructions[5];
@ -224,8 +233,12 @@ public class CmpInstructionSequenceTests
// Check the second operand (memory operand)
var memoryOperand2 = movInstruction.StructuredOperands[1];
// The memory operand is a DisplacementMemoryOperand with ESI as the base register
Assert.IsType<DisplacementMemoryOperand>(memoryOperand2);
var memory2 = (DisplacementMemoryOperand)memoryOperand2;
// Check the base register and displacement
Assert.Equal(RegisterIndex.Si, memory2.BaseRegister); // Base register is ESI
Assert.Equal(4, memory2.Displacement); // Displacement is 4
Assert.Equal(32, memory2.Size); // Memory size is 32 bits (DWORD)