using X86Disassembler.X86.Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore; /// /// Handler for FLD float32 instruction (D9 /0) /// public class FldFloat32Handler : InstructionHandler { /// /// Initializes a new instance of the FldFloat32Handler class /// /// The instruction decoder that owns this handler public FldFloat32Handler(InstructionDecoder decoder) : base(decoder) { } /// /// Checks if this handler can decode the given opcode /// /// The opcode to check /// True if this handler can decode the opcode public override bool CanHandle(byte opcode) { // FLD is D9 /0 if (opcode != 0xD9) return false; if (!Decoder.CanReadByte()) { return false; } // Check if the ModR/M byte has reg field = 0 byte modRm = Decoder.PeakByte(); byte reg = (byte)((modRm >> 3) & 0x7); return reg == 0; } /// /// Decodes an FLD float32 instruction /// /// The opcode of the instruction /// The instruction object to populate /// True if the instruction was successfully decoded public override bool Decode(byte opcode, Instruction instruction) { if (!Decoder.CanReadByte()) { return false; } // Read the ModR/M byte using the specialized FPU method var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu(); // Verify reg field is 0 (FLD) if (reg != 0) { return false; } // Set the instruction type instruction.Type = InstructionType.Fld; // Handle based on addressing mode if (mod != 3) // Memory operand { // Set the structured operands - the operand already has the correct size from ReadModRM instruction.StructuredOperands = [ rawOperand ]; } else // Register operand (ST(i)) { // For register operands with mod=3, this is FLD ST(i) var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i) // Set the structured operands instruction.StructuredOperands = [ stiOperand ]; } return true; } }