using X86Disassembler.X86.Operands; namespace X86Disassembler.X86.Handlers.Add; /// /// Handler for ADD r/m8, r8 instruction (opcode 00) /// public class AddRm8R8Handler : InstructionHandler { /// /// Initializes a new instance of the AddRm8R8Handler class /// /// The instruction decoder that owns this handler public AddRm8R8Handler(InstructionDecoder decoder) : base(decoder) { } /// /// Checks if this handler can decode the given opcode /// /// The opcode to check /// True if this handler can decode the opcode public override bool CanHandle(byte opcode) { // ADD r/m8, r8 is encoded as 00 /r return opcode == 0x00; } /// /// Decodes an ADD r/m8, r8 instruction /// /// The opcode of the instruction /// The instruction object to populate /// True if the instruction was successfully decoded public override bool Decode(byte opcode, Instruction instruction) { // Set the instruction type instruction.Type = InstructionType.Add; // Check if we have enough bytes for the ModR/M byte if (!Decoder.CanReadByte()) { return false; } // Read the ModR/M byte // For ADD r/m8, r8 (00 /r): // - The reg field specifies the source register // - The r/m field with mod specifies the destination operand (register or memory) var (_, reg, _, destinationOperand) = ModRMDecoder.ReadModRM8(); // Note: The operand size is already set to 8-bit by the ReadModRM8 method var sourceOperand = OperandFactory.CreateRegisterOperand8(reg); // Set the structured operands instruction.StructuredOperands = [ destinationOperand, sourceOperand ]; return true; } }