using X86Disassembler.X86.Operands; namespace X86Disassembler.X86.Handlers.And; /// /// Handler for AND r32, r/m32 instruction (0x23) /// public class AndR32Rm32Handler : InstructionHandler { /// /// Initializes a new instance of the AndR32Rm32Handler class /// /// The instruction decoder that owns this handler public AndR32Rm32Handler(InstructionDecoder decoder) : base(decoder) { } /// /// Checks if this handler can decode the given opcode /// /// The opcode to check /// True if this handler can decode the opcode public override bool CanHandle(byte opcode) { return opcode == 0x23; } /// /// Decodes an AND r32, r/m32 instruction /// /// The opcode of the instruction /// The instruction object to populate /// True if the instruction was successfully decoded public override bool Decode(byte opcode, Instruction instruction) { // Set the instruction type instruction.Type = InstructionType.And; if (!Decoder.CanReadByte()) { return false; } // Read the ModR/M byte // For AND r32, r/m32 (0x23): // - The reg field specifies the destination register // - The r/m field with mod specifies the source operand (register or memory) var (_, reg, _, sourceOperand) = ModRMDecoder.ReadModRM(); // Create the destination register operand var destinationOperand = OperandFactory.CreateRegisterOperand(reg, 32); // Set the structured operands instruction.StructuredOperands = [ destinationOperand, sourceOperand ]; return true; } }