using X86Disassembler.X86.Operands; namespace X86Disassembler.X86.Handlers.And; /// /// Handler for AND r/m16, r16 instruction (0x21 with 0x66 prefix) /// public class AndRm16R16Handler : InstructionHandler { /// /// Initializes a new instance of the AndRm16R16Handler class /// /// The instruction decoder that owns this handler public AndRm16R16Handler(InstructionDecoder decoder) : base(decoder) { } /// /// Checks if this handler can decode the given opcode /// /// The opcode to check /// True if this handler can decode the opcode public override bool CanHandle(byte opcode) { // AND r/m16, r16 is encoded as 0x21 with 0x66 prefix if (opcode != 0x21) { return false; } // Only handle when the operand size prefix is present return Decoder.HasOperandSizePrefix(); } /// /// Decodes an AND r/m16, r16 instruction /// /// The opcode of the instruction /// The instruction object to populate /// True if the instruction was successfully decoded public override bool Decode(byte opcode, Instruction instruction) { // Set the instruction type instruction.Type = InstructionType.And; // Check if we can read the ModR/M byte if (!Decoder.CanReadByte()) { return false; } // For AND r/m16, r16 (0x21 with 0x66 prefix): // - The reg field of the ModR/M byte specifies the source register // - The r/m field with mod specifies the destination operand (register or memory) var (_, reg, _, destinationOperand) = ModRMDecoder.ReadModRM16(); // Create the source register operand with 16-bit size var sourceOperand = OperandFactory.CreateRegisterOperand(reg, 16); // Set the structured operands instruction.StructuredOperands = [ destinationOperand, sourceOperand ]; return true; } }