using X86Disassembler.X86.Operands; namespace X86Disassembler.X86.Handlers.And; /// /// Handler for AND r/m32, imm32 instruction (0x81 /4) /// public class AndImmWithRm32Handler : InstructionHandler { /// /// Initializes a new instance of the AndImmWithRm32Handler class /// /// The instruction decoder that owns this handler public AndImmWithRm32Handler(InstructionDecoder decoder) : base(decoder) { } /// /// Checks if this handler can decode the given opcode /// /// The opcode to check /// True if this handler can decode the opcode public override bool CanHandle(byte opcode) { if (opcode != 0x81) return false; // Check if the reg field of the ModR/M byte is 4 (AND) if (!Decoder.CanReadByte()) return false; var reg = ModRMDecoder.PeakModRMReg(); return reg == 4; // 4 = AND } /// /// Decodes an AND r/m32, imm32 instruction /// /// The opcode of the instruction /// The instruction object to populate /// True if the instruction was successfully decoded public override bool Decode(byte opcode, Instruction instruction) { // Set the instruction type instruction.Type = InstructionType.And; // Read the ModR/M byte // For AND r/m32, imm32 (0x81 /4): // - The r/m field with mod specifies the destination operand (register or memory) // - The immediate value is the source operand var (_, _, _, destinationOperand) = ModRMDecoder.ReadModRM(); // Check if we have enough bytes for the immediate value if (!Decoder.CanReadUInt()) { return false; // Not enough bytes for the immediate value } // Read the immediate value uint imm32 = Decoder.ReadUInt32(); // Create the source immediate operand var sourceOperand = OperandFactory.CreateImmediateOperand(imm32, 32); // Set the structured operands instruction.StructuredOperands = [ destinationOperand, sourceOperand ]; return true; } }