namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore; using X86Disassembler.X86.Operands; /// /// Handler for FST float64 instruction (DD /2) /// public class FstFloat64Handler : InstructionHandler { /// /// Initializes a new instance of the FstFloat64Handler class /// /// The instruction decoder that owns this handler public FstFloat64Handler(InstructionDecoder decoder) : base(decoder) { } /// /// Checks if this handler can decode the given opcode /// /// The opcode to check /// True if this handler can decode the opcode public override bool CanHandle(byte opcode) { // FST is DD /2 if (opcode != 0xDD) return false; if (!Decoder.CanReadByte()) { return false; } // Check if the ModR/M byte has reg field = 2 byte modRm = Decoder.PeakByte(); byte reg = (byte)((modRm >> 3) & 0x7); return reg == 2; } /// /// Decodes a FST float64 instruction /// /// The opcode of the instruction /// The instruction object to populate /// True if the instruction was successfully decoded public override bool Decode(byte opcode, Instruction instruction) { if (!Decoder.CanReadByte()) { return false; } // Read the ModR/M byte using the specialized FPU method var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu64(); // Set the instruction type instruction.Type = InstructionType.Fst; // Handle based on addressing mode if (mod != 3) // Memory operand { // Set the structured operands - the operand already has the correct size from ReadModRM instruction.StructuredOperands = [ rawOperand ]; } else // Register operand (ST(i)) { // For register operands with mod=3, this is FST ST(i) var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i) // Set the structured operands instruction.StructuredOperands = [ stiOperand ]; } return true; } }