namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison; using X86Disassembler.X86.Operands; /// /// Handler for FUCOMP ST(i) instruction (DD E8-EF) /// public class FucompHandler : InstructionHandler { /// /// Initializes a new instance of the FucompHandler class /// /// The instruction decoder that owns this handler public FucompHandler(InstructionDecoder decoder) : base(decoder) { } /// /// Checks if this handler can decode the given opcode /// /// The opcode to check /// True if this handler can decode the opcode public override bool CanHandle(byte opcode) { // FUCOMP ST(i) is DD E8-EF if (opcode != 0xDD) return false; if (!Decoder.CanReadByte()) { return false; } // Check if the ModR/M byte has reg field = 5 and mod = 3 byte modRm = Decoder.PeakByte(); byte reg = (byte)((modRm >> 3) & 0x7); byte mod = (byte)((modRm >> 6) & 0x3); // Only handle register operands (mod = 3) with reg = 5 return reg == 5 && mod == 3; } /// /// Decodes a FUCOMP ST(i) instruction /// /// The opcode of the instruction /// The instruction object to populate /// True if the instruction was successfully decoded public override bool Decode(byte opcode, Instruction instruction) { if (!Decoder.CanReadByte()) { return false; } // Read the ModR/M byte var (mod, reg, rm, _) = ModRMDecoder.ReadModRM(); // Set the instruction type instruction.Type = InstructionType.Fucomp; // Map rm field to FPU register index FpuRegisterIndex stIndex = rm switch { RegisterIndex.A => FpuRegisterIndex.ST0, RegisterIndex.C => FpuRegisterIndex.ST1, RegisterIndex.D => FpuRegisterIndex.ST2, RegisterIndex.B => FpuRegisterIndex.ST3, RegisterIndex.Sp => FpuRegisterIndex.ST4, RegisterIndex.Bp => FpuRegisterIndex.ST5, RegisterIndex.Si => FpuRegisterIndex.ST6, RegisterIndex.Di => FpuRegisterIndex.ST7, _ => FpuRegisterIndex.ST0 // Default case, should not happen }; // Create the FPU register operand var fpuRegisterOperand = OperandFactory.CreateFPURegisterOperand(stIndex); // Set the structured operands instruction.StructuredOperands = [ fpuRegisterOperand ]; return true; } }