namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
///
/// Handler for FADD float32 instruction (D8 /0)
///
public class FaddFloat32Handler : InstructionHandler
{
///
/// Initializes a new instance of the FaddFloat32Handler class
///
/// The instruction decoder that owns this handler
public FaddFloat32Handler(InstructionDecoder decoder)
: base(decoder)
{
}
///
/// Checks if this handler can decode the given opcode
///
/// The opcode to check
/// True if this handler can decode the opcode
public override bool CanHandle(byte opcode)
{
// FADD is D8 /0
if (opcode != 0xD8) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 0 and mod != 3 (memory operand)
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
byte mod = (byte)((modRm >> 6) & 0x3);
// Only handle memory operands (mod != 3) with reg = 0
return reg == 0 && mod != 3;
}
///
/// Decodes a FADD float32 instruction
///
/// The opcode of the instruction
/// The instruction object to populate
/// True if the instruction was successfully decoded
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method for 32-bit operands
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// We've already verified reg field is 0 (FADD) in CanHandle
// and we only handle memory operands (mod != 3)
// Set the instruction type
instruction.Type = InstructionType.Fadd;
// Set the structured operands - the operand already has the correct size from ReadModRMFpu
instruction.StructuredOperands =
[
rawOperand
];
return true;
}
}