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add tons of tests
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32
X86DisassemblerTests/TestData/rcl_tests.csv
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32
X86DisassemblerTests/TestData/rcl_tests.csv
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# RCL instruction tests
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# Format: RawBytes;Instructions
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RawBytes;Instructions
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# RCL r/m8, 1 (opcode D0 /2)
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D0D0;[{ "Type": "Rcl", "Operands": ["al", "0x01"] }]
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D0D3;[{ "Type": "Rcl", "Operands": ["bl", "0x01"] }]
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# RCL r/m32, 1 (opcode D1 /2)
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D1D0;[{ "Type": "Rcl", "Operands": ["eax", "0x01"] }]
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D1D3;[{ "Type": "Rcl", "Operands": ["ebx", "0x01"] }]
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# RCL r/m8, CL (opcode D2 /2)
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D2D0;[{ "Type": "Rcl", "Operands": ["al", "cl"] }]
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D2D3;[{ "Type": "Rcl", "Operands": ["bl", "cl"] }]
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# RCL r/m32, CL (opcode D3 /2)
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D3D0;[{ "Type": "Rcl", "Operands": ["eax", "cl"] }]
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D3D3;[{ "Type": "Rcl", "Operands": ["ebx", "cl"] }]
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# RCL r/m8, imm8 (opcode C0 /2)
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C0D005;[{ "Type": "Rcl", "Operands": ["al", "0x05"] }]
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C0D305;[{ "Type": "Rcl", "Operands": ["bl", "0x05"] }]
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# RCL r/m32, imm8 (opcode C1 /2)
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C1D005;[{ "Type": "Rcl", "Operands": ["eax", "0x05"] }]
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C1D305;[{ "Type": "Rcl", "Operands": ["ebx", "0x05"] }]
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# RCL with memory operands
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D0142510;[{ "Type": "Rcl", "Operands": ["byte ptr [eax+0x10]", "0x01"] }]
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D31425;[{ "Type": "Rcl", "Operands": ["dword ptr [eax]", "cl"] }]
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C1142505;[{ "Type": "Rcl", "Operands": ["dword ptr [eax]", "0x05"] }]
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