mirror of
https://github.com/DarkFlippers/unleashed-firmware.git
synced 2025-12-12 04:34:43 +04:00
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This commit is contained in:
@@ -126,4 +126,4 @@ mjs_val_t js_module_require(JsModules* modules, const char* name, size_t name_le
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furi_string_free(module_name);
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return module_object;
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}
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}
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@@ -4,7 +4,7 @@
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#include <flipper_application/plugins/plugin_manager.h>
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#include <flipper_application/plugins/composite_resolver.h>
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#define PLUGIN_APP_ID "js"
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#define PLUGIN_APP_ID "js"
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#define PLUGIN_API_VERSION 1
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typedef void* (*JsModeConstructor)(struct mjs* mjs, mjs_val_t* object);
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@@ -241,4 +241,4 @@ static const FlipperAppPluginDescriptor plugin_descriptor = {
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const FlipperAppPluginDescriptor* js_blebeacon_ep(void) {
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return &plugin_descriptor;
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}
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}
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@@ -392,4 +392,4 @@ static const FlipperAppPluginDescriptor plugin_descriptor = {
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const FlipperAppPluginDescriptor* js_gpio_ep(void) {
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return &plugin_descriptor;
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}
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}
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@@ -205,4 +205,4 @@ static const FlipperAppPluginDescriptor plugin_descriptor = {
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const FlipperAppPluginDescriptor* js_keyboard_ep(void) {
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return &plugin_descriptor;
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}
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}
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@@ -2,8 +2,8 @@
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#include "furi_hal_random.h"
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#include <float.h>
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#define JS_MATH_PI ((double)M_PI)
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#define JS_MATH_E ((double)M_E)
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#define JS_MATH_PI ((double)M_PI)
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#define JS_MATH_E ((double)M_E)
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#define JS_MATH_EPSILON ((double)DBL_EPSILON)
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#define TAG "JsMath"
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@@ -106,4 +106,4 @@ static const FlipperAppPluginDescriptor plugin_descriptor = {
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const FlipperAppPluginDescriptor* js_notification_ep(void) {
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return &plugin_descriptor;
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}
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}
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@@ -4,7 +4,7 @@
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#include "../js_modules.h"
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#include <m-array.h>
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#define TAG "js_serial"
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#define TAG "js_serial"
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#define RX_BUF_LEN 2048
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typedef struct {
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@@ -61,4 +61,4 @@ void radio_device_loader_end(const SubGhzDevice* radio_device) {
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if(radio_device != subghz_devices_get_by_name(SUBGHZ_DEVICE_CC1101_INT_NAME)) {
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subghz_devices_end(radio_device);
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}
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}
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}
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@@ -12,4 +12,4 @@ const SubGhzDevice* radio_device_loader_set(
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const SubGhzDevice* current_radio_device,
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SubGhzRadioDeviceType radio_device_type);
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void radio_device_loader_end(const SubGhzDevice* radio_device);
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void radio_device_loader_end(const SubGhzDevice* radio_device);
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@@ -217,4 +217,4 @@ static const FlipperAppPluginDescriptor textbox_plugin_descriptor = {
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const FlipperAppPluginDescriptor* js_textbox_ep(void) {
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return &textbox_plugin_descriptor;
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}
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}
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@@ -4,16 +4,16 @@
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#define TAG "MassStorageSCSI"
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#define SCSI_TEST_UNIT_READY (0x00)
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#define SCSI_REQUEST_SENSE (0x03)
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#define SCSI_INQUIRY (0x12)
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#define SCSI_TEST_UNIT_READY (0x00)
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#define SCSI_REQUEST_SENSE (0x03)
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#define SCSI_INQUIRY (0x12)
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#define SCSI_READ_FORMAT_CAPACITIES (0x23)
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#define SCSI_READ_CAPACITY_10 (0x25)
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#define SCSI_MODE_SENSE_6 (0x1A)
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#define SCSI_READ_10 (0x28)
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#define SCSI_READ_CAPACITY_10 (0x25)
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#define SCSI_MODE_SENSE_6 (0x1A)
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#define SCSI_READ_10 (0x28)
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#define SCSI_PREVENT_MEDIUM_REMOVAL (0x1E)
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#define SCSI_START_STOP_UNIT (0x1B)
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#define SCSI_WRITE_10 (0x2A)
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#define SCSI_START_STOP_UNIT (0x1B)
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#define SCSI_WRITE_10 (0x2A)
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bool scsi_cmd_start(SCSISession* scsi, uint8_t* cmd, uint8_t len) {
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if(!len) {
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@@ -7,8 +7,8 @@
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#define SCSI_SK_ILLEGAL_REQUEST (5)
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#define SCSI_ASC_INVALID_COMMAND_OPERATION_CODE (0x20)
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#define SCSI_ASC_LBA_OOB (0x21)
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#define SCSI_ASC_INVALID_FIELD_IN_CDB (0x24)
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#define SCSI_ASC_LBA_OOB (0x21)
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#define SCSI_ASC_INVALID_FIELD_IN_CDB (0x24)
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typedef struct {
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void* ctx;
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@@ -53,4 +53,4 @@ typedef struct {
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bool scsi_cmd_start(SCSISession* scsi, uint8_t* cmd, uint8_t len);
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bool scsi_cmd_rx_data(SCSISession* scsi, uint8_t* data, uint32_t len);
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bool scsi_cmd_tx_data(SCSISession* scsi, uint8_t* data, uint32_t* len, uint32_t cap);
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bool scsi_cmd_end(SCSISession* scsi);
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bool scsi_cmd_end(SCSISession* scsi);
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@@ -10,14 +10,14 @@
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#define USB_MSC_TX_EP_SIZE (64UL)
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#define USB_MSC_BOT_GET_MAX_LUN (0xFE)
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#define USB_MSC_BOT_RESET (0xFF)
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#define USB_MSC_BOT_RESET (0xFF)
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#define CBW_SIG (0x43425355)
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#define CBW_SIG (0x43425355)
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#define CBW_FLAGS_DEVICE_TO_HOST (0x80)
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#define CSW_SIG (0x53425355)
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#define CSW_STATUS_OK (0)
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#define CSW_STATUS_NOK (1)
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#define CSW_SIG (0x53425355)
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#define CSW_STATUS_OK (0)
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#define CSW_STATUS_NOK (1)
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#define CSW_STATUS_PHASE_ERROR (2)
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// must be SCSI_BLOCK_SIZE aligned
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@@ -124,4 +124,4 @@ bool icm42688_fifo_read(ICM42688P* icm42688p, ICM42688PFifoPacket* data);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -3,174 +3,174 @@
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#define ICM42688_WHOAMI 0x47
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// Bank 0
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#define ICM42688_DEVICE_CONFIG 0x11
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#define ICM42688_DRIVE_CONFIG 0x13
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#define ICM42688_INT_CONFIG 0x14
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#define ICM42688_FIFO_CONFIG 0x16
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#define ICM42688_TEMP_DATA1 0x1D
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#define ICM42688_TEMP_DATA0 0x1E
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#define ICM42688_ACCEL_DATA_X1 0x1F
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#define ICM42688_ACCEL_DATA_X0 0x20
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#define ICM42688_ACCEL_DATA_Y1 0x21
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#define ICM42688_ACCEL_DATA_Y0 0x22
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#define ICM42688_ACCEL_DATA_Z1 0x23
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#define ICM42688_ACCEL_DATA_Z0 0x24
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#define ICM42688_GYRO_DATA_X1 0x25
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#define ICM42688_GYRO_DATA_X0 0x26
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#define ICM42688_GYRO_DATA_Y1 0x27
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#define ICM42688_GYRO_DATA_Y0 0x28
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#define ICM42688_GYRO_DATA_Z1 0x29
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#define ICM42688_GYRO_DATA_Z0 0x2A
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#define ICM42688_TMST_FSYNCH 0x2B
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#define ICM42688_TMST_FSYNCL 0x2C
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#define ICM42688_INT_STATUS 0x2D
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#define ICM42688_FIFO_COUNTH 0x2E
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#define ICM42688_FIFO_COUNTL 0x2F
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#define ICM42688_FIFO_DATA 0x30
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#define ICM42688_APEX_DATA0 0x31
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#define ICM42688_APEX_DATA1 0x32
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#define ICM42688_APEX_DATA2 0x33
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#define ICM42688_APEX_DATA3 0x34
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#define ICM42688_APEX_DATA4 0x35
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#define ICM42688_APEX_DATA5 0x36
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#define ICM42688_INT_STATUS2 0x37
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#define ICM42688_INT_STATUS3 0x38
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#define ICM42688_SIGNAL_PATH_RESET 0x4B
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#define ICM42688_INTF_CONFIG0 0x4C
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#define ICM42688_INTF_CONFIG1 0x4D
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#define ICM42688_PWR_MGMT0 0x4E
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#define ICM42688_GYRO_CONFIG0 0x4F
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#define ICM42688_ACCEL_CONFIG0 0x50
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#define ICM42688_GYRO_CONFIG1 0x51
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#define ICM42688_DEVICE_CONFIG 0x11
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#define ICM42688_DRIVE_CONFIG 0x13
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#define ICM42688_INT_CONFIG 0x14
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#define ICM42688_FIFO_CONFIG 0x16
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#define ICM42688_TEMP_DATA1 0x1D
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#define ICM42688_TEMP_DATA0 0x1E
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#define ICM42688_ACCEL_DATA_X1 0x1F
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#define ICM42688_ACCEL_DATA_X0 0x20
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#define ICM42688_ACCEL_DATA_Y1 0x21
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#define ICM42688_ACCEL_DATA_Y0 0x22
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#define ICM42688_ACCEL_DATA_Z1 0x23
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#define ICM42688_ACCEL_DATA_Z0 0x24
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#define ICM42688_GYRO_DATA_X1 0x25
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#define ICM42688_GYRO_DATA_X0 0x26
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#define ICM42688_GYRO_DATA_Y1 0x27
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#define ICM42688_GYRO_DATA_Y0 0x28
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#define ICM42688_GYRO_DATA_Z1 0x29
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#define ICM42688_GYRO_DATA_Z0 0x2A
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#define ICM42688_TMST_FSYNCH 0x2B
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#define ICM42688_TMST_FSYNCL 0x2C
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#define ICM42688_INT_STATUS 0x2D
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#define ICM42688_FIFO_COUNTH 0x2E
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#define ICM42688_FIFO_COUNTL 0x2F
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#define ICM42688_FIFO_DATA 0x30
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#define ICM42688_APEX_DATA0 0x31
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#define ICM42688_APEX_DATA1 0x32
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#define ICM42688_APEX_DATA2 0x33
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#define ICM42688_APEX_DATA3 0x34
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#define ICM42688_APEX_DATA4 0x35
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#define ICM42688_APEX_DATA5 0x36
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#define ICM42688_INT_STATUS2 0x37
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#define ICM42688_INT_STATUS3 0x38
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#define ICM42688_SIGNAL_PATH_RESET 0x4B
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#define ICM42688_INTF_CONFIG0 0x4C
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#define ICM42688_INTF_CONFIG1 0x4D
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#define ICM42688_PWR_MGMT0 0x4E
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#define ICM42688_GYRO_CONFIG0 0x4F
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#define ICM42688_ACCEL_CONFIG0 0x50
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#define ICM42688_GYRO_CONFIG1 0x51
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#define ICM42688_GYRO_ACCEL_CONFIG0 0x52
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#define ICM42688_ACCEL_CONFIG1 0x53
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#define ICM42688_TMST_CONFIG 0x54
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#define ICM42688_APEX_CONFIG0 0x56
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#define ICM42688_SMD_CONFIG 0x57
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#define ICM42688_FIFO_CONFIG1 0x5F
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#define ICM42688_FIFO_CONFIG2 0x60
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#define ICM42688_FIFO_CONFIG3 0x61
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#define ICM42688_FSYNC_CONFIG 0x62
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#define ICM42688_INT_CONFIG0 0x63
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#define ICM42688_INT_CONFIG1 0x64
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#define ICM42688_INT_SOURCE0 0x65
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#define ICM42688_INT_SOURCE1 0x66
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#define ICM42688_INT_SOURCE3 0x68
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#define ICM42688_INT_SOURCE4 0x69
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#define ICM42688_FIFO_LOST_PKT0 0x6C
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#define ICM42688_FIFO_LOST_PKT1 0x6D
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#define ICM42688_SELF_TEST_CONFIG 0x70
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#define ICM42688_WHO_AM_I 0x75
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#define ICM42688_REG_BANK_SEL 0x76
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#define ICM42688_ACCEL_CONFIG1 0x53
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#define ICM42688_TMST_CONFIG 0x54
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#define ICM42688_APEX_CONFIG0 0x56
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#define ICM42688_SMD_CONFIG 0x57
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#define ICM42688_FIFO_CONFIG1 0x5F
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#define ICM42688_FIFO_CONFIG2 0x60
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#define ICM42688_FIFO_CONFIG3 0x61
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#define ICM42688_FSYNC_CONFIG 0x62
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#define ICM42688_INT_CONFIG0 0x63
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#define ICM42688_INT_CONFIG1 0x64
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#define ICM42688_INT_SOURCE0 0x65
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#define ICM42688_INT_SOURCE1 0x66
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#define ICM42688_INT_SOURCE3 0x68
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#define ICM42688_INT_SOURCE4 0x69
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#define ICM42688_FIFO_LOST_PKT0 0x6C
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#define ICM42688_FIFO_LOST_PKT1 0x6D
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#define ICM42688_SELF_TEST_CONFIG 0x70
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#define ICM42688_WHO_AM_I 0x75
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#define ICM42688_REG_BANK_SEL 0x76
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// Bank 1
|
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#define ICM42688_SENSOR_CONFIG0 0x03
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#define ICM42688_GYRO_CONFIG_STATIC2 0x0B
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#define ICM42688_GYRO_CONFIG_STATIC3 0x0C
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#define ICM42688_GYRO_CONFIG_STATIC4 0x0D
|
||||
#define ICM42688_GYRO_CONFIG_STATIC5 0x0E
|
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#define ICM42688_GYRO_CONFIG_STATIC6 0x0F
|
||||
#define ICM42688_GYRO_CONFIG_STATIC7 0x10
|
||||
#define ICM42688_GYRO_CONFIG_STATIC8 0x11
|
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#define ICM42688_GYRO_CONFIG_STATIC9 0x12
|
||||
#define ICM42688_SENSOR_CONFIG0 0x03
|
||||
#define ICM42688_GYRO_CONFIG_STATIC2 0x0B
|
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#define ICM42688_GYRO_CONFIG_STATIC3 0x0C
|
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#define ICM42688_GYRO_CONFIG_STATIC4 0x0D
|
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#define ICM42688_GYRO_CONFIG_STATIC5 0x0E
|
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#define ICM42688_GYRO_CONFIG_STATIC6 0x0F
|
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#define ICM42688_GYRO_CONFIG_STATIC7 0x10
|
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#define ICM42688_GYRO_CONFIG_STATIC8 0x11
|
||||
#define ICM42688_GYRO_CONFIG_STATIC9 0x12
|
||||
#define ICM42688_GYRO_CONFIG_STATIC10 0x13
|
||||
#define ICM42688_XG_ST_DATA 0x5F
|
||||
#define ICM42688_YG_ST_DATA 0x60
|
||||
#define ICM42688_ZG_ST_DATA 0x61
|
||||
#define ICM42688_TMSTVAL0 0x62
|
||||
#define ICM42688_TMSTVAL1 0x63
|
||||
#define ICM42688_TMSTVAL2 0x64
|
||||
#define ICM42688_INTF_CONFIG4 0x7A
|
||||
#define ICM42688_INTF_CONFIG5 0x7B
|
||||
#define ICM42688_INTF_CONFIG6 0x7C
|
||||
#define ICM42688_XG_ST_DATA 0x5F
|
||||
#define ICM42688_YG_ST_DATA 0x60
|
||||
#define ICM42688_ZG_ST_DATA 0x61
|
||||
#define ICM42688_TMSTVAL0 0x62
|
||||
#define ICM42688_TMSTVAL1 0x63
|
||||
#define ICM42688_TMSTVAL2 0x64
|
||||
#define ICM42688_INTF_CONFIG4 0x7A
|
||||
#define ICM42688_INTF_CONFIG5 0x7B
|
||||
#define ICM42688_INTF_CONFIG6 0x7C
|
||||
|
||||
// Bank 2
|
||||
#define ICM42688_ACCEL_CONFIG_STATIC2 0x03
|
||||
#define ICM42688_ACCEL_CONFIG_STATIC3 0x04
|
||||
#define ICM42688_ACCEL_CONFIG_STATIC4 0x05
|
||||
#define ICM42688_XA_ST_DATA 0x3B
|
||||
#define ICM42688_YA_ST_DATA 0x3C
|
||||
#define ICM42688_ZA_ST_DATA 0x3D
|
||||
#define ICM42688_XA_ST_DATA 0x3B
|
||||
#define ICM42688_YA_ST_DATA 0x3C
|
||||
#define ICM42688_ZA_ST_DATA 0x3D
|
||||
|
||||
// Bank 4
|
||||
#define ICM42688_APEX_CONFIG1 0x40
|
||||
#define ICM42688_APEX_CONFIG2 0x41
|
||||
#define ICM42688_APEX_CONFIG3 0x42
|
||||
#define ICM42688_APEX_CONFIG4 0x43
|
||||
#define ICM42688_APEX_CONFIG5 0x44
|
||||
#define ICM42688_APEX_CONFIG6 0x45
|
||||
#define ICM42688_APEX_CONFIG7 0x46
|
||||
#define ICM42688_APEX_CONFIG8 0x47
|
||||
#define ICM42688_APEX_CONFIG9 0x48
|
||||
#define ICM42688_APEX_CONFIG1 0x40
|
||||
#define ICM42688_APEX_CONFIG2 0x41
|
||||
#define ICM42688_APEX_CONFIG3 0x42
|
||||
#define ICM42688_APEX_CONFIG4 0x43
|
||||
#define ICM42688_APEX_CONFIG5 0x44
|
||||
#define ICM42688_APEX_CONFIG6 0x45
|
||||
#define ICM42688_APEX_CONFIG7 0x46
|
||||
#define ICM42688_APEX_CONFIG8 0x47
|
||||
#define ICM42688_APEX_CONFIG9 0x48
|
||||
#define ICM42688_ACCEL_WOM_X_THR 0x4A
|
||||
#define ICM42688_ACCEL_WOM_Y_THR 0x4B
|
||||
#define ICM42688_ACCEL_WOM_Z_THR 0x4C
|
||||
#define ICM42688_INT_SOURCE6 0x4D
|
||||
#define ICM42688_INT_SOURCE7 0x4E
|
||||
#define ICM42688_INT_SOURCE8 0x4F
|
||||
#define ICM42688_INT_SOURCE9 0x50
|
||||
#define ICM42688_INT_SOURCE10 0x51
|
||||
#define ICM42688_OFFSET_USER0 0x77
|
||||
#define ICM42688_OFFSET_USER1 0x78
|
||||
#define ICM42688_OFFSET_USER2 0x79
|
||||
#define ICM42688_OFFSET_USER3 0x7A
|
||||
#define ICM42688_OFFSET_USER4 0x7B
|
||||
#define ICM42688_OFFSET_USER5 0x7C
|
||||
#define ICM42688_OFFSET_USER6 0x7D
|
||||
#define ICM42688_OFFSET_USER7 0x7E
|
||||
#define ICM42688_OFFSET_USER8 0x7F
|
||||
#define ICM42688_INT_SOURCE6 0x4D
|
||||
#define ICM42688_INT_SOURCE7 0x4E
|
||||
#define ICM42688_INT_SOURCE8 0x4F
|
||||
#define ICM42688_INT_SOURCE9 0x50
|
||||
#define ICM42688_INT_SOURCE10 0x51
|
||||
#define ICM42688_OFFSET_USER0 0x77
|
||||
#define ICM42688_OFFSET_USER1 0x78
|
||||
#define ICM42688_OFFSET_USER2 0x79
|
||||
#define ICM42688_OFFSET_USER3 0x7A
|
||||
#define ICM42688_OFFSET_USER4 0x7B
|
||||
#define ICM42688_OFFSET_USER5 0x7C
|
||||
#define ICM42688_OFFSET_USER6 0x7D
|
||||
#define ICM42688_OFFSET_USER7 0x7E
|
||||
#define ICM42688_OFFSET_USER8 0x7F
|
||||
|
||||
// PWR_MGMT0
|
||||
#define ICM42688_PWR_TEMP_ON (0 << 5)
|
||||
#define ICM42688_PWR_TEMP_OFF (1 << 5)
|
||||
#define ICM42688_PWR_IDLE (1 << 4)
|
||||
#define ICM42688_PWR_GYRO_MODE_OFF (0 << 2)
|
||||
#define ICM42688_PWR_GYRO_MODE_LN (3 << 2)
|
||||
#define ICM42688_PWR_TEMP_ON (0 << 5)
|
||||
#define ICM42688_PWR_TEMP_OFF (1 << 5)
|
||||
#define ICM42688_PWR_IDLE (1 << 4)
|
||||
#define ICM42688_PWR_GYRO_MODE_OFF (0 << 2)
|
||||
#define ICM42688_PWR_GYRO_MODE_LN (3 << 2)
|
||||
#define ICM42688_PWR_ACCEL_MODE_OFF (0 << 0)
|
||||
#define ICM42688_PWR_ACCEL_MODE_LP (2 << 0)
|
||||
#define ICM42688_PWR_ACCEL_MODE_LN (3 << 0)
|
||||
#define ICM42688_PWR_ACCEL_MODE_LP (2 << 0)
|
||||
#define ICM42688_PWR_ACCEL_MODE_LN (3 << 0)
|
||||
|
||||
// GYRO_CONFIG0
|
||||
#define ICM42688_GFS_2000DPS (0x00 << 5)
|
||||
#define ICM42688_GFS_1000DPS (0x01 << 5)
|
||||
#define ICM42688_GFS_500DPS (0x02 << 5)
|
||||
#define ICM42688_GFS_250DPS (0x03 << 5)
|
||||
#define ICM42688_GFS_125DPS (0x04 << 5)
|
||||
#define ICM42688_GFS_62_5DPS (0x05 << 5)
|
||||
#define ICM42688_GFS_31_25DPS (0x06 << 5)
|
||||
#define ICM42688_GFS_2000DPS (0x00 << 5)
|
||||
#define ICM42688_GFS_1000DPS (0x01 << 5)
|
||||
#define ICM42688_GFS_500DPS (0x02 << 5)
|
||||
#define ICM42688_GFS_250DPS (0x03 << 5)
|
||||
#define ICM42688_GFS_125DPS (0x04 << 5)
|
||||
#define ICM42688_GFS_62_5DPS (0x05 << 5)
|
||||
#define ICM42688_GFS_31_25DPS (0x06 << 5)
|
||||
#define ICM42688_GFS_15_625DPS (0x07 << 5)
|
||||
|
||||
#define ICM42688_GODR_32kHz 0x01
|
||||
#define ICM42688_GODR_16kHz 0x02
|
||||
#define ICM42688_GODR_8kHz 0x03
|
||||
#define ICM42688_GODR_4kHz 0x04
|
||||
#define ICM42688_GODR_2kHz 0x05
|
||||
#define ICM42688_GODR_1kHz 0x06
|
||||
#define ICM42688_GODR_200Hz 0x07
|
||||
#define ICM42688_GODR_100Hz 0x08
|
||||
#define ICM42688_GODR_50Hz 0x09
|
||||
#define ICM42688_GODR_25Hz 0x0A
|
||||
#define ICM42688_GODR_32kHz 0x01
|
||||
#define ICM42688_GODR_16kHz 0x02
|
||||
#define ICM42688_GODR_8kHz 0x03
|
||||
#define ICM42688_GODR_4kHz 0x04
|
||||
#define ICM42688_GODR_2kHz 0x05
|
||||
#define ICM42688_GODR_1kHz 0x06
|
||||
#define ICM42688_GODR_200Hz 0x07
|
||||
#define ICM42688_GODR_100Hz 0x08
|
||||
#define ICM42688_GODR_50Hz 0x09
|
||||
#define ICM42688_GODR_25Hz 0x0A
|
||||
#define ICM42688_GODR_12_5Hz 0x0B
|
||||
#define ICM42688_GODR_500Hz 0x0F
|
||||
#define ICM42688_GODR_500Hz 0x0F
|
||||
|
||||
// ACCEL_CONFIG0
|
||||
#define ICM42688_AFS_16G (0x00 << 5)
|
||||
#define ICM42688_AFS_8G (0x01 << 5)
|
||||
#define ICM42688_AFS_4G (0x02 << 5)
|
||||
#define ICM42688_AFS_2G (0x03 << 5)
|
||||
#define ICM42688_AFS_8G (0x01 << 5)
|
||||
#define ICM42688_AFS_4G (0x02 << 5)
|
||||
#define ICM42688_AFS_2G (0x03 << 5)
|
||||
|
||||
#define ICM42688_AODR_32kHz 0x01
|
||||
#define ICM42688_AODR_16kHz 0x02
|
||||
#define ICM42688_AODR_8kHz 0x03
|
||||
#define ICM42688_AODR_4kHz 0x04
|
||||
#define ICM42688_AODR_2kHz 0x05
|
||||
#define ICM42688_AODR_1kHz 0x06
|
||||
#define ICM42688_AODR_200Hz 0x07
|
||||
#define ICM42688_AODR_100Hz 0x08
|
||||
#define ICM42688_AODR_50Hz 0x09
|
||||
#define ICM42688_AODR_25Hz 0x0A
|
||||
#define ICM42688_AODR_12_5Hz 0x0B
|
||||
#define ICM42688_AODR_6_25Hz 0x0C
|
||||
#define ICM42688_AODR_3_125Hz 0x0D
|
||||
#define ICM42688_AODR_32kHz 0x01
|
||||
#define ICM42688_AODR_16kHz 0x02
|
||||
#define ICM42688_AODR_8kHz 0x03
|
||||
#define ICM42688_AODR_4kHz 0x04
|
||||
#define ICM42688_AODR_2kHz 0x05
|
||||
#define ICM42688_AODR_1kHz 0x06
|
||||
#define ICM42688_AODR_200Hz 0x07
|
||||
#define ICM42688_AODR_100Hz 0x08
|
||||
#define ICM42688_AODR_50Hz 0x09
|
||||
#define ICM42688_AODR_25Hz 0x0A
|
||||
#define ICM42688_AODR_12_5Hz 0x0B
|
||||
#define ICM42688_AODR_6_25Hz 0x0C
|
||||
#define ICM42688_AODR_3_125Hz 0x0D
|
||||
#define ICM42688_AODR_1_5625Hz 0x0E
|
||||
#define ICM42688_AODR_500Hz 0x0F
|
||||
#define ICM42688_AODR_500Hz 0x0F
|
||||
|
||||
@@ -7,12 +7,12 @@
|
||||
#define ACCEL_GYRO_RATE DataRate100Hz
|
||||
|
||||
#define FILTER_SAMPLE_FREQ 100.f
|
||||
#define FILTER_BETA 0.08f
|
||||
#define FILTER_BETA 0.08f
|
||||
|
||||
#define SAMPLE_RATE_DIV 5
|
||||
|
||||
#define SENSITIVITY_K 30.f
|
||||
#define EXP_RATE 1.1f
|
||||
#define EXP_RATE 1.1f
|
||||
|
||||
#define IMU_CALI_AVG 64
|
||||
|
||||
@@ -325,4 +325,4 @@ float imu_roll_get(Imu* imu) {
|
||||
float imu_yaw_get(Imu* imu) {
|
||||
// we pretend that reading a float is an atomic operation
|
||||
return imu->thread->lefty ? -imu->thread->processed_data.yaw : imu->thread->processed_data.yaw;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -12,4 +12,4 @@ float imu_pitch_get(Imu* imu);
|
||||
|
||||
float imu_roll_get(Imu* imu);
|
||||
|
||||
float imu_yaw_get(Imu* imu);
|
||||
float imu_yaw_get(Imu* imu);
|
||||
|
||||
@@ -6,4 +6,4 @@
|
||||
* Resolver interface with private application's symbols.
|
||||
* Implementation is contained in app_api_table.c
|
||||
*/
|
||||
extern const ElfApiInterface* const application_api_interface;
|
||||
extern const ElfApiInterface* const application_api_interface;
|
||||
|
||||
@@ -15,4 +15,4 @@ uint32_t js_flags_wait(struct mjs* mjs, uint32_t flags, uint32_t timeout);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -1,10 +1,10 @@
|
||||
#include "../js_app_i.h"
|
||||
#include "console_font.h"
|
||||
|
||||
#define CONSOLE_LINES 8
|
||||
#define CONSOLE_CHAR_W 5
|
||||
#define CONSOLE_LINES 8
|
||||
#define CONSOLE_CHAR_W 5
|
||||
#define LINE_BREAKS_MAX 3
|
||||
#define LINE_LEN_MAX (128 / CONSOLE_CHAR_W)
|
||||
#define LINE_LEN_MAX (128 / CONSOLE_CHAR_W)
|
||||
|
||||
struct JsConsoleView {
|
||||
View* view;
|
||||
@@ -161,4 +161,4 @@ void console_view_free(JsConsoleView* console_view) {
|
||||
|
||||
View* console_view_get_view(JsConsoleView* console_view) {
|
||||
return console_view->view;
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user