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MX
2024-07-15 20:02:45 +03:00
parent deeb9dcb15
commit 726cb770d0
488 changed files with 3301 additions and 3288 deletions
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2
targets/f18/furi_hal/furi_hal_version_device.c
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@@ -30,4 +30,4 @@ const char* furi_hal_version_get_srrc_id(void) {
const char* furi_hal_version_get_ncc_id(void) {
return "Pending";
}
}

12
targets/f7/ble_glue/app_conf.h
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@@ -26,12 +26,12 @@
* Define PHY
*/
#define ALL_PHYS_PREFERENCE 0x00
#define RX_2M_PREFERRED 0x02
#define TX_2M_PREFERRED 0x02
#define TX_1M 0x01
#define TX_2M 0x02
#define RX_1M 0x01
#define RX_2M 0x02
#define RX_2M_PREFERRED 0x02
#define TX_2M_PREFERRED 0x02
#define TX_1M 0x01
#define TX_2M 0x02
#define RX_1M 0x01
#define RX_2M 0x02
/******************************************************************************
* BLE Stack

8
targets/f7/ble_glue/app_debug.c
View File

@@ -19,15 +19,15 @@ typedef PACKED_STRUCT {
}
APPD_GpioConfig_t;
#define GPIO_NBR_OF_RF_SIGNALS 9
#define GPIO_CFG_NBR_OF_FEATURES 34
#define NBR_OF_TRACES_CONFIG_PARAMETERS 4
#define GPIO_NBR_OF_RF_SIGNALS 9
#define GPIO_CFG_NBR_OF_FEATURES 34
#define NBR_OF_TRACES_CONFIG_PARAMETERS 4
#define NBR_OF_GENERAL_CONFIG_PARAMETERS 4
/**
* THIS SHALL BE SET TO A VALUE DIFFERENT FROM 0 ONLY ON REQUEST FROM ST SUPPORT
*/
#define BLE_DTB_CFG 0
#define BLE_DTB_CFG 0
// #define BLE_DTB_CFG 7
#define SYS_DBG_CFG1 (SHCI_C2_DEBUG_OPTIONS_IPCORE_LP | SHCI_C2_DEBUG_OPTIONS_CPU2_STOP_EN)

4
targets/f7/ble_glue/ble_event_thread.c
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@@ -9,8 +9,8 @@
#define TAG "BleEvt"
#define BLE_EVENT_THREAD_FLAG_SHCI_EVENT (1UL << 0)
#define BLE_EVENT_THREAD_FLAG_HCI_EVENT (1UL << 1)
#define BLE_EVENT_THREAD_FLAG_SHCI_EVENT (1UL << 0)
#define BLE_EVENT_THREAD_FLAG_HCI_EVENT (1UL << 1)
#define BLE_EVENT_THREAD_FLAG_KILL_THREAD (1UL << 2)
#define BLE_EVENT_THREAD_FLAG_ALL \

12
targets/f7/ble_glue/compiler.h
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@@ -65,7 +65,7 @@
* Usage: PACKED(struct) myStruct_s
* PACKED(union) myStruct_s
*/
#define PACKED(decl) decl __attribute__((packed))
#define PACKED(decl) decl __attribute__((packed))
/**
* @brief SECTION
@@ -79,7 +79,7 @@
* Use the ALIGN_DEF macro to specify the alignment of a variable.
* Usage: ALIGN_DEF(4)
*/
#define ALIGN_DEF(N) __attribute__((aligned(N)))
#define ALIGN_DEF(N) __attribute__((aligned(N)))
/**
* @brief NO_INIT
@@ -87,7 +87,7 @@
* Usage: NO_INIT(int my_no_init_var)
* Usage: NO_INIT(uint16_t my_no_init_array[10])
*/
#define NO_INIT(var) var __attribute__((section(".noinit")))
#define NO_INIT(var) var __attribute__((section(".noinit")))
/**
* @brief This is the section dedicated to Keil toolchain
@@ -105,7 +105,7 @@
* Usage: PACKED(struct) myStruct_s
* PACKED(union) myStruct_s
*/
#define PACKED(decl) decl __attribute__((packed))
#define PACKED(decl) decl __attribute__((packed))
/**
* @brief SECTION
@@ -119,7 +119,7 @@
* Use the ALIGN_DEF macro to specify the alignment of a variable.
* Usage: ALIGN_DEF(4)
*/
#define ALIGN_DEF(N) __attribute__((aligned(N)))
#define ALIGN_DEF(N) __attribute__((aligned(N)))
/**
* @brief NO_INIT
@@ -127,7 +127,7 @@
* Usage: NO_INIT(int my_no_init_var)
* Usage: NO_INIT(uint16_t my_no_init_array[10])
*/
#define NO_INIT(var) var __attribute__((section("NoInit")))
#define NO_INIT(var) var __attribute__((section("NoInit")))
#else

2
targets/f7/ble_glue/extra_beacon.c
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@@ -159,4 +159,4 @@ const GapExtraBeaconConfig* gap_extra_beacon_get_config(void) {
}
return &extra_beacon.last_config;
}
}

4
targets/f7/ble_glue/furi_ble/gatt.h
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@@ -55,8 +55,8 @@ typedef struct {
Char_UUID_t uuid;
// Some packed bitfields to save space
BleGattCharacteristicDataType data_prop_type : 2;
uint8_t is_variable : 2;
uint8_t uuid_type : 2;
uint8_t is_variable : 2;
uint8_t uuid_type : 2;
uint8_t char_properties;
uint8_t security_permissions;
uint8_t gatt_evt_mask;

2
targets/f7/ble_glue/gap.c
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@@ -11,7 +11,7 @@
#define TAG "BleGap"
#define FAST_ADV_TIMEOUT 30000
#define FAST_ADV_TIMEOUT 30000
#define INITIAL_ADV_TIMEOUT 60000
#define GAP_INTERVAL_TO_MS(x) (uint16_t)((x) * 1.25)

2
targets/f7/ble_glue/hsem_map.h
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@@ -8,7 +8,7 @@
* Index of the semaphore used the prevent conflicts after standby sleep.
* Each CPUs takes this semaphore at standby wakeup until conflicting elements are restored.
*/
#define CFG_HW_PWR_STANDBY_SEMID 10
#define CFG_HW_PWR_STANDBY_SEMID 10
/**
* The CPU2 may be configured to store the Thread persistent data either in internal NVM storage on CPU2 or in
* SRAM2 buffer provided by the user application. This can be configured with the system command SHCI_C2_Config()

6
targets/f7/ble_glue/services/battery_service.c
View File

@@ -30,10 +30,10 @@ enum {
};
typedef struct {
uint8_t present : 2;
uint8_t present : 2;
uint8_t discharging : 2;
uint8_t charging : 2;
uint8_t level : 2;
uint8_t charging : 2;
uint8_t level : 2;
} BattrySvcPowerState;
_Static_assert(sizeof(BattrySvcPowerState) == 1, "Incorrect structure size");

2
targets/f7/ble_glue/services/serial_service.h
View File

@@ -11,7 +11,7 @@ extern "C" {
* Serial service. Implements RPC over BLE, with flow control.
*/
#define BLE_SVC_SERIAL_DATA_LEN_MAX (486)
#define BLE_SVC_SERIAL_DATA_LEN_MAX (486)
#define BLE_SVC_SERIAL_CHAR_VALUE_LEN_MAX (243)
typedef enum {

2
targets/f7/ble_glue/tl_dbg_conf.h
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@@ -21,7 +21,7 @@ extern "C" {
#define TL_HCI_CMD_DBG_EN 1 /* Reports BLE command sent to CPU2 and the command response */
#define TL_HCI_CMD_DBG_RAW_EN \
0 /* Reports raw data BLE command sent to CPU2 and the command response */
#define TL_HCI_EVT_DBG_EN 1 /* Reports BLE Asynchronous Events received from CPU2 */
#define TL_HCI_EVT_DBG_EN 1 /* Reports BLE Asynchronous Events received from CPU2 */
#define TL_HCI_EVT_DBG_RAW_EN 0 /* Reports raw data BLE Asynchronous Events received from CPU2 */
#define TL_MM_DBG_EN 1 /* Reports the informations of the buffer released to CPU2 */

2
targets/f7/fatfs/fatfs.h
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@@ -16,4 +16,4 @@ void fatfs_init(void);
#ifdef __cplusplus
}
#endif
#endif

12
targets/f7/fatfs/ffconf.h
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@@ -164,7 +164,7 @@
/* USER CODE BEGIN Volumes */
#define _STR_VOLUME_ID 0 /* 0:Use only 0-9 for drive ID, 1:Use strings for drive ID */
#define _VOLUME_STRS "SD"
#define _VOLUME_STRS "SD"
/* _STR_VOLUME_ID switches string support of volume ID.
/ When _STR_VOLUME_ID is set to 1, also pre-defined strings can be used as drive
/ number in the path name. _VOLUME_STRS defines the drive ID strings for each
@@ -179,8 +179,8 @@
/ When multi-partition is enabled (1), each logical drive number can be bound to
/ arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk()
/ funciton will be available. */
#define _MIN_SS 512 /* 512, 1024, 2048 or 4096 */
#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */
#define _MIN_SS 512 /* 512, 1024, 2048 or 4096 */
#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */
/* These options configure the range of sector size to be supported. (512, 1024,
/ 2048 or 4096) Always set both 512 for most systems, all type of memory cards and
/ harddisk. But a larger value may be required for on-board flash memory and some
@@ -241,8 +241,8 @@
/ lock control is independent of re-entrancy. */
#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
#define _SYNC_t FuriMutex*
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
#define _SYNC_t FuriMutex*
/* The option _FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs
/ module itself. Note that regardless of this option, file access to different
/ volume is always re-entrant and volume control functions, f_mount(), f_mkfs()
@@ -264,7 +264,7 @@
#if !defined(ff_malloc) && !defined(ff_free)
#include <stdlib.h>
#define ff_malloc malloc
#define ff_free free
#define ff_free free
#endif
#endif /* _FFCONF */

4
targets/f7/fatfs/sector_cache.c
View File

@@ -7,7 +7,7 @@
#include <furi_hal_memory.h>
#define SECTOR_SIZE 512
#define N_SECTORS 8
#define N_SECTORS 8
typedef struct {
uint32_t itr;
@@ -53,4 +53,4 @@ void sector_cache_invalidate_range(uint32_t start_sector, uint32_t end_sector) {
cache->sectors[sector_i] = 0;
}
}
}
}

2
targets/f7/fatfs/user_diskio.h
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@@ -10,4 +10,4 @@ extern Diskio_drvTypeDef sd_fatfs_driver;
#ifdef __cplusplus
}
#endif
#endif

6
targets/f7/furi_hal/furi_hal_bus.c
View File

@@ -46,7 +46,7 @@
/* Test macro definitions */
#define FURI_HAL_BUS_IS_ALL_CLEAR(reg, value) (READ_BIT((reg), (value)) == 0UL)
#define FURI_HAL_BUS_IS_ALL_SET(reg, value) (READ_BIT((reg), (value)) == (value))
#define FURI_HAL_BUS_IS_ALL_SET(reg, value) (READ_BIT((reg), (value)) == (value))
#define FURI_HAL_BUS_IS_CLOCK_ENABLED(bus, value, ...) \
(FURI_HAL_BUS_IS_ALL_SET(RCC->bus##ENR##__VA_ARGS__, (value)))
@@ -67,10 +67,10 @@
FURI_HAL_BUS_IS_RESET_ASSERTED(bus, (value), __VA_ARGS__))
/* Control macro definitions */
#define FURI_HAL_BUS_RESET_ASSERT(bus, value, grp) LL_##bus##_GRP##grp##_ForceReset(value)
#define FURI_HAL_BUS_RESET_ASSERT(bus, value, grp) LL_##bus##_GRP##grp##_ForceReset(value)
#define FURI_HAL_BUS_RESET_DEASSERT(bus, value, grp) LL_##bus##_GRP##grp##_ReleaseReset(value)
#define FURI_HAL_BUS_CLOCK_ENABLE(bus, value, grp) LL_##bus##_GRP##grp##_EnableClock(value)
#define FURI_HAL_BUS_CLOCK_ENABLE(bus, value, grp) LL_##bus##_GRP##grp##_EnableClock(value)
#define FURI_HAL_BUS_CLOCK_DISABLE(bus, value, grp) LL_##bus##_GRP##grp##_DisableClock(value)
#define FURI_HAL_BUS_PERIPH_ENABLE(bus, value, grp) \

6
targets/f7/furi_hal/furi_hal_clock.c
View File

@@ -15,10 +15,10 @@
#define CPU_CLOCK_EARLY_HZ 4000000
#define CPU_CLOCK_HSI16_HZ 16000000
#define CPU_CLOCK_HSE_HZ 32000000
#define CPU_CLOCK_PLL_HZ 64000000
#define CPU_CLOCK_HSE_HZ 32000000
#define CPU_CLOCK_PLL_HZ 64000000
#define TICK_INT_PRIORITY 15U
#define TICK_INT_PRIORITY 15U
#define HS_CLOCK_IS_READY() (LL_RCC_HSE_IsReady() && LL_RCC_HSI_IsReady())
#define LS_CLOCK_IS_READY() (LL_RCC_LSE_IsReady() && LL_RCC_LSI1_IsReady())

30
targets/f7/furi_hal/furi_hal_crypto.c
View File

@@ -11,32 +11,32 @@
#define TAG "FuriHalCrypto"
#define ENCLAVE_FACTORY_KEY_SLOTS 10
#define ENCLAVE_SIGNATURE_SIZE 16
#define ENCLAVE_SIGNATURE_SIZE 16
#define CRYPTO_BLK_LEN (4 * sizeof(uint32_t))
#define CRYPTO_BLK_LEN (4 * sizeof(uint32_t))
#define CRYPTO_TIMEOUT_US (1000000)
#define CRYPTO_MODE_ENCRYPT 0U
#define CRYPTO_MODE_INIT (AES_CR_MODE_0)
#define CRYPTO_MODE_DECRYPT (AES_CR_MODE_1)
#define CRYPTO_MODE_ENCRYPT 0U
#define CRYPTO_MODE_INIT (AES_CR_MODE_0)
#define CRYPTO_MODE_DECRYPT (AES_CR_MODE_1)
#define CRYPTO_MODE_DECRYPT_INIT (AES_CR_MODE_0 | AES_CR_MODE_1)
#define CRYPTO_DATATYPE_32B 0U
#define CRYPTO_KEYSIZE_256B (AES_CR_KEYSIZE)
#define CRYPTO_AES_CBC (AES_CR_CHMOD_0)
#define CRYPTO_AES_CBC (AES_CR_CHMOD_0)
#define CRYPTO_AES_CTR (AES_CR_CHMOD_1)
#define CRYPTO_CTR_IV_LEN (12U)
#define CRYPTO_AES_CTR (AES_CR_CHMOD_1)
#define CRYPTO_CTR_IV_LEN (12U)
#define CRYPTO_CTR_CTR_LEN (4U)
#define CRYPTO_AES_GCM (AES_CR_CHMOD_1 | AES_CR_CHMOD_0)
#define CRYPTO_GCM_IV_LEN (12U)
#define CRYPTO_GCM_CTR_LEN (4U)
#define CRYPTO_GCM_TAG_LEN (16U)
#define CRYPTO_GCM_PH_INIT (0x0U << AES_CR_GCMPH_Pos)
#define CRYPTO_GCM_PH_HEADER (AES_CR_GCMPH_0)
#define CRYPTO_AES_GCM (AES_CR_CHMOD_1 | AES_CR_CHMOD_0)
#define CRYPTO_GCM_IV_LEN (12U)
#define CRYPTO_GCM_CTR_LEN (4U)
#define CRYPTO_GCM_TAG_LEN (16U)
#define CRYPTO_GCM_PH_INIT (0x0U << AES_CR_GCMPH_Pos)
#define CRYPTO_GCM_PH_HEADER (AES_CR_GCMPH_0)
#define CRYPTO_GCM_PH_PAYLOAD (AES_CR_GCMPH_1)
#define CRYPTO_GCM_PH_FINAL (AES_CR_GCMPH_1 | AES_CR_GCMPH_0)
#define CRYPTO_GCM_PH_FINAL (AES_CR_GCMPH_1 | AES_CR_GCMPH_0)
static FuriMutex* furi_hal_crypto_mutex = NULL;
static bool furi_hal_crypto_mode_init_done = false;

2
targets/f7/furi_hal/furi_hal_debug.c
View File

@@ -38,4 +38,4 @@ void furi_hal_debug_disable(void) {
bool furi_hal_debug_is_gdb_session_active(void) {
return furi_hal_debug_gdb_session_active;
}
}

20
targets/f7/furi_hal/furi_hal_flash.c
View File

@@ -22,21 +22,21 @@
#define FURI_LOG_T(...)
#endif
#define FURI_HAL_CRITICAL_MSG "Critical flash operation fail"
#define FURI_HAL_FLASH_READ_BLOCK (8U)
#define FURI_HAL_FLASH_WRITE_BLOCK (8U)
#define FURI_HAL_FLASH_PAGE_SIZE (4096U)
#define FURI_HAL_CRITICAL_MSG "Critical flash operation fail"
#define FURI_HAL_FLASH_READ_BLOCK (8U)
#define FURI_HAL_FLASH_WRITE_BLOCK (8U)
#define FURI_HAL_FLASH_PAGE_SIZE (4096U)
#define FURI_HAL_FLASH_CYCLES_COUNT (10000U)
#define FURI_HAL_FLASH_TIMEOUT (1000U)
#define FURI_HAL_FLASH_KEY1 (0x45670123U)
#define FURI_HAL_FLASH_KEY2 (0xCDEF89ABU)
#define FURI_HAL_FLASH_TOTAL_PAGES (256U)
#define FURI_HAL_FLASH_TIMEOUT (1000U)
#define FURI_HAL_FLASH_KEY1 (0x45670123U)
#define FURI_HAL_FLASH_KEY2 (0xCDEF89ABU)
#define FURI_HAL_FLASH_TOTAL_PAGES (256U)
#define FURI_HAL_FLASH_SR_ERRORS \
(FLASH_SR_OPERR | FLASH_SR_PROGERR | FLASH_SR_WRPERR | FLASH_SR_PGAERR | FLASH_SR_SIZERR | \
FLASH_SR_PGSERR | FLASH_SR_MISERR | FLASH_SR_FASTERR | FLASH_SR_RDERR | FLASH_SR_OPTVERR)
#define FURI_HAL_FLASH_OPT_KEY1 (0x08192A3BU)
#define FURI_HAL_FLASH_OPT_KEY2 (0x4C5D6E7FU)
#define FURI_HAL_FLASH_OPT_KEY1 (0x08192A3BU)
#define FURI_HAL_FLASH_OPT_KEY2 (0x4C5D6E7FU)
#define FURI_HAL_FLASH_OB_TOTAL_WORDS (0x80 / (sizeof(uint32_t) * 2))
/* STM32CubeWB/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_RfWithFlash/Core/Src/flash_driver.c

4
targets/f7/furi_hal/furi_hal_flash.h
View File

@@ -9,8 +9,8 @@ extern "C" {
#endif
#define FURI_HAL_FLASH_OB_RAW_SIZE_BYTES 0x80
#define FURI_HAL_FLASH_OB_SIZE_WORDS (FURI_HAL_FLASH_OB_RAW_SIZE_BYTES / sizeof(uint32_t))
#define FURI_HAL_FLASH_OB_TOTAL_VALUES (FURI_HAL_FLASH_OB_SIZE_WORDS / 2)
#define FURI_HAL_FLASH_OB_SIZE_WORDS (FURI_HAL_FLASH_OB_RAW_SIZE_BYTES / sizeof(uint32_t))
#define FURI_HAL_FLASH_OB_TOTAL_VALUES (FURI_HAL_FLASH_OB_SIZE_WORDS / 2)
typedef union {
uint8_t bytes[FURI_HAL_FLASH_OB_RAW_SIZE_BYTES];

6
targets/f7/furi_hal/furi_hal_gpio.c
View File

@@ -39,11 +39,11 @@ static uint32_t furi_hal_gpio_invalid_argument_crash(void) {
furi_hal_gpio_invalid_argument_crash())
#define GET_SYSCFG_EXTI_PORT(port) GPIO_PORT_MAP(port, LL_SYSCFG_EXTI_PORT)
#define GET_SYSCFG_EXTI_LINE(pin) GPIO_PIN_MAP(pin, LL_SYSCFG_EXTI_LINE)
#define GET_EXTI_LINE(pin) GPIO_PIN_MAP(pin, LL_EXTI_LINE_)
#define GET_SYSCFG_EXTI_LINE(pin) GPIO_PIN_MAP(pin, LL_SYSCFG_EXTI_LINE)
#define GET_EXTI_LINE(pin) GPIO_PIN_MAP(pin, LL_EXTI_LINE_)
#define GET_PWR_PORT(port) GPIO_PORT_MAP(port, LL_PWR_GPIO_)
#define GET_PWR_PIN(pin) GPIO_PIN_MAP(pin, LL_PWR_GPIO_BIT_)
#define GET_PWR_PIN(pin) GPIO_PIN_MAP(pin, LL_PWR_GPIO_BIT_)
static volatile GpioInterrupt gpio_interrupt[GPIO_NUMBER];

4
targets/f7/furi_hal/furi_hal_ibutton.c
View File

@@ -7,8 +7,8 @@
#include <furi.h>
#define TAG "FuriHalIbutton"
#define FURI_HAL_IBUTTON_TIMER TIM1
#define TAG "FuriHalIbutton"
#define FURI_HAL_IBUTTON_TIMER TIM1
#define FURI_HAL_IBUTTON_TIMER_BUS FuriHalBusTIM1
#define FURI_HAL_IBUTTON_TIMER_IRQ FuriHalInterruptIdTim1UpTim16

2
targets/f7/furi_hal/furi_hal_idle_timer.h
View File

@@ -8,7 +8,7 @@
// Timer used for tickless idle
#define FURI_HAL_IDLE_TIMER_MAX 0xFFFF
#define FURI_HAL_IDLE_TIMER LPTIM1
#define FURI_HAL_IDLE_TIMER LPTIM1
#define FURI_HAL_IDLE_TIMER_IRQ LPTIM1_IRQn
static inline void furi_hal_idle_timer_init() {

20
targets/f7/furi_hal/furi_hal_infrared.c
View File

@@ -11,7 +11,7 @@
#include <math.h>
#define INFRARED_TIM_TX_DMA_BUFFER_SIZE 200
#define INFRARED_POLARITY_SHIFT 1
#define INFRARED_POLARITY_SHIFT 1
#define INFRARED_TX_CCMR_HIGH \
(TIM_CCMR2_OC3PE | LL_TIM_OCMODE_PWM2) /* Mark time - enable PWM2 mode */
@@ -19,23 +19,23 @@
(TIM_CCMR2_OC3PE | LL_TIM_OCMODE_FORCED_INACTIVE) /* Space time - force low */
/* DMA Channels definition */
#define INFRARED_DMA DMA2
#define INFRARED_DMA DMA2
#define INFRARED_DMA_CH1_CHANNEL LL_DMA_CHANNEL_1
#define INFRARED_DMA_CH2_CHANNEL LL_DMA_CHANNEL_2
#define INFRARED_DMA_CH1_IRQ FuriHalInterruptIdDma2Ch1
#define INFRARED_DMA_CH2_IRQ FuriHalInterruptIdDma2Ch2
#define INFRARED_DMA_CH1_DEF INFRARED_DMA, INFRARED_DMA_CH1_CHANNEL
#define INFRARED_DMA_CH2_DEF INFRARED_DMA, INFRARED_DMA_CH2_CHANNEL
#define INFRARED_DMA_CH1_IRQ FuriHalInterruptIdDma2Ch1
#define INFRARED_DMA_CH2_IRQ FuriHalInterruptIdDma2Ch2
#define INFRARED_DMA_CH1_DEF INFRARED_DMA, INFRARED_DMA_CH1_CHANNEL
#define INFRARED_DMA_CH2_DEF INFRARED_DMA, INFRARED_DMA_CH2_CHANNEL
/* Timers definition */
#define INFRARED_RX_TIMER TIM2
#define INFRARED_DMA_TIMER TIM1
#define INFRARED_RX_TIMER_BUS FuriHalBusTIM2
#define INFRARED_RX_TIMER TIM2
#define INFRARED_DMA_TIMER TIM1
#define INFRARED_RX_TIMER_BUS FuriHalBusTIM2
#define INFRARED_DMA_TIMER_BUS FuriHalBusTIM1
/* Misc */
#define INFRARED_RX_GPIO_ALT GpioAltFn1TIM2
#define INFRARED_RX_IRQ FuriHalInterruptIdTIM2
#define INFRARED_RX_IRQ FuriHalInterruptIdTIM2
typedef struct {
FuriHalInfraredRxCaptureCallback capture_callback;

2
targets/f7/furi_hal/furi_hal_interrupt.c
View File

@@ -527,4 +527,4 @@ const char* furi_hal_interrupt_get_name(uint8_t exception_number) {
uint32_t furi_hal_interrupt_get_time_in_isr_total(void) {
return furi_hal_interrupt.counter_time_in_isr_total;
}
}

4
targets/f7/furi_hal/furi_hal_light.c
View File

@@ -4,9 +4,9 @@
#include <lp5562.h>
#include <stdint.h>
#define LED_CURRENT_RED (50u)
#define LED_CURRENT_RED (50u)
#define LED_CURRENT_GREEN (50u)
#define LED_CURRENT_BLUE (50u)
#define LED_CURRENT_BLUE (50u)
#define LED_CURRENT_WHITE (150u)
void furi_hal_light_init(void) {

2
targets/f7/furi_hal/furi_hal_mpu.c
View File

@@ -69,4 +69,4 @@ void furi_hal_mpu_set_stack_protection(uint32_t* stack) {
furi_hal_mpu_protect_read_only(
FuriHalMpuRegionThreadStack, stack_ptr, FURI_HAL_MPU_STACK_PROTECT_REGION);
}
}

14
targets/f7/furi_hal/furi_hal_nfc_iso15693.c
View File

@@ -6,21 +6,21 @@
#include <furi_hal_resources.h>
#define FURI_HAL_NFC_ISO15693_MAX_FRAME_SIZE (1024U)
#define FURI_HAL_NFC_ISO15693_MAX_FRAME_SIZE (1024U)
#define FURI_HAL_NFC_ISO15693_POLLER_MAX_BUFFER_SIZE (64)
#define FURI_HAL_NFC_ISO15693_RESP_SOF_SIZE (5)
#define FURI_HAL_NFC_ISO15693_RESP_EOF_SIZE (5)
#define FURI_HAL_NFC_ISO15693_RESP_SOF_MASK (0x1FU)
#define FURI_HAL_NFC_ISO15693_RESP_SOF_SIZE (5)
#define FURI_HAL_NFC_ISO15693_RESP_EOF_SIZE (5)
#define FURI_HAL_NFC_ISO15693_RESP_SOF_MASK (0x1FU)
#define FURI_HAL_NFC_ISO15693_RESP_SOF_PATTERN (0x17U)
#define FURI_HAL_NFC_ISO15693_RESP_EOF_PATTERN (0x1DU)
#define FURI_HAL_NFC_ISO15693_RESP_PATTERN_MASK (0x03U)
#define FURI_HAL_NFC_ISO15693_RESP_PATTERN_0 (0x01U)
#define FURI_HAL_NFC_ISO15693_RESP_PATTERN_1 (0x02U)
#define FURI_HAL_NFC_ISO15693_RESP_PATTERN_0 (0x01U)
#define FURI_HAL_NFC_ISO15693_RESP_PATTERN_1 (0x02U)
// Derived experimentally
#define FURI_HAL_NFC_ISO15693_POLLER_FWT_COMP_FC (-1300)
#define FURI_HAL_NFC_ISO15693_POLLER_FWT_COMP_FC (-1300)
#define FURI_HAL_NFC_ISO15693_LISTENER_FDT_COMP_FC (2850)
#define BITS_IN_BYTE (8U)

8
targets/f7/furi_hal/furi_hal_os.c
View File

@@ -15,17 +15,17 @@
#define TAG "FuriHalOs"
#define FURI_HAL_IDLE_TIMER_CLK_HZ 32768
#define FURI_HAL_OS_TICK_HZ configTICK_RATE_HZ
#define FURI_HAL_OS_TICK_HZ configTICK_RATE_HZ
#define FURI_HAL_OS_IDLE_CNT_TO_TICKS(x) (((x) * FURI_HAL_OS_TICK_HZ) / FURI_HAL_IDLE_TIMER_CLK_HZ)
#define FURI_HAL_OS_TICKS_TO_IDLE_CNT(x) (((x) * FURI_HAL_IDLE_TIMER_CLK_HZ) / FURI_HAL_OS_TICK_HZ)
#define FURI_HAL_IDLE_TIMER_TICK_PER_EPOCH (FURI_HAL_OS_IDLE_CNT_TO_TICKS(FURI_HAL_IDLE_TIMER_MAX))
#define FURI_HAL_OS_MAX_SLEEP (FURI_HAL_IDLE_TIMER_TICK_PER_EPOCH - 1)
#define FURI_HAL_OS_MAX_SLEEP (FURI_HAL_IDLE_TIMER_TICK_PER_EPOCH - 1)
#define FURI_HAL_OS_NVIC_IS_PENDING() (NVIC->ISPR[0] || NVIC->ISPR[1])
#define FURI_HAL_OS_EXTI_LINE_0_31 0
#define FURI_HAL_OS_EXTI_LINE_32_63 1
#define FURI_HAL_OS_EXTI_LINE_0_31 0
#define FURI_HAL_OS_EXTI_LINE_32_63 1
// Arbitrary (but small) number for better tick consistency
#define FURI_HAL_OS_EXTRA_CNT 3

112
targets/f7/furi_hal/furi_hal_resources.h
View File

@@ -110,107 +110,107 @@ extern const GpioPin gpio_periph_power;
extern const GpioPin gpio_usb_dm;
extern const GpioPin gpio_usb_dp;
#define BUTTON_BACK_GPIO_Port GPIOC
#define BUTTON_BACK_Pin LL_GPIO_PIN_13
#define BUTTON_DOWN_GPIO_Port GPIOC
#define BUTTON_DOWN_Pin LL_GPIO_PIN_6
#define BUTTON_LEFT_GPIO_Port GPIOB
#define BUTTON_LEFT_Pin LL_GPIO_PIN_11
#define BUTTON_OK_GPIO_Port GPIOH
#define BUTTON_OK_Pin LL_GPIO_PIN_3
#define BUTTON_BACK_GPIO_Port GPIOC
#define BUTTON_BACK_Pin LL_GPIO_PIN_13
#define BUTTON_DOWN_GPIO_Port GPIOC
#define BUTTON_DOWN_Pin LL_GPIO_PIN_6
#define BUTTON_LEFT_GPIO_Port GPIOB
#define BUTTON_LEFT_Pin LL_GPIO_PIN_11
#define BUTTON_OK_GPIO_Port GPIOH
#define BUTTON_OK_Pin LL_GPIO_PIN_3
#define BUTTON_RIGHT_GPIO_Port GPIOB
#define BUTTON_RIGHT_Pin LL_GPIO_PIN_12
#define BUTTON_UP_GPIO_Port GPIOB
#define BUTTON_UP_Pin LL_GPIO_PIN_10
#define BUTTON_RIGHT_Pin LL_GPIO_PIN_12
#define BUTTON_UP_GPIO_Port GPIOB
#define BUTTON_UP_Pin LL_GPIO_PIN_10
#define CC1101_CS_GPIO_Port GPIOD
#define CC1101_CS_Pin LL_GPIO_PIN_0
#define CC1101_CS_Pin LL_GPIO_PIN_0
#define CC1101_G0_GPIO_Port GPIOA
#define CC1101_G0_Pin LL_GPIO_PIN_1
#define CC1101_G0_Pin LL_GPIO_PIN_1
#define DISPLAY_CS_GPIO_Port GPIOC
#define DISPLAY_CS_Pin LL_GPIO_PIN_11
#define DISPLAY_DI_GPIO_Port GPIOB
#define DISPLAY_DI_Pin LL_GPIO_PIN_1
#define DISPLAY_CS_GPIO_Port GPIOC
#define DISPLAY_CS_Pin LL_GPIO_PIN_11
#define DISPLAY_DI_GPIO_Port GPIOB
#define DISPLAY_DI_Pin LL_GPIO_PIN_1
#define DISPLAY_RST_GPIO_Port GPIOB
#define DISPLAY_RST_Pin LL_GPIO_PIN_0
#define DISPLAY_RST_Pin LL_GPIO_PIN_0
#define IR_RX_GPIO_Port GPIOA
#define IR_RX_Pin LL_GPIO_PIN_0
#define IR_RX_Pin LL_GPIO_PIN_0
#define IR_TX_GPIO_Port GPIOB
#define IR_TX_Pin LL_GPIO_PIN_9
#define IR_TX_Pin LL_GPIO_PIN_9
#define NFC_CS_GPIO_Port GPIOE
#define NFC_CS_Pin LL_GPIO_PIN_4
#define NFC_CS_Pin LL_GPIO_PIN_4
#define PA4_GPIO_Port GPIOA
#define PA4_Pin LL_GPIO_PIN_4
#define PA4_Pin LL_GPIO_PIN_4
#define PA6_GPIO_Port GPIOA
#define PA6_Pin LL_GPIO_PIN_6
#define PA6_Pin LL_GPIO_PIN_6
#define PA7_GPIO_Port GPIOA
#define PA7_Pin LL_GPIO_PIN_7
#define PA7_Pin LL_GPIO_PIN_7
#define PB2_GPIO_Port GPIOB
#define PB2_Pin LL_GPIO_PIN_2
#define PB2_Pin LL_GPIO_PIN_2
#define PB3_GPIO_Port GPIOB
#define PB3_Pin LL_GPIO_PIN_3
#define PB3_Pin LL_GPIO_PIN_3
#define PC0_GPIO_Port GPIOC
#define PC0_Pin LL_GPIO_PIN_0
#define PC0_Pin LL_GPIO_PIN_0
#define PC1_GPIO_Port GPIOC
#define PC1_Pin LL_GPIO_PIN_1
#define PC1_Pin LL_GPIO_PIN_1
#define PC3_GPIO_Port GPIOC
#define PC3_Pin LL_GPIO_PIN_3
#define PC3_Pin LL_GPIO_PIN_3
#define QUARTZ_32MHZ_IN_GPIO_Port GPIOC
#define QUARTZ_32MHZ_IN_Pin LL_GPIO_PIN_14
#define QUARTZ_32MHZ_IN_GPIO_Port GPIOC
#define QUARTZ_32MHZ_IN_Pin LL_GPIO_PIN_14
#define QUARTZ_32MHZ_OUT_GPIO_Port GPIOC
#define QUARTZ_32MHZ_OUT_Pin LL_GPIO_PIN_15
#define QUARTZ_32MHZ_OUT_Pin LL_GPIO_PIN_15
#define RFID_OUT_GPIO_Port GPIOB
#define RFID_OUT_Pin LL_GPIO_PIN_13
#define RFID_PULL_GPIO_Port GPIOA
#define RFID_PULL_Pin LL_GPIO_PIN_2
#define RFID_RF_IN_GPIO_Port GPIOC
#define RFID_RF_IN_Pin LL_GPIO_PIN_5
#define RFID_OUT_GPIO_Port GPIOB
#define RFID_OUT_Pin LL_GPIO_PIN_13
#define RFID_PULL_GPIO_Port GPIOA
#define RFID_PULL_Pin LL_GPIO_PIN_2
#define RFID_RF_IN_GPIO_Port GPIOC
#define RFID_RF_IN_Pin LL_GPIO_PIN_5
#define RFID_CARRIER_GPIO_Port GPIOA
#define RFID_CARRIER_Pin LL_GPIO_PIN_15
#define RFID_CARRIER_Pin LL_GPIO_PIN_15
#define RF_SW_0_GPIO_Port GPIOC
#define RF_SW_0_Pin LL_GPIO_PIN_4
#define RF_SW_0_Pin LL_GPIO_PIN_4
#define SD_CD_GPIO_Port GPIOC
#define SD_CD_Pin LL_GPIO_PIN_10
#define SD_CD_Pin LL_GPIO_PIN_10
#define SD_CS_GPIO_Port GPIOC
#define SD_CS_Pin LL_GPIO_PIN_12
#define SD_CS_Pin LL_GPIO_PIN_12
#define SPEAKER_GPIO_Port GPIOB
#define SPEAKER_Pin LL_GPIO_PIN_8
#define SPEAKER_Pin LL_GPIO_PIN_8
#define VIBRO_GPIO_Port GPIOA
#define VIBRO_Pin LL_GPIO_PIN_8
#define VIBRO_Pin LL_GPIO_PIN_8
#define iBTN_GPIO_Port GPIOB
#define iBTN_Pin LL_GPIO_PIN_14
#define iBTN_Pin LL_GPIO_PIN_14
#define USART1_TX_Pin LL_GPIO_PIN_6
#define USART1_TX_Pin LL_GPIO_PIN_6
#define USART1_TX_Port GPIOB
#define USART1_RX_Pin LL_GPIO_PIN_7
#define USART1_RX_Pin LL_GPIO_PIN_7
#define USART1_RX_Port GPIOB
#define SPI_D_MISO_GPIO_Port GPIOC
#define SPI_D_MISO_Pin LL_GPIO_PIN_2
#define SPI_D_MISO_Pin LL_GPIO_PIN_2
#define SPI_D_MOSI_GPIO_Port GPIOB
#define SPI_D_MOSI_Pin LL_GPIO_PIN_15
#define SPI_D_SCK_GPIO_Port GPIOD
#define SPI_D_SCK_Pin LL_GPIO_PIN_1
#define SPI_D_MOSI_Pin LL_GPIO_PIN_15
#define SPI_D_SCK_GPIO_Port GPIOD
#define SPI_D_SCK_Pin LL_GPIO_PIN_1
#define SPI_R_MISO_GPIO_Port GPIOB
#define SPI_R_MISO_Pin LL_GPIO_PIN_4
#define SPI_R_MISO_Pin LL_GPIO_PIN_4
#define SPI_R_MOSI_GPIO_Port GPIOB
#define SPI_R_MOSI_Pin LL_GPIO_PIN_5
#define SPI_R_SCK_GPIO_Port GPIOA
#define SPI_R_SCK_Pin LL_GPIO_PIN_5
#define SPI_R_MOSI_Pin LL_GPIO_PIN_5
#define SPI_R_SCK_GPIO_Port GPIOA
#define SPI_R_SCK_Pin LL_GPIO_PIN_5
#define NFC_IRQ_Pin RFID_PULL_Pin
#define NFC_IRQ_Pin RFID_PULL_Pin
#define NFC_IRQ_GPIO_Port RFID_PULL_GPIO_Port
void furi_hal_resources_init_early(void);

40
targets/f7/furi_hal/furi_hal_rfid.c
View File

@@ -9,42 +9,42 @@
#include <stm32wbxx_ll_comp.h>
#include <stm32wbxx_ll_dma.h>
#define FURI_HAL_RFID_READ_TIMER TIM1
#define FURI_HAL_RFID_READ_TIMER_BUS FuriHalBusTIM1
#define FURI_HAL_RFID_READ_TIMER_CHANNEL LL_TIM_CHANNEL_CH1N
#define FURI_HAL_RFID_READ_TIMER TIM1
#define FURI_HAL_RFID_READ_TIMER_BUS FuriHalBusTIM1
#define FURI_HAL_RFID_READ_TIMER_CHANNEL LL_TIM_CHANNEL_CH1N
// We can't use N channel for LL_TIM_OC_Init, so...
#define FURI_HAL_RFID_READ_TIMER_CHANNEL_CONFIG LL_TIM_CHANNEL_CH1
#define FURI_HAL_RFID_EMULATE_TIMER TIM2
#define FURI_HAL_RFID_EMULATE_TIMER_BUS FuriHalBusTIM2
#define FURI_HAL_RFID_EMULATE_TIMER_IRQ FuriHalInterruptIdTIM2
#define FURI_HAL_RFID_EMULATE_TIMER TIM2
#define FURI_HAL_RFID_EMULATE_TIMER_BUS FuriHalBusTIM2
#define FURI_HAL_RFID_EMULATE_TIMER_IRQ FuriHalInterruptIdTIM2
#define FURI_HAL_RFID_EMULATE_TIMER_CHANNEL LL_TIM_CHANNEL_CH3
#define RFID_CAPTURE_TIM TIM2
#define RFID_CAPTURE_TIM TIM2
#define RFID_CAPTURE_TIM_BUS FuriHalBusTIM2
#define RFID_CAPTURE_IND_CH LL_TIM_CHANNEL_CH3
#define RFID_CAPTURE_DIR_CH LL_TIM_CHANNEL_CH4
#define RFID_CAPTURE_IND_CH LL_TIM_CHANNEL_CH3
#define RFID_CAPTURE_DIR_CH LL_TIM_CHANNEL_CH4
// Field presence detection
#define FURI_HAL_RFID_FIELD_FREQUENCY_MIN 80000
#define FURI_HAL_RFID_FIELD_FREQUENCY_MAX 200000
#define FURI_HAL_RFID_FIELD_COUNTER_TIMER TIM2
#define FURI_HAL_RFID_FIELD_COUNTER_TIMER_BUS FuriHalBusTIM2
#define FURI_HAL_RFID_FIELD_COUNTER_TIMER TIM2
#define FURI_HAL_RFID_FIELD_COUNTER_TIMER_BUS FuriHalBusTIM2
#define FURI_HAL_RFID_FIELD_COUNTER_TIMER_CHANNEL LL_TIM_CHANNEL_CH3
#define FURI_HAL_RFID_FIELD_TIMEOUT_TIMER TIM1
#define FURI_HAL_RFID_FIELD_TIMEOUT_TIMER TIM1
#define FURI_HAL_RFID_FIELD_TIMEOUT_TIMER_BUS FuriHalBusTIM1
#define FURI_HAL_RFID_FIELD_DMAMUX_DMA LL_DMAMUX_REQ_TIM1_UP
/* DMA Channels definition */
#define RFID_DMA DMA2
#define RFID_DMA DMA2
#define RFID_DMA_CH1_CHANNEL LL_DMA_CHANNEL_1
#define RFID_DMA_CH2_CHANNEL LL_DMA_CHANNEL_2
#define RFID_DMA_CH1_IRQ FuriHalInterruptIdDma2Ch1
#define RFID_DMA_CH1_DEF RFID_DMA, RFID_DMA_CH1_CHANNEL
#define RFID_DMA_CH2_DEF RFID_DMA, RFID_DMA_CH2_CHANNEL
#define RFID_DMA_CH1_IRQ FuriHalInterruptIdDma2Ch1
#define RFID_DMA_CH1_DEF RFID_DMA, RFID_DMA_CH1_CHANNEL
#define RFID_DMA_CH2_DEF RFID_DMA, RFID_DMA_CH2_CHANNEL
typedef struct {
uint32_t counter;
@@ -60,11 +60,11 @@ typedef struct {
FuriHalRfid* furi_hal_rfid = NULL;
#define LFRFID_LL_READ_TIM TIM1
#define LFRFID_LL_READ_TIM TIM1
#define LFRFID_LL_READ_CONFIG_CHANNEL LL_TIM_CHANNEL_CH1
#define LFRFID_LL_READ_CHANNEL LL_TIM_CHANNEL_CH1N
#define LFRFID_LL_READ_CHANNEL LL_TIM_CHANNEL_CH1N
#define LFRFID_LL_EMULATE_TIM TIM2
#define LFRFID_LL_EMULATE_TIM TIM2
#define LFRFID_LL_EMULATE_CHANNEL LL_TIM_CHANNEL_CH3
void furi_hal_rfid_init(void) {
@@ -588,4 +588,4 @@ bool furi_hal_rfid_field_is_present(uint32_t* frequency) {
return (
(*frequency >= FURI_HAL_RFID_FIELD_FREQUENCY_MIN) &&
(*frequency <= FURI_HAL_RFID_FIELD_FREQUENCY_MAX));
}
}

16
targets/f7/furi_hal/furi_hal_rtc.c
View File

@@ -17,7 +17,7 @@
#define FURI_HAL_RTC_CLOCK_IS_READY() (LL_RCC_LSE_IsReady() && LL_RCC_LSI1_IsReady())
#define FURI_HAL_RTC_HEADER_MAGIC 0x10F1
#define FURI_HAL_RTC_HEADER_MAGIC 0x10F1
#define FURI_HAL_RTC_HEADER_VERSION 0
typedef struct {
@@ -27,17 +27,17 @@ typedef struct {
} FuriHalRtcHeader;
typedef struct {
uint8_t log_level : 4;
uint8_t log_level : 4;
uint8_t log_reserved : 4;
uint8_t flags;
FuriHalRtcBootMode boot_mode : 4;
FuriHalRtcHeapTrackMode heap_track_mode : 2;
FuriHalRtcLocaleUnits locale_units : 1;
FuriHalRtcBootMode boot_mode : 4;
FuriHalRtcHeapTrackMode heap_track_mode : 2;
FuriHalRtcLocaleUnits locale_units : 1;
FuriHalRtcLocaleTimeFormat locale_timeformat : 1;
FuriHalRtcLocaleDateFormat locale_dateformat : 2;
FuriHalRtcLogDevice log_device : 2;
FuriHalRtcLogBaudRate log_baud_rate : 3;
uint8_t reserved : 1;
FuriHalRtcLogDevice log_device : 2;
FuriHalRtcLogBaudRate log_baud_rate : 3;
uint8_t reserved : 1;
} SystemReg;
_Static_assert(sizeof(SystemReg) == 4, "SystemReg size mismatch");

74
targets/f7/furi_hal/furi_hal_sd.c
View File

@@ -11,12 +11,12 @@
#define sd_spi_debug(...)
#endif
#define SD_CMD_LENGTH (6)
#define SD_DUMMY_BYTE (0xFF)
#define SD_CMD_LENGTH (6)
#define SD_DUMMY_BYTE (0xFF)
#define SD_ANSWER_RETRY_COUNT (8)
#define SD_IDLE_RETRY_COUNT (100)
#define SD_TIMEOUT_MS (1000)
#define SD_BLOCK_SIZE (512)
#define SD_IDLE_RETRY_COUNT (100)
#define SD_TIMEOUT_MS (1000)
#define SD_BLOCK_SIZE (512)
#define FLAG_SET(x, y) (((x) & (y)) == (y))
@@ -125,53 +125,53 @@ typedef enum {
*/
typedef struct {
/* Header part */
uint8_t CSDStruct : 2; /* CSD structure */
uint8_t Reserved1 : 6; /* Reserved */
uint8_t TAAC : 8; /* Data read access-time 1 */
uint8_t NSAC : 8; /* Data read access-time 2 in CLK cycles */
uint8_t MaxBusClkFreq : 8; /* Max. bus clock frequency */
uint8_t CSDStruct : 2; /* CSD structure */
uint8_t Reserved1 : 6; /* Reserved */
uint8_t TAAC : 8; /* Data read access-time 1 */
uint8_t NSAC : 8; /* Data read access-time 2 in CLK cycles */
uint8_t MaxBusClkFreq : 8; /* Max. bus clock frequency */
uint16_t CardComdClasses : 12; /* Card command classes */
uint8_t RdBlockLen : 4; /* Max. read data block length */
uint8_t PartBlockRead : 1; /* Partial blocks for read allowed */
uint8_t WrBlockMisalign : 1; /* Write block misalignment */
uint8_t RdBlockMisalign : 1; /* Read block misalignment */
uint8_t DSRImpl : 1; /* DSR implemented */
uint8_t RdBlockLen : 4; /* Max. read data block length */
uint8_t PartBlockRead : 1; /* Partial blocks for read allowed */
uint8_t WrBlockMisalign : 1; /* Write block misalignment */
uint8_t RdBlockMisalign : 1; /* Read block misalignment */
uint8_t DSRImpl : 1; /* DSR implemented */
/* v1 or v2 struct */
union csd_version {
struct {
uint8_t Reserved1 : 2; /* Reserved */
uint16_t DeviceSize : 12; /* Device Size */
uint8_t Reserved1 : 2; /* Reserved */
uint16_t DeviceSize : 12; /* Device Size */
uint8_t MaxRdCurrentVDDMin : 3; /* Max. read current @ VDD min */
uint8_t MaxRdCurrentVDDMax : 3; /* Max. read current @ VDD max */
uint8_t MaxWrCurrentVDDMin : 3; /* Max. write current @ VDD min */
uint8_t MaxWrCurrentVDDMax : 3; /* Max. write current @ VDD max */
uint8_t DeviceSizeMul : 3; /* Device size multiplier */
uint8_t DeviceSizeMul : 3; /* Device size multiplier */
} v1;
struct {
uint8_t Reserved1 : 6; /* Reserved */
uint8_t Reserved1 : 6; /* Reserved */
uint32_t DeviceSize : 22; /* Device Size */
uint8_t Reserved2 : 1; /* Reserved */
uint8_t Reserved2 : 1; /* Reserved */
} v2;
} version;
uint8_t EraseSingleBlockEnable : 1; /* Erase single block enable */
uint8_t EraseSectorSize : 7; /* Erase group size multiplier */
uint8_t WrProtectGrSize : 7; /* Write protect group size */
uint8_t WrProtectGrEnable : 1; /* Write protect group enable */
uint8_t Reserved2 : 2; /* Reserved */
uint8_t WrSpeedFact : 3; /* Write speed factor */
uint8_t MaxWrBlockLen : 4; /* Max. write data block length */
uint8_t WriteBlockPartial : 1; /* Partial blocks for write allowed */
uint8_t Reserved3 : 5; /* Reserved */
uint8_t FileFormatGrouop : 1; /* File format group */
uint8_t CopyFlag : 1; /* Copy flag (OTP) */
uint8_t PermWrProtect : 1; /* Permanent write protection */
uint8_t TempWrProtect : 1; /* Temporary write protection */
uint8_t FileFormat : 2; /* File Format */
uint8_t Reserved4 : 2; /* Reserved */
uint8_t crc : 7; /* Reserved */
uint8_t Reserved5 : 1; /* always 1*/
uint8_t EraseSectorSize : 7; /* Erase group size multiplier */
uint8_t WrProtectGrSize : 7; /* Write protect group size */
uint8_t WrProtectGrEnable : 1; /* Write protect group enable */
uint8_t Reserved2 : 2; /* Reserved */
uint8_t WrSpeedFact : 3; /* Write speed factor */
uint8_t MaxWrBlockLen : 4; /* Max. write data block length */
uint8_t WriteBlockPartial : 1; /* Partial blocks for write allowed */
uint8_t Reserved3 : 5; /* Reserved */
uint8_t FileFormatGrouop : 1; /* File format group */
uint8_t CopyFlag : 1; /* Copy flag (OTP) */
uint8_t PermWrProtect : 1; /* Permanent write protection */
uint8_t TempWrProtect : 1; /* Temporary write protection */
uint8_t FileFormat : 2; /* File Format */
uint8_t Reserved4 : 2; /* Reserved */
uint8_t crc : 7; /* Reserved */
uint8_t Reserved5 : 1; /* always 1*/
} SD_CSD;
@@ -1098,4 +1098,4 @@ FuriStatus furi_hal_sd_info(FuriHalSdInfo* info) {
furi_hal_spi_release(&furi_hal_spi_bus_handle_sd_fast);
return status;
}
}

4
targets/f7/furi_hal/furi_hal_serial.c
View File

@@ -15,10 +15,10 @@
#define FURI_HAL_SERIAL_USART_OVERSAMPLING LL_USART_OVERSAMPLING_16
#define FURI_HAL_SERIAL_USART_DMA_INSTANCE (DMA1)
#define FURI_HAL_SERIAL_USART_DMA_CHANNEL (LL_DMA_CHANNEL_6)
#define FURI_HAL_SERIAL_USART_DMA_CHANNEL (LL_DMA_CHANNEL_6)
#define FURI_HAL_SERIAL_LPUART_DMA_INSTANCE (DMA1)
#define FURI_HAL_SERIAL_LPUART_DMA_CHANNEL (LL_DMA_CHANNEL_7)
#define FURI_HAL_SERIAL_LPUART_DMA_CHANNEL (LL_DMA_CHANNEL_7)
typedef struct {
uint8_t* buffer_rx_ptr;

6
targets/f7/furi_hal/furi_hal_speaker.c
View File

@@ -9,9 +9,9 @@
#define TAG "FuriHalSpeaker"
#define FURI_HAL_SPEAKER_TIMER TIM16
#define FURI_HAL_SPEAKER_CHANNEL LL_TIM_CHANNEL_CH1
#define FURI_HAL_SPEAKER_PRESCALER 500
#define FURI_HAL_SPEAKER_TIMER TIM16
#define FURI_HAL_SPEAKER_CHANNEL LL_TIM_CHANNEL_CH1
#define FURI_HAL_SPEAKER_PRESCALER 500
#define FURI_HAL_SPEAKER_MAX_VOLUME 60
static FuriMutex* furi_hal_speaker_mutex = NULL;

10
targets/f7/furi_hal/furi_hal_spi.c
View File

@@ -11,13 +11,13 @@
#define TAG "FuriHalSpi"
#define SPI_DMA DMA2
#define SPI_DMA DMA2
#define SPI_DMA_RX_CHANNEL LL_DMA_CHANNEL_6
#define SPI_DMA_TX_CHANNEL LL_DMA_CHANNEL_7
#define SPI_DMA_RX_IRQ FuriHalInterruptIdDma2Ch6
#define SPI_DMA_TX_IRQ FuriHalInterruptIdDma2Ch7
#define SPI_DMA_RX_DEF SPI_DMA, SPI_DMA_RX_CHANNEL
#define SPI_DMA_TX_DEF SPI_DMA, SPI_DMA_TX_CHANNEL
#define SPI_DMA_RX_IRQ FuriHalInterruptIdDma2Ch6
#define SPI_DMA_TX_IRQ FuriHalInterruptIdDma2Ch7
#define SPI_DMA_RX_DEF SPI_DMA, SPI_DMA_RX_CHANNEL
#define SPI_DMA_TX_DEF SPI_DMA, SPI_DMA_TX_CHANNEL
// For simplicity, I assume that only one SPI DMA transaction can occur at a time.
static FuriSemaphore* spi_dma_lock = NULL;

8
targets/f7/furi_hal/furi_hal_subghz.c
View File

@@ -20,12 +20,12 @@
static uint32_t furi_hal_subghz_debug_gpio_buff[2] = {0};
/* DMA Channels definition */
#define SUBGHZ_DMA (DMA2)
#define SUBGHZ_DMA (DMA2)
#define SUBGHZ_DMA_CH1_CHANNEL (LL_DMA_CHANNEL_1)
#define SUBGHZ_DMA_CH2_CHANNEL (LL_DMA_CHANNEL_2)
#define SUBGHZ_DMA_CH1_IRQ (FuriHalInterruptIdDma2Ch1)
#define SUBGHZ_DMA_CH1_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH1_CHANNEL
#define SUBGHZ_DMA_CH2_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH2_CHANNEL
#define SUBGHZ_DMA_CH1_IRQ (FuriHalInterruptIdDma2Ch1)
#define SUBGHZ_DMA_CH1_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH1_CHANNEL
#define SUBGHZ_DMA_CH2_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH2_CHANNEL
/** SubGhz state */
typedef enum {

2
targets/f7/furi_hal/furi_hal_subghz.h
View File

@@ -21,7 +21,7 @@ extern "C" {
/** Various subghz defines */
#define FURI_HAL_SUBGHZ_ASYNC_TX_BUFFER_FULL (256u)
#define FURI_HAL_SUBGHZ_ASYNC_TX_BUFFER_HALF (FURI_HAL_SUBGHZ_ASYNC_TX_BUFFER_FULL / 2)
#define FURI_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME (999u)
#define FURI_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME (999u)
/** Switchable Radio Paths */
typedef enum {

2
targets/f7/furi_hal/furi_hal_subghz_i.h
View File

@@ -1,3 +1,3 @@
#pragma once
void furi_hal_subghz_set_dangerous_frequency(bool state_i);
void furi_hal_subghz_set_dangerous_frequency(bool state_i);

8
targets/f7/furi_hal/furi_hal_usb_ccid.c
View File

@@ -12,17 +12,17 @@ static const uint8_t USB_DEVICE_NO_SUBCLASS = 0x0;
static const uint8_t USB_DEVICE_NO_PROTOCOL = 0x0;
#define FIXED_CONTROL_ENDPOINT_SIZE 8
#define IF_NUM_MAX 1
#define IF_NUM_MAX 1
#define CCID_VID_DEFAULT 0x1234
#define CCID_PID_DEFAULT 0xABCD
#define CCID_TOTAL_SLOTS 1
#define CCID_SLOT_INDEX 0
#define CCID_SLOT_INDEX 0
#define CCID_DATABLOCK_SIZE \
(4 + 1 + CCID_SHORT_APDU_SIZE + 1) //APDU Header + Lc + Short APDU size + Le
#define ENDPOINT_DIR_IN 0x80
#define ENDPOINT_DIR_IN 0x80
#define ENDPOINT_DIR_OUT 0x00
#define INTERFACE_ID_CCID 0
@@ -539,4 +539,4 @@ static usbd_respond ccid_control(usbd_device* dev, usbd_ctlreq* req, usbd_rqc_ca
}
}
return usbd_fail;
}
}

8
targets/f7/furi_hal/furi_hal_usb_u2f.c
View File

@@ -6,12 +6,12 @@
#include "usb.h"
#include "usb_hid.h"
#define HID_PAGE_FIDO 0xF1D0
#define HID_FIDO_U2F 0x01
#define HID_FIDO_INPUT 0x20
#define HID_PAGE_FIDO 0xF1D0
#define HID_FIDO_U2F 0x01
#define HID_FIDO_INPUT 0x20
#define HID_FIDO_OUTPUT 0x21
#define HID_EP_IN 0x81
#define HID_EP_IN 0x81
#define HID_EP_OUT 0x01
struct HidIadDescriptor {

4
targets/f7/furi_hal/furi_hal_version.c
View File

@@ -11,8 +11,8 @@
#define TAG "FuriHalVersion"
#define FURI_HAL_VERSION_OTP_HEADER_MAGIC (0xBABE)
#define FURI_HAL_VERSION_OTP_ADDRESS (OTP_AREA_BASE)
#define FURI_HAL_VERSION_PLATFORM_ID (0x0080e126)
#define FURI_HAL_VERSION_OTP_ADDRESS (OTP_AREA_BASE)
#define FURI_HAL_VERSION_PLATFORM_ID (0x0080e126)
/** OTP V0 Structure: prototypes and early EVT */
typedef struct {

2
targets/f7/furi_hal/furi_hal_version_device.c
View File

@@ -30,4 +30,4 @@ const char* furi_hal_version_get_srrc_id(void) {
const char* furi_hal_version_get_ncc_id(void) {
return "CCAJ23LP34D0T3";
}
}

84
targets/f7/inc/FreeRTOSConfig.h
View File

@@ -14,73 +14,73 @@
#define configENABLE_FPU 1
#define configENABLE_MPU 0
#define configUSE_PREEMPTION 1
#define configSUPPORT_STATIC_ALLOCATION 1
#define configUSE_PREEMPTION 1
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 0
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ (SystemCoreClock)
#define configTICK_RATE_HZ_RAW 1000
#define configTICK_RATE_HZ ((TickType_t)configTICK_RATE_HZ_RAW)
#define configMAX_PRIORITIES (32)
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ (SystemCoreClock)
#define configTICK_RATE_HZ_RAW 1000
#define configTICK_RATE_HZ ((TickType_t)configTICK_RATE_HZ_RAW)
#define configMAX_PRIORITIES (32)
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
/* Heap size determined automatically by linker */
// #define configTOTAL_HEAP_SIZE ((size_t)0)
#define configMAX_TASK_NAME_LEN (32)
#define configGENERATE_RUN_TIME_STATS 1
#define configGENERATE_RUN_TIME_STATS 1
#define portGET_RUN_TIME_COUNTER_VALUE() (DWT->CYCCNT)
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configCHECK_FOR_STACK_OVERFLOW 0
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configENABLE_BACKWARD_COMPATIBILITY 0
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configCHECK_FOR_STACK_OVERFLOW 0
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configENABLE_BACKWARD_COMPATIBILITY 0
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#define configUSE_TICKLESS_IDLE 2
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_NEWLIB_REENTRANT 0
#define configUSE_TICKLESS_IDLE 2
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_NEWLIB_REENTRANT 0
/* Defaults to size_t for backward compatibility, but can be changed
if lengths will always be less than the number of bytes in a size_t. */
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 1
#define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 4
#define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 4
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
/* Software timer definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH 256
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH 256
#define configTIMER_SERVICE_TASK_NAME "TimersSrv"
#define configIDLE_TASK_NAME "(-_-)"
#define configIDLE_TASK_NAME "(-_-)"
#define configIDLE_TASK_STACK_DEPTH 128
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_xTaskGetHandle 1
#define INCLUDE_eTaskGetState 1
#define INCLUDE_xTaskGetHandle 1
#define INCLUDE_eTaskGetState 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskDelay 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_xQueueGetMutexHolder 1
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_xTaskGetSchedulerState 1
#define INCLUDE_xTimerPendFunctionCall 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskDelay 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_xQueueGetMutexHolder 1
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_xTaskGetSchedulerState 1
#define INCLUDE_xTimerPendFunctionCall 1
/* Workaround for various notification issues:
* - First one used by system primitives
@@ -138,7 +138,7 @@ header file. */
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define vPortSVCHandler SVC_Handler
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 1

2
targets/f7/inc/furi_config.h
View File

@@ -1,3 +1,3 @@
#pragma once
#define FURI_CONFIG_THREAD_MAX_PRIORITIES (32)
#define FURI_CONFIG_THREAD_MAX_PRIORITIES (32)

10
targets/f7/inc/stm32.h
View File

@@ -4,17 +4,17 @@
/* modify bitfield */
#define _BMD(reg, msk, val) (reg) = (((reg) & ~(msk)) | (val))
/* set bitfield */
#define _BST(reg, bits) (reg) = ((reg) | (bits))
#define _BST(reg, bits) (reg) = ((reg) | (bits))
/* clear bitfield */
#define _BCL(reg, bits) (reg) = ((reg) & ~(bits))
#define _BCL(reg, bits) (reg) = ((reg) & ~(bits))
/* wait until bitfield set */
#define _WBS(reg, bits) while(((reg) & (bits)) == 0)
#define _WBS(reg, bits) while(((reg) & (bits)) == 0)
/* wait until bitfield clear */
#define _WBC(reg, bits) while(((reg) & (bits)) != 0)
#define _WBC(reg, bits) while(((reg) & (bits)) != 0)
/* wait for bitfield value */
#define _WVL(reg, msk, val) while(((reg) & (msk)) != (val))
/* bit value */
#define _BV(bit) (0x01 << (bit))
#define _BV(bit) (0x01 << (bit))
#include "stm32wbxx.h"

2
targets/f7/platform_specific/math_wrapper.h
View File

@@ -1,2 +1,2 @@
#pragma once
#include <math.h>
#include <math.h>

2
targets/furi_hal_include/furi_hal_bt.h
View File

@@ -16,7 +16,7 @@
#define FURI_HAL_BT_STACK_VERSION_MAJOR (1)
#define FURI_HAL_BT_STACK_VERSION_MINOR (12)
#define FURI_HAL_BT_C2_START_TIMEOUT (1000)
#define FURI_HAL_BT_C2_START_TIMEOUT (1000)
#ifdef __cplusplus
extern "C" {

4
targets/furi_hal_include/furi_hal_crypto.h
View File

@@ -51,14 +51,14 @@ extern "C" {
/** Factory provisioned keys slot range. All of them are exactly same on all flippers. */
#define FURI_HAL_CRYPTO_ENCLAVE_FACTORY_KEY_SLOT_START (1u)
#define FURI_HAL_CRYPTO_ENCLAVE_FACTORY_KEY_SLOT_END (10u)
#define FURI_HAL_CRYPTO_ENCLAVE_FACTORY_KEY_SLOT_END (10u)
/** Device unique key slot. This key generated on first use or provisioned by user. Use furi_hal_crypto_enclave_ensure_key before using this slot. */
#define FURI_HAL_CRYPTO_ENCLAVE_UNIQUE_KEY_SLOT (11u)
/** User key slot range. This slots can be used for your needs, but never use them in public apps. */
#define FURI_HAL_CRYPTO_ENCLAVE_USER_KEY_SLOT_START (12u)
#define FURI_HAL_CRYPTO_ENCLAVE_USER_KEY_SLOT_END (100u)
#define FURI_HAL_CRYPTO_ENCLAVE_USER_KEY_SLOT_END (100u)
/** [Deprecated] Indicates availability of advanced crypto functions, will be dropped before v1.0 */
#define FURI_HAL_CRYPTO_ADVANCED_AVAIL 1

2
targets/furi_hal_include/furi_hal_memory.h
View File

@@ -41,4 +41,4 @@ size_t furi_hal_memory_max_pool_block(void);
#ifdef __cplusplus
}
#endif
#endif

2
targets/furi_hal_include/furi_hal_region.h
View File

@@ -75,4 +75,4 @@ const FuriHalRegionBand* furi_hal_region_get_band(uint32_t frequency);
#ifdef __cplusplus
}
#endif
#endif

4
targets/furi_hal_include/furi_hal_usb_hid.h
View File

@@ -10,14 +10,14 @@ extern "C" {
#endif
/** Max number of simultaneously pressed keys (keyboard) */
#define HID_KB_MAX_KEYS 6
#define HID_KB_MAX_KEYS 6
/** Max number of simultaneously pressed keys (consumer control) */
#define HID_CONSUMER_MAX_KEYS 2
/** OS-specific consumer keys, defined as "Reserved" in HID Usage Tables document */
#define HID_CONSUMER_BRIGHTNESS_INCREMENT 0x006F
#define HID_CONSUMER_BRIGHTNESS_DECREMENT 0x0070
#define HID_CONSUMER_FN_GLOBE 0x029D
#define HID_CONSUMER_FN_GLOBE 0x029D
#define HID_KEYBOARD_NONE 0x00

4
targets/furi_hal_include/furi_hal_version.h
View File

@@ -14,9 +14,9 @@
extern "C" {
#endif
#define FURI_HAL_VERSION_NAME_LENGTH 8
#define FURI_HAL_VERSION_NAME_LENGTH 8
#define FURI_HAL_VERSION_ARRAY_NAME_LENGTH (FURI_HAL_VERSION_NAME_LENGTH + 1)
#define FURI_HAL_BT_ADV_NAME_LENGTH (18 + 1) // 18 characters + null terminator
#define FURI_HAL_BT_ADV_NAME_LENGTH (18 + 1) // 18 characters + null terminator
#define FURI_HAL_VERSION_DEVICE_NAME_LENGTH \
(1 + FURI_HAL_BT_ADV_NAME_LENGTH) // Used for custom BT name, BLE symbol + name