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573 lines
28 KiB
Plaintext
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/**
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\mainpage Introduction
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The <b>CMSIS</b> is a set of tools, APIs, frameworks, and work flows that help to simplify software re-use, reduce the
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learning curve for microcontroller developers, speed-up project build and debug, and thus reduce the time to market for new
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applications.
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CMSIS started as a vendor-independent hardware abstraction layer Arm® Cortex®-M based processors and was later
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extended to support entry-level Arm Cortex-A based processors. To simplify access, CMSIS defines generic tool interfaces and
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enables consistent device support by providing simple software interfaces to the processor and the peripherals.
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CMSIS is defined in close cooperation with various silicon and software vendors and provides a common approach to interface
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to peripherals, real-time operating systems, and middleware components. It is intended to enable the combination of software
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components from multiple vendors.
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CMSIS is open-source and collaboratively developed on
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<a href="https://github.com/ARM-software/CMSIS_5" target="_blank">GitHub</a>.
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\section CM_Components CMSIS Components
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| CMSIS-... | Target Processors | Description |
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|:----------|:--------------------|:-------------|
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|<a href="../../Core/html/index.html"><b>Core(M)</b></a>| All Cortex-M, SecurCore | Standardized API for the Cortex-M processor core and peripherals. Includes intrinsic functions for Cortex-M4/M7/M33/M35P SIMD instructions.|
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|<a href="../../Core_A/html/index.html"><b>Core(A)</b></a>| Cortex-A5/A7/A9 | Standardized API and basic run-time system for the Cortex-A5/A7/A9 processor core and peripherals.|
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|<a href="../../Driver/html/index.html"><b>Driver</b></a>| All Cortex | Generic peripheral driver interfaces for middleware. Connects microcontroller peripherals with middleware that implements for example communication stacks, file systems, or graphic user interfaces.|
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|<a href="../../DSP/html/index.html"><b>DSP</b></a>| All Cortex-M | DSP library collection with over 60 functions for various data types: fixed-point (fractional q7, q15, q31) and single precision floating-point (32-bit). Implementations optimized for the SIMD instruction set are available for Cortex-M4/M7/M33/M35P.|
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|<a href="../../NN/html/index.html"><b>NN</b></a>| All Cortex-M | Collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint on Cortex-M processor cores.|
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|<a href="../../RTOS/html/index.html"><b>RTOS v1</b></a>| Cortex-M0/M0+/M3/M4/M7 | Common API for real-time operating systems along with a reference implementation based on RTX. It enables software components that can work across multiple RTOS systems.|
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|<a href="../../RTOS2/html/index.html"><b>RTOS v2</b></a>| All Cortex-M, Cortex-A5/A7/A9 | Extends CMSIS-RTOS v1 with Armv8-M support, dynamic object creation, provisions for multi-core systems, binary compatible interface. |
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|<a href="../../Pack/html/index.html"><b>Pack</b></a>| All Cortex-M, SecurCore, Cortex-A5/A7/A9 | Describes a delivery mechanism for software components, device parameters, and evaluation board support. It simplifies software re-use and product life-cycle management (PLM). <br/>Is part of the <a href="https://www.open-cmsis-pack.org" target="_blank"><b>Open CMSIS Pack project</b></a>. |
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|<a href="../../Build/html/index.html"><b>Build</b></a>| All Cortex-M, SecurCore, Cortex-A5/A7/A9 | A set of tools, software frameworks, and work flows that improve productivity, for example with Continuous Integration (CI).<br/>Is replaced with the <a href="https://github.com/Open-CMSIS-Pack/devtools/tree/main/tools" target="_blank"><b>CMSIS-Toolbox</b></a>. |
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|<a href="../../SVD/html/index.html"><b>SVD</b></a>| All Cortex-M, SecurCore | Peripheral description of a device that can be used to create peripheral awareness in debuggers or CMSIS-Core header files.|
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|<a href="../../DAP/html/index.html"><b>DAP</b></a>| All Cortex | Firmware for a debug unit that interfaces to the CoreSight Debug Access Port. |
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|<a href="../../Zone/html/index.html"><b>Zone</b></a>| All Cortex-M | Defines methods to describe system resources and to partition these resources into multiple projects and execution areas. |
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\section Motivation Motivation
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CMSIS has been created to help the industry in standardization. It enables consistent software layers and device support
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across a wide range of development tools and microcontrollers. CMSIS is not a huge software layer that introduces overhead
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and does not define standard peripherals. The silicon industry can therefore support the wide variations of Arm Cortex
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processor-based devices with this common standard.
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\image html Overview.png "CMSIS Structure"
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The benefits of the CMSIS are:
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- CMSIS reduces the learning curve, development costs, and time-to-market. Developers can write software quicker through a
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variety of easy-to-use, standardized software interfaces.
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- Consistent software interfaces improve the software portability and re-usability. Generic software libraries and
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interfaces provide consistent software framework.
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- It provides interfaces for debug connectivity, debug peripheral views, software delivery, and device support to reduce
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time-to-market for new microcontroller deployment.
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- It allows to use the compiler of your choice, as it is compiler independent and thus supported by mainstream compilers.
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- It enhances program debugging with peripheral information for debuggers and ITM channels for printf-style output.
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- CMSIS is delivered in CMSIS-Pack format which enables fast software delivery, simplifies updates, and enables consistent
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integration into development tools.
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- CMSIS-Zone will simplify system resource and partitioning as it manages the configuration of multiple processors, memory
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areas, and peripherals.
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- Continuous integration is common practice for most software developers nowadays. CMSIS-Build supports these workflows
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and makes continuous testing and validation easier.
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\section CodingRules Coding Rules
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The CMSIS uses the following essential coding rules and conventions:
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- Compliant with ANSI C (C99) and C++ (C++03).
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- Uses ANSI C standard data types defined in \b <stdint.h>.
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- Variables and parameters have a complete data type.
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- Expressions for \c \#define constants are enclosed in parenthesis.
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- Conforms to MISRA 2012 (but does not claim MISRA compliance). MISRA rule violations are documented.
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In addition, the CMSIS recommends the following conventions for identifiers:
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- \b CAPITAL names to identify Core Registers, Peripheral Registers, and CPU Instructions.
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- \b CamelCase names to identify function names and interrupt functions.
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- \b Namespace_ prefixes avoid clashes with user identifiers and provide functional groups (i.e. for peripherals, RTOS, or DSP Library).
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The CMSIS is documented within the source files with:
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\li Comments that use the C or C++ style.
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\li <a href="https://www.doxygen.nl/" target="_blank">Doxygen</a> compliant <b>function comments</b> that provide:
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- brief function overview.
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- detailed description of the function.
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- detailed parameter explanation.
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- detailed information about return values.
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Doxygen comment example:
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\verbatim
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/**
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* @brief Enable Interrupt in NVIC Interrupt Controller
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* @param IRQn interrupt number that specifies the interrupt
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* @return none.
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* Enable the specified interrupt in the NVIC Interrupt Controller.
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* Other settings of the interrupt such as priority are not affected.
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*/
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\endverbatim
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\section Validation Validation
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The various components of CMSIS are validated using mainstream compilers. To get a diverse coverage, Arm Compiler v5 (based
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on EDG front-end), Arm Compiler v6 (based on LLVM front-end), and GCC are used in the various tests. For each component, the
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section \b "Validation" describes the scope of the various verification steps.
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CMSIS components are compatible with a range of C and C++ language standards. The CMSIS components comply with the
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<a href="https://developer.arm.com/documentation/ihi0036/d" target="_blank">Application Binary Interface (ABI) for the Arm
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Architecture</a> (exception CMSIS-RTOS v1). This ensures C API interfaces that support inter-operation between various
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toolchains.
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As CMSIS defines API interfaces and functions that scale to a wide range of processors and devices, the scope of
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the run-time test coverage is limited. However, several components are validated using dedicated test suites
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(<a href="../../Driver/html/driverValidation.html">CMSIS-Driver</a>,
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<a href="../../RTOS/html/rtosValidation.html">CMSIS-RTOS v1</a>, and
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<a href="../../RTOS2/html/rtosValidation.html">CMSIS-RTOS v2</a>).
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The CMSIS source code is checked for MISRA C:2012 conformance using PC-Lint. MISRA deviations are documented with
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reasonable effort, however Arm does not claim MISRA compliance as there is today for example no guideline enforcement
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plan. The CMSIS source code is not checked for MISRA C++:2008 conformance as there is a risk that it is incompatible
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with C language standards, specifically warnings that may be generated by the various C compilers.
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\section License License
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CMSIS is provided free of charge by Arm under the <a href="LICENSE.txt">Apache 2.0 License</a>.
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\section CM_Pack_Content CMSIS Software Pack
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CMSIS itself is delivered in <a href="../../Pack/html/index.html">CMSIS-Pack</a> format. The <b>ARM::CMSIS</b> pack contains
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the following:
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File/Directory |Content
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:-----------------|:---------------------------------------------------------------------------------
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\b ARM.CMSIS.pdsc |Package description file in CMSIS-Pack format.
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\b LICENSE.txt |CMSIS License Agreement (Apache 2.0)
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\b CMSIS |\ref CM_Components "CMSIS components" (see also table below)
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\b Device |CMSIS reference implementations of Arm Cortex processor based devices
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CMSIS Directory
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---------------
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Directory |Content
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:-------------------------|:----------------------------------------------------------------------------------------------------------------------------------------
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\b Core |User code templates for <a href="../../Core/html/index.html"><b>CMSIS-Core (Cortex-M)</b></a> related files, referenced in ARM.CMSIS.pdsc
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\b Core_A |User code templates for <a href="../../Core_A/html/index.html"><b>CMSIS-Core (Cortex-A)</b></a> related files, referenced in ARM.CMSIS.pdsc
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\b DAP |<a href="../../DAP/html/index.html"><b>CMSIS-DAP</b></a> Debug Access Port source code and reference implementations
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\b Documentation |This documentation
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\b Driver |Header files for the <a href="../../Driver/html/index.html"><b>CMSIS-Driver</b></a> peripheral interface API
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\b DSP |<a href="../../DSP/html/index.html"><b>CMSIS-DSP</b></a> software library source code
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\b Include |Include files for <a href="../../Core/html/index.html"><b>CMSIS-Core (Cortex-M)</b></a> and <a href="../../DSP/html/index.html"><b>CMSIS-DSP</b></a>
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\b NN |<a href="../../NN/html/index.html"><b>CMSIS-NN</b></a> software library source code
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\b Pack |<a href="../../Pack/html/index.html"><b>CMSIS-Pack</b></a>
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\b RTOS |<a href="../../RTOS/html/index.html"><b>CMSIS-RTOS Version 1</b></a> along with RTX4 reference implementation
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\b RTOS2 |<a href="../../RTOS2/html/index.html"><b>CMSIS-RTOS Version 2</b></a> along with RTX5 reference implementation
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\b SVD |<a href="../../SVD/html/index.html"><b>CMSIS-SVD</b></a>
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\b Utilities |PACK.xsd (<a href="../../Pack/html/packFormat.html#PackSchema"><b>CMSIS-Pack</b> schema file</a>), PackChk.exe (checking tool for software packs), \n CMSIS-SVD.xsd (<a href="../../SVD/html/schema_1_2_gr.html"><b>CMSIS-SVD</b> schema file</a>), SVDConv.exe (conversion tool for SVD files), \n CPRJ.xsd (<a href="../../Build/html/projectDescriptionSchema.html"><b>CMSIS-Build</b> schema file</a>)
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*/
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/*=======0=========1=========2=========3=========4=========5=========6=========7=========8=========9=========0=========1====*/
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/**
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\page cm_revisionHistory Revision History
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The following table shows the overall high-level history of the various CMSIS releases.
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In addition, each CMSIS component has its own release history:
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- <a href="../../Core/html/core_revisionHistory.html"><b>Core (Cortex-M) Revision History</b></a>
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- <a href="../../Core_A/html/rev_histCoreA.html"><b>Core (Cortex-A) Revision History</b></a>
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- <a href="../../Driver/html/driver_revisionHistory.html"><b>Driver Revision History</b></a>
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- <a href="../../DSP/html/ChangeLog_pg.html"><b>DSP Revision History (Change Log)</b></a>
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- <a href="../../NN/html/ChangeLog_pg.html"><b>NN Revision History (Change Log)</b></a>
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- <a href="../../RTOS/html/rtos_revisionHistory.html"><b>RTOS v1 Revision History</b></a>
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- <a href="../../RTOS2/html/rtos_revisionHistory.html"><b>RTOS v2 Revision History</b></a>
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- <a href="../../Pack/html/pack_revisionHistory.html"><b>Pack Revision History</b></a>
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- <a href="../../SVD/html/svd_revisionHistory.html"><b>SVD Revision History</b></a>
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- <a href="../../DAP/html/dap_revisionHistory.html"><b>DAP Revision History</b></a>
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- <a href="../../Zone/html/zone_revisionHistory.html"><b>Zone Revision History</b></a>
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<table class="cmtable" summary="Revision History">
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<tr>
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<th>Version</th>
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<th>Description</th>
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</tr>
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<tr>
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<td>5.9.0</td>
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<td>
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- CMSIS-Core(M): 5.6.0 (see revision history for details)
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- Arm Cortex-M85 cpu support
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- Arm China STAR-MC1 cpu support
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- Updated system_ARMCM55.c
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- CMSIS-Core(A): 1.2.1 (unchanged)
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- CMSIS-Driver: 2.8.0 (unchanged)
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- CMSIS-DSP: 1.10.0 (see revision history for details)
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- CMSIS-NN: 3.1.0 (see revision history for details)
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- Support for int16 convolution and fully connected for reference implementation
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- Support for DSP extension optimization for int16 convolution and fully connected
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- Support dilation for int8 convolution
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- Support dilation for int8 depthwise convolution
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- Support for int16 depthwise conv for reference implementation including dilation
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- Support for int16 average and max pooling for reference implementation
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- Support for elementwise add and mul int16 scalar version
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- Support for softmax int16 scalar version
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- Support for SVDF with 8 bit state tensor
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- CMSIS-RTOS2: 2.1.3 (unchanged)
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- RTX 5.5.4 (see revision history for details)
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- CMSIS-Pack: deprecated (moved to Open-CMSIS-Pack)
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- CMSIS-Build: deprecated (moved to CMSIS-Toolbox in Open-CMSIS-Pack)
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- CMSIS-SVD: 1.3.9 (see revision history for details)
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- CMSIS-DAP: 2.1.1 (see revision history for details)
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- Allow default clock frequency to use fast clock mode
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- CMSIS-Zone: 1.0.0 (unchanged)
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- Devices
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- Support for Cortex-M85
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- Utilities
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- SVDConv 3.3.42
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- PackChk 1.3.95
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</td>
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</tr>
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<tr>
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<td>5.8.0</td>
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<td>
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- CMSIS-Build 0.10.0 (beta)
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- Enhancements (see revision history for details)
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- CMSIS-Core (Cortex-M) 5.5.0
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- Updated GCC LinkerDescription, GCC Assembler startup
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- Added ARMv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
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- Changed C-Startup to default Startup.
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- CMSIS-Core (Cortex-A) 1.2.1
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- CMSIS-Driver 2.8.0 (unchanged)
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- CMSIS-DSP 1.9.0
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- Purged pre-built libs from Git
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- CMSIS-NN 3.0.0
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- Major interface change for functions compatible with TensorFlow Lite for Microcontroller
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- Added optimization for SVDF kernel
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- Improved MVE performance for fully Connected and max pool operator
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- NULL bias support for fully connected operator in non-MVE case(Can affect performance)
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- Expanded existing unit test suite along with support for FVP
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- CMSIS-RTOS 2.1.3 (unchanged)
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- RTX 5.5.3 (see revision history for details)
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- CMSIS-Pack 1.7.2
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- Support for Microchip XC32 compiler
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- Support for Custom Datapath Extension
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- CMSIS-SVD 1.3.3 (unchanged)
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- CMSIS-DAP 2.0.0 (unchanged)
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- CMSIS-Zone 1.0.0 (unchanged)
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- Devices
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- Utilities
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- SVDConv 3.3.35
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- PackChk 1.3.89
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</td>
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</tr>
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<tr>
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<td>5.7.0</td>
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<td>
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- CMSIS-Build 0.9.0 (beta)
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- Draft for CMSIS Project description (CPRJ)
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- CMSIS-Core (Cortex-M) 5.4.0
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- Cortex-M55 cpu support
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- Enhanced MVE support for Armv8.1-MML
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- Fixed device config define checks.
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- L1 Cache functions for Armv7-M and later
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- CMSIS-Core (Cortex-A) 1.2.0
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- Fixed GIC_SetPendingIRQ to use GICD_SGIR
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- Added missing DSP intrinsics
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- Reworked assembly intrinsics: volatile, barriers and clobber
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- CMSIS-Driver 2.8.0
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- Added VIO API 0.1.0 (preview)
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- CMSIS-DSP 1.8.0
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- Added new functions and function groups
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- Added MVE support
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- CMSIS-NN 1.3.0
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- Added MVE support
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- Further optimizations for kernels using DSP extension
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- CMSIS-RTOS 2.1.3 (unchanged)
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- RTX 5.5.2 (see revision history for details)
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- CMSIS-Pack 1.6.3
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- deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
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- CMSIS-SVD 1.3.3 (unchanged)
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- CMSIS-DAP 2.0.0 (unchanged)
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- CMSIS-Zone 1.0.0
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- Devices
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- ARMCM55 device
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- ARMv81MML startup code recognizing __MVE_USED macro
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- Refactored vector table references for all Cortex-M devices
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- Reworked ARMCM* C-StartUp files.
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- Include L1 Cache functions in ARMv8MML/ARMv81MML devices
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- Utilities
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Attention: Linux binaries moved to Linux64 folder!
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- SVDConv 3.3.35
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- PackChk 1.3.89
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</td>
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</tr>
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<tr>
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<td>5.6.0</td>
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<td>
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- CMSIS-Core (Cortex-M) 5.3.0
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- Added provisions for compiler-independent C startup code.
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- CMSIS-Core (Cortex-A) 1.1.4
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- Fixed __FPU_Enable.
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- CMSIS-Driver 2.7.1
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- Finalized WiFi Interface API 1.0.0
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- CMSIS-DSP 1.7.0 (see revision history for details)
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- New Neon versions of f32 functions
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- Compilation flags for FFTs
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- CMSIS-NN 1.2.0 (unchanged)
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- CMSIS-RTOS1 1.03 (unchanged)
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- RTX 4.82.0 (see revision history for details)
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- CMSIS-RTOS 2.1.3 (unchanged)
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- RTX 5.5.1 (see revision history for details)
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||
|
- CMSIS-Pack 1.6.0 (unchanged)
|
||
|
- CMSIS-SVD 1.3.3 (unchanged)
|
||
|
- CMSIS-DAP 2.0.0 (unchanged)
|
||
|
- CMSIS-Zone 0.12.0 (preview)
|
||
|
- Completely reworked
|
||
|
- Devices
|
||
|
- Generalized C startup code for all Cortex-M family devices.
|
||
|
- Updated Cortex-A memory regions and system configuration files.
|
||
|
- Utilities
|
||
|
- SVDConv 3.3.27
|
||
|
- PackChk 1.3.82 (unchanged)
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>5.5.1</td>
|
||
|
<td>
|
||
|
- CMSIS-Core (Cortex-M) 5.2.1
|
||
|
- Fixed compilation issue in cmsis_armclang_ltm.h
|
||
|
- CMSIS-Core (Cortex-A) 1.1.3 (unchanged)
|
||
|
- CMSIS-Driver 2.7.0 (unchanged)
|
||
|
- CMSIS-DSP 1.6.0 (unchanged)
|
||
|
- CMSIS-NN 1.1.0 (unchanged)
|
||
|
- CMSIS-RTOS 2.1.3 (unchanged)
|
||
|
- RTX 5.5.0 (unchanged)
|
||
|
- CMSIS-Pack 1.6.0 (unchanged)
|
||
|
- CMSIS-SVD 1.3.3 (unchanged)
|
||
|
- CMSIS-DAP 2.0.0 (unchanged)
|
||
|
- CMSIS-Zone 0.9.0 (unchanged)
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>5.5.0</td>
|
||
|
<td>
|
||
|
- CMSIS-Core (Cortex-M) 5.2.0
|
||
|
- Reworked Stack/Heap configuration for ARM startup files.
|
||
|
- Added Cortex-M35P device support.
|
||
|
- Added generic Armv8.1-M Mainline device support.
|
||
|
- CMSIS-Core (Cortex-A) 1.1.3 Minor fixes.
|
||
|
- CMSIS-DSP 1.6.0
|
||
|
- reworked DSP library source files
|
||
|
- added macro ARM_MATH_LOOPUNROLL
|
||
|
- removed macro UNALIGNED_SUPPORT_DISABLE
|
||
|
- added const-correctness
|
||
|
- replaced SIMD pointer construct with memcopy solution
|
||
|
- replaced macro combination "CMSIS_INLINE __STATIC_INLINE with "__STATIC_FORCEINLINE"
|
||
|
- reworked DSP library documentation
|
||
|
- Changed DSP folder structure
|
||
|
- moved DSP libraries to ./DSP/Lib
|
||
|
- moved DSP libraries to folder ./DSP/Lib
|
||
|
- ARM DSP Libraries are built with ARMCLANG
|
||
|
- Added DSP Libraries Source variant
|
||
|
- CMSIS-NN 1.1.0 (unchanged)
|
||
|
- CMSIS-Driver 2.7.0
|
||
|
- Added WiFi Interface API 1.0.0-beta
|
||
|
- Added custom driver selection to simplify implementation of new CMSIS-Driver
|
||
|
- CMSIS-RTOS 2.1.3
|
||
|
- RTX 5.5.0 (see revision history)
|
||
|
- CMSIS-Pack 1.6.0
|
||
|
- CMSIS-SVD 1.3.3 (unchanged)
|
||
|
- CMSIS-DAP 2.0.0 (unchanged)
|
||
|
- CMSIS-Zone 0.9.0 (Preview)
|
||
|
- Devices
|
||
|
- Added Cortex-M35P and ARMv81MML device templates.
|
||
|
- Fixed C-Startup Code for GCC (aligned with other compilers)
|
||
|
- Moved call to SystemInit before memory initialization.
|
||
|
- Utilities
|
||
|
- SVDConv 3.3.25
|
||
|
- PackChk 1.3.82
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>5.4.0</td>
|
||
|
<td>
|
||
|
- CMSIS-Core (Cortex-M) 5.1.2 Minor fixes and slight enhancements, e.g. beta for Cortex-M1.
|
||
|
- CMSIS-Core (Cortex-A) 1.1.2 Minor fixes.
|
||
|
- CMSIS-Driver 2.6.0 (unchanged)
|
||
|
- CMSIS-DSP 1.5.2 (unchanged)
|
||
|
- CMSIS-NN 1.1.0 Added new math function (see revision history)
|
||
|
- CMSIS-RTOS 2.1.3 Relaxed interrupt usage.
|
||
|
- RTX 5.4.0 (see revision history)
|
||
|
- CMSIS-Pack 1.5.0 (unchanged)
|
||
|
- CMSIS-SVD 1.3.3 (unchanged)
|
||
|
- CMSIS-DAP 2.0.0 (unchanged)
|
||
|
- CMSIS-Zone 0.0.1 (unchanged)
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>5.3.0</td>
|
||
|
<td>
|
||
|
- CMSIS-Core (Cortex-M) 5.1.1
|
||
|
- CMSIS-Core (Cortex-A) 1.1.1
|
||
|
- CMSIS-Driver 2.6.0 (unchanged)
|
||
|
- CMSIS-DSP 1.5.2 (unchanged)
|
||
|
- CMSIS-NN 1.0.0 Initial contribution of Neural Network Library.
|
||
|
- CMSIS-RTOS 2.1.2 (unchanged)
|
||
|
- CMSIS-Pack 1.5.0 (unchanged)
|
||
|
- CMSIS-SVD 1.3.3 (unchanged)
|
||
|
- CMSIS-DAP 2.0.0 Communication via WinUSB to achieve high-speed transfer rates.
|
||
|
- CMSIS-Zone 0.0.1 (unchanged)
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>5.2.0</td>
|
||
|
<td>
|
||
|
- CMSIS-Core (Cortex-M) 5.1.0 MPU functions for ARMv8-M, cmsis_iccarm.h replacing cmsis_iar.h
|
||
|
- CMSIS-Core (Cortex-A) 1.1.0 cmsis_iccarm.h, additional physical timer access functions
|
||
|
- CMSIS-Driver 2.6.0 Enhanced CAN and NAND driver interface.
|
||
|
- CMSIS-DSP 1.5.2 Fixed diagnostics and moved SSAT/USST intrinsics to CMSIS-Core.
|
||
|
- CMSIS-RTOS 2.1.2 Relaxed some ISR-callable restrictions.
|
||
|
- CMSIS-Pack 1.5.0 (unchanged)
|
||
|
- CMSIS-SVD 1.3.3 (unchanged)
|
||
|
- CMSIS-DAP 1.2.0 (unchanged)
|
||
|
- CMSIS-Zone 0.0.1 (unchanged)
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>5.1.1</td>
|
||
|
<td>
|
||
|
- CMSIS-Core (Cortex-M) (unchanged)
|
||
|
- CMSIS-Core (Cortex-A) (unchanged)
|
||
|
- CMSIS-Driver 2.05 (unchanged)
|
||
|
- CMSIS-DSP 1.5.2 (unchanged)
|
||
|
- CMSIS-RTOS 2.1.1 Fixed RTX5 pre-built libraries for Cortex-M.
|
||
|
- CMSIS-Pack 1.5.0 (unchanged)
|
||
|
- CMSIS-SVD 1.3.3 (unchanged)
|
||
|
- CMSIS-DAP 1.1.0 (unchanged)
|
||
|
- CMSIS-Zone 0.0.1 (unchanged)
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>5.1.0</td>
|
||
|
<td>
|
||
|
- CMSIS-Core (Cortex-M) 5.0.2 several minor corrections and enhancements
|
||
|
- CMSIS-Core (Cortex-A) 1.0.0 implements a basic run-time system for Cortex-A5/A7/A9
|
||
|
- CMSIS-Driver 2.05 status typedef made volatile
|
||
|
- CMSIS-DSP 1.5.2 fixed GNU Compiler specific diagnostics
|
||
|
- CMSIS-RTOS 2.1.1 added support for Cortex-A5/A7/A9 to RTX5
|
||
|
- CMSIS-Pack 1.5.0 added SDF format specification
|
||
|
- CMSIS-SVD 1.3.3 (unchanged)
|
||
|
- CMSIS-DAP 1.1.0 (unchanged)
|
||
|
- CMSIS-Zone 0.0.1 (Preview) format to describe system resources and tool for partitioning of resources
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>5.0.1</td>
|
||
|
<td>
|
||
|
- CMSIS-Core 5.0.1 added __PACKED_STRUCT macro and uVisor support
|
||
|
- CMSIS-Driver 2.05 updated all typedefs related to status now being volatile.
|
||
|
- CMSIS-DSP 1.5.1 added ARMv8M DSP libraries
|
||
|
- CMSIS-RTOS 2.1.0 added support for critical and uncritical sections
|
||
|
- CMSIS-Pack 1.4.8 add Pack Index File specification
|
||
|
- CMSIS-SVD 1.3.3 (unchanged)
|
||
|
- CMSIS-DAP 1.1.0 (unchanged)
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>5.0.0</td>
|
||
|
<td>
|
||
|
Added support for: <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" target="_blank"><b>ARMv8-M architecture</b></a> including TrustZone for ARMv8-M and Cortex-M23, Cortex-M33 processors
|
||
|
- CMSIS-Core (Cortex-M) 5.0.0 added support for ARMv8-M and Cortex-M23, Cortex-M33 processors
|
||
|
- CMSIS-Driver 2.04.0 (unchanged)
|
||
|
- CMSIS-DSP 1.4.9 minor corrections and performance improvements
|
||
|
- CMSIS-RTOS 2.0.0 new API with RTX 5.0.0 reference implementation and corrections in RTX 4.8.2
|
||
|
- CMSIS-Pack 1.4.4 introducing CPDSC project description
|
||
|
- CMSIS-SVD 1.3.3 several enhancements and rework of documentation
|
||
|
- CMSIS-DAP 1.1.0 (unchanged)
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>4.5.0</td>
|
||
|
<td>
|
||
|
Maintenance release that is fixing defects. See component's revision history for more details.
|
||
|
See component's revision history for more details.
|
||
|
- CMSIS-Core (Cortex-M) 4.30.0
|
||
|
- CMSIS-DAP 1.1.0 (unchanged)
|
||
|
- CMSIS-Driver 2.04.0
|
||
|
- CMSIS-DSP 1.4.7
|
||
|
- CMSIS-Pack 1.4.1
|
||
|
- CMSIS-RTOS RTX 4.80.0
|
||
|
- CMSIS-SVD 1.3.1
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>4.4.0</td>
|
||
|
<td>
|
||
|
Feature release adding CMSIS-DAP (see extended End User Licence Agreement) and CMSIS-Driver for CAN.
|
||
|
See component's revision history for more details.
|
||
|
- CMSIS-Core (Cortex-M) 4.20.0
|
||
|
- CMSIS-DAP 1.1.0
|
||
|
- CMSIS-Driver 2.03.0
|
||
|
- CMSIS-DSP 1.4.5 (unchanged)
|
||
|
- CMSIS-RTOS RTX 4.79.0
|
||
|
- CMSIS-Pack 1.4.0
|
||
|
- CMSIS-SVD 1.3.0
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>4.3.0</td>
|
||
|
<td>
|
||
|
Maintenance release adding SAI CMSIS-Driver and fixing defects. See component's revision history for more details.
|
||
|
- CMSIS-Core (Cortex-M) 4.10.0
|
||
|
- CMSIS-Driver 2.02.0
|
||
|
- CMSIS-DSP 1.4.5
|
||
|
- CMSIS-RTOS RTX 4.78.0
|
||
|
- CMSIS-Pack 1.3.3
|
||
|
- CMSIS-SVD (unchanged)
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>4.2</td>
|
||
|
<td>Introducing processor support for Cortex-M7.
|
||
|
</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>4.1</td>
|
||
|
<td>Enhancements in CMSIS-Pack and CMSIS-Driver.\n
|
||
|
Added: PackChk validation utility\n
|
||
|
Removed support for GNU: Sourcery G++ Lite Edition for ARM</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>4.0</td>
|
||
|
<td>First release in CMSIS-Pack format.\n Added specifications for CMSIS-Pack, CMSIS-Driver</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>3.30</td>
|
||
|
<td>Maintenance release with enhancements in each component</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>3.20</td>
|
||
|
<td>Maintenance release with enhancements in each component</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>3.01</td>
|
||
|
<td>Added support for Cortex-M0+ processors</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>3.00</td>
|
||
|
<td>Added support for SC000 and SC300 processors\n
|
||
|
Added support for GNU GCC Compiler\n
|
||
|
Added CMSIS-RTOS API</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>2.10</td>
|
||
|
<td>Added CMSIS-DSP Library</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>2.0</td>
|
||
|
<td>Added support for Cortex-M4 processor</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>1.30</td>
|
||
|
<td>Reworked CMSIS startup concept</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>1.01</td>
|
||
|
<td>Added support for Cortex-M0 processor</td>
|
||
|
</tr>
|
||
|
<tr>
|
||
|
<td>1.00</td>
|
||
|
<td>Initial release of CMSIS-Core (Cortex-M) for Cortex-M3 processor</td>
|
||
|
</tr>
|
||
|
</table>
|
||
|
|
||
|
*/
|