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Code Issues Releases Activity

compile fix in app.c

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OneOfEleven 2023-10-28 10:15:40 +01:00
parent 2e0b431fd4
commit 0082876274
5 changed files with 23 additions and 17 deletions
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4
app/app.c
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@ -2135,8 +2135,8 @@ void APP_time_slice_500ms(void)
if (g_dtmf_rx_live_timeout > 0) if (g_dtmf_rx_live_timeout > 0)
{ {
#ifdef ENABLE_RX_SIGNAL_BAR #ifdef ENABLE_RX_SIGNAL_BAR
if (center_line == CENTER_LINE_DTMF_DEC || if (g_center_line == CENTER_LINE_DTMF_DEC ||
center_line == CENTER_LINE_NONE) // wait till the center line is free for us to use before timing out g_center_line == CENTER_LINE_NONE) // wait till the center line is free for us to use before timing out
#endif #endif
{ {
if (--g_dtmf_rx_live_timeout == 0) if (--g_dtmf_rx_live_timeout == 0)

18
driver/bk4819.c
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@ -2173,13 +2173,15 @@ void BK4819_reset_fsk(void)
// //
// <15:8> sync byte 0 // <15:8> sync byte 0
// < 7:0> sync byte 1 // < 7:0> sync byte 1
BK4819_WriteRegister(0x5A, ((uint16_t)mdc1200_sync_suc_xor[0] << 8) | (mdc1200_sync_suc_xor[1] << 0)); // BK4819_WriteRegister(0x5A, ((uint16_t)mdc1200_sync_suc_xor[0] << 8) | (mdc1200_sync_suc_xor[1] << 0));
BK4819_WriteRegister(0x5A, ((uint16_t)mdc1200_sync_suc_xor[1] << 8) | (mdc1200_sync_suc_xor[2] << 0));
// REG_5B .. bytes 2 & 3 sync pattern // REG_5B .. bytes 2 & 3 sync pattern
// //
// <15:8> sync byte 2 // <15:8> sync byte 2
// < 7:0> sync byte 3 // < 7:0> sync byte 3
BK4819_WriteRegister(0x5B, ((uint16_t)mdc1200_sync_suc_xor[2] << 8) | (mdc1200_sync_suc_xor[3] << 0)); // BK4819_WriteRegister(0x5B, ((uint16_t)mdc1200_sync_suc_xor[2] << 8) | (mdc1200_sync_suc_xor[3] << 0));
BK4819_WriteRegister(0x5B, ((uint16_t)mdc1200_sync_suc_xor[3] << 8) | (mdc1200_sync_suc_xor[4] << 0));
// disable CRC // disable CRC
BK4819_WriteRegister(0x5C, 0x5625); // 01010110 0 0 100101 BK4819_WriteRegister(0x5C, 0x5625); // 01010110 0 0 100101
@ -2189,8 +2191,9 @@ void BK4819_reset_fsk(void)
BK4819_WriteRegister(0x5E, (64u << 3) | (1u << 0)); // 0 ~ 127, 0 ~ 7 BK4819_WriteRegister(0x5E, (64u << 3) | (1u << 0)); // 0 ~ 127, 0 ~ 7
{ // packet size .. sync + 14 bytes - size of a single mdc1200 packet { // packet size .. sync + 14 bytes - size of a single mdc1200 packet
uint16_t size = sizeof(mdc1200_sync_suc_xor) + (MDC1200_FEC_K * 2); // uint16_t size = 1 + (MDC1200_FEC_K * 2);
size -= (fsk_reg59 & (1u << 3)) ? 4 : 2; uint16_t size = 0 + (MDC1200_FEC_K * 2);
// size -= (fsk_reg59 & (1u << 3)) ? 4 : 2;
size = ((size + 1) / 2) * 2; // round up to even, else FSK RX doesn't work size = ((size + 1) / 2) * 2; // round up to even, else FSK RX doesn't work
BK4819_WriteRegister(0x5D, ((size - 1) << 8)); BK4819_WriteRegister(0x5D, ((size - 1) << 8));
} }
@ -2474,8 +2477,11 @@ void BK4819_reset_fsk(void)
// //
// disable CRC // disable CRC
// //
// BK4819_WriteRegister(0x5C, 0x5625); // 010101100 0 100101 // NB, this also affects TX pre-amble in some way
BK4819_WriteRegister(0x5C, 0xAA30); // 101010100 0 110000 //
BK4819_WriteRegister(0x5C, 0x5625); // 010101100 0 100101
// BK4819_WriteRegister(0x5C, 0xAA30); // 101010100 0 110000
// BK4819_WriteRegister(0x5C, 0x0030); // 000000000 0 110000
{ // load the entire packet data into the TX FIFO buffer { // load the entire packet data into the TX FIFO buffer
unsigned int i; unsigned int i;

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firmware.bin
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firmware.packed.bin
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14
mdc1200.c
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@ -637,20 +637,19 @@ void MDC1200_process_rx(const uint16_t interrupt_bits)
const bool rx_fifo_almost_full = (interrupt_bits & BK4819_REG_02_FSK_FIFO_ALMOST_FULL) ? true : false; const bool rx_fifo_almost_full = (interrupt_bits & BK4819_REG_02_FSK_FIFO_ALMOST_FULL) ? true : false;
const bool rx_finished = (interrupt_bits & BK4819_REG_02_FSK_RX_FINISHED) ? true : false; const bool rx_finished = (interrupt_bits & BK4819_REG_02_FSK_RX_FINISHED) ? true : false;
const unsigned int sync_size = (fsk_reg59 & (1u << 3)) ? 4 : 2; // const unsigned int sync_size = (fsk_reg59 & (1u << 3)) ? 4 : 2;
if (rx_sync) if (rx_sync)
{ {
// BK4819_set_GPIO_pin(BK4819_GPIO6_PIN2_GREEN, true); // LED on // BK4819_set_GPIO_pin(BK4819_GPIO6_PIN2_GREEN, true); // LED on
//mdc1200_rx_ready = false;
mdc1200_rx_buffer_index = 0; mdc1200_rx_buffer_index = 0;
{ // precede the data with the missing sync pattern (it's not part of the packet data) { // precede the data with the missing sync pattern (it's not part of the packet data)
unsigned int i; unsigned int i;
memset(mdc1200_rx_buffer, 0, sizeof(mdc1200_rx_buffer)); memset(mdc1200_rx_buffer, 0, sizeof(mdc1200_rx_buffer));
for (i = 0; i < sync_size; i++) // for (i = 0; i < sync_size; i++)
for (i = 0; i < sizeof(mdc1200_sync_suc_xor); i++)
mdc1200_rx_buffer[mdc1200_rx_buffer_index++] = mdc1200_sync_suc_xor[i] ^ (rx_sync_neg ? 0xFF : 0x00); mdc1200_rx_buffer[mdc1200_rx_buffer_index++] = mdc1200_sync_suc_xor[i] ^ (rx_sync_neg ? 0xFF : 0x00);
} }
@ -683,10 +682,11 @@ void MDC1200_process_rx(const uint16_t interrupt_bits)
const unsigned int count = BK4819_ReadRegister(0x5E) & (7u << 0); // almost full threshold const unsigned int count = BK4819_ReadRegister(0x5E) & (7u << 0); // almost full threshold
#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG) #if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
UART_printf("mdc1200 full %2u %2u ", mdc1200_rx_buffer_index, count); const unsigned int packet_size = 1 + (BK4819_ReadRegister(0x5D) >> 8);
UART_printf("mdc1200 full %2u %2u %2u ", mdc1200_rx_buffer_index, count, packet_size);
#endif #endif
// fetch RX'ed data // fetch received packet data
for (i = 0; i < count; i++) for (i = 0; i < count; i++)
{ {
const uint16_t word = BK4819_ReadRegister(0x5F) ^ (rx_sync_neg ? 0xFFFF : 0x0000); const uint16_t word = BK4819_ReadRegister(0x5F) ^ (rx_sync_neg ? 0xFFFF : 0x0000);
@ -732,7 +732,7 @@ void MDC1200_process_rx(const uint16_t interrupt_bits)
&mdc1200_arg, &mdc1200_arg,
&mdc1200_unit_id)) &mdc1200_unit_id))
{ {
mdc1200_rx_ready_tick_500ms = 2 * 6; // 6 seconds mdc1200_rx_ready_tick_500ms = 2 * 6; // 6 second MDC display time
g_update_display = true; g_update_display = true;