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OneOfEleven
2023-09-09 08:03:56 +01:00
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37
external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/README.md vendored Normal file
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CMSIS-DAP debug unit validation
-------------------------------
The following debug functionality is tested:
- Execution breakpoint with hit count
- Breakpoint on read
- Breakpoint on write
- Memory read
- Memory write
- Register read
- Register write
- Single stepping
- Run/stop debugging
The test is self-contained and can be executed on the hardware target.
To configure the test for a specific hardware target:
1. Open the µVision project and select device mounted on hardware target
(automatically selects flash algorithm for download).
2. Select CMSIS-DAP as the debugger (if not already selected).
3. Build the project.
To run the test on the hardware target:
1. Connect the CMSIS-DAP debug unit via JTAG/SWD to the hardware target.
2. Connect the CMSIS-DAP debug unit under test to a PC via USB.
3. Open the µVision project and start a debug session.
4. Test results are printed into a `test.log` file.
To run the test on the target in batch mode, open a Command window and execute:
```
C:\> .\test.bat
```
Test results are printed into a `test_results.txt` file.

262
external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/RTE/Device/ARMCM3/startup_ARMCM3.s vendored Normal file
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;/**************************************************************************//**
; * @file startup_ARMCM3.s
; * @brief CMSIS Core Device Startup File for
; * ARMCM3 Device Series
; * @version V5.00
; * @date 02. March 2016
; ******************************************************************************/
;/*
; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
; *
; * SPDX-License-Identifier: Apache-2.0
; *
; * Licensed under the Apache License, Version 2.0 (the License); you may
; * not use this file except in compliance with the License.
; * You may obtain a copy of the License at
; *
; * www.apache.org/licenses/LICENSE-2.0
; *
; * Unless required by applicable law or agreed to in writing, software
; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; * See the License for the specific language governing permissions and
; * limitations under the License.
; */
;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000C00
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WDT_IRQHandler ; 0: Watchdog Timer
DCD RTC_IRQHandler ; 1: Real Time Clock
DCD TIM0_IRQHandler ; 2: Timer0 / Timer1
DCD TIM2_IRQHandler ; 3: Timer2 / Timer3
DCD MCIA_IRQHandler ; 4: MCIa
DCD MCIB_IRQHandler ; 5: MCIb
DCD UART0_IRQHandler ; 6: UART0 - DUT FPGA
DCD UART1_IRQHandler ; 7: UART1 - DUT FPGA
DCD UART2_IRQHandler ; 8: UART2 - DUT FPGA
DCD UART4_IRQHandler ; 9: UART4 - not connected
DCD AACI_IRQHandler ; 10: AACI / AC97
DCD CLCD_IRQHandler ; 11: CLCD Combined Interrupt
DCD ENET_IRQHandler ; 12: Ethernet
DCD USBDC_IRQHandler ; 13: USB Device
DCD USBHC_IRQHandler ; 14: USB Host Controller
DCD CHLCD_IRQHandler ; 15: Character LCD
DCD FLEXRAY_IRQHandler ; 16: Flexray
DCD CAN_IRQHandler ; 17: CAN
DCD LIN_IRQHandler ; 18: LIN
DCD I2C_IRQHandler ; 19: I2C ADC/DAC
DCD 0 ; 20: Reserved
DCD 0 ; 21: Reserved
DCD 0 ; 22: Reserved
DCD 0 ; 23: Reserved
DCD 0 ; 24: Reserved
DCD 0 ; 25: Reserved
DCD 0 ; 26: Reserved
DCD 0 ; 27: Reserved
DCD CPU_CLCD_IRQHandler ; 28: Reserved - CPU FPGA CLCD
DCD 0 ; 29: Reserved - CPU FPGA
DCD UART3_IRQHandler ; 30: UART3 - CPU FPGA
DCD SPI_IRQHandler ; 31: SPI Touchscreen - CPU FPGA
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WDT_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT TIM0_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT MCIA_IRQHandler [WEAK]
EXPORT MCIB_IRQHandler [WEAK]
EXPORT UART0_IRQHandler [WEAK]
EXPORT UART1_IRQHandler [WEAK]
EXPORT UART2_IRQHandler [WEAK]
EXPORT UART3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT AACI_IRQHandler [WEAK]
EXPORT CLCD_IRQHandler [WEAK]
EXPORT ENET_IRQHandler [WEAK]
EXPORT USBDC_IRQHandler [WEAK]
EXPORT USBHC_IRQHandler [WEAK]
EXPORT CHLCD_IRQHandler [WEAK]
EXPORT FLEXRAY_IRQHandler [WEAK]
EXPORT CAN_IRQHandler [WEAK]
EXPORT LIN_IRQHandler [WEAK]
EXPORT I2C_IRQHandler [WEAK]
EXPORT CPU_CLCD_IRQHandler [WEAK]
EXPORT SPI_IRQHandler [WEAK]
WDT_IRQHandler
RTC_IRQHandler
TIM0_IRQHandler
TIM2_IRQHandler
MCIA_IRQHandler
MCIB_IRQHandler
UART0_IRQHandler
UART1_IRQHandler
UART2_IRQHandler
UART3_IRQHandler
UART4_IRQHandler
AACI_IRQHandler
CLCD_IRQHandler
ENET_IRQHandler
USBDC_IRQHandler
USBHC_IRQHandler
CHLCD_IRQHandler
FLEXRAY_IRQHandler
CAN_IRQHandler
LIN_IRQHandler
I2C_IRQHandler
CPU_CLCD_IRQHandler
SPI_IRQHandler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

68
external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/RTE/Device/ARMCM3/system_ARMCM3.c vendored Normal file
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/**************************************************************************//**
* @file system_ARMCM3.c
* @brief CMSIS Device System Source File for
* ARMCM3 Device Series
* @version V5.00
* @date 07. September 2016
******************************************************************************/
/*
* Copyright (c) 2009-2016 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "ARMCM3.h"
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define XTAL ( 5000000UL) /* Oscillator frequency */
#define SYSTEM_CLOCK (5U * XTAL)
/*----------------------------------------------------------------------------
Externals
*----------------------------------------------------------------------------*/
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
extern uint32_t __Vectors;
#endif
/*----------------------------------------------------------------------------
System Core Clock Variable
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = SYSTEM_CLOCK;
/*----------------------------------------------------------------------------
System Core Clock update function
*----------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}
/*----------------------------------------------------------------------------
System initialization function
*----------------------------------------------------------------------------*/
void SystemInit (void)
{
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
SCB->VTOR = (uint32_t) &__Vectors;
#endif
SystemCoreClock = SYSTEM_CLOCK;
}

21
external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/RTE/_CMSIS_DAP/RTE_Components.h vendored Normal file
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/*
* Auto generated Run-Time-Environment Configuration File
* *** Do not modify ! ***
*
* Project: 'Validation'
* Target: 'CMSIS_DAP'
*/
#ifndef RTE_COMPONENTS_H
#define RTE_COMPONENTS_H
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "ARMCM3.h"
#endif /* RTE_COMPONENTS_H */

45
external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/Validation.CMSIS_DAP.cprj vendored Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<cprj schemaVersion="1.0.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="CPRJ.xsd">
<created timestamp="2021-12-21T16:44:51" tool="uVision V5.36.0.0"/>
<info>
<name>Validation</name>
<description/>
</info>
<packages>
<package name="CMSIS" vendor="ARM"/>
</packages>
<compilers>
<compiler name="AC5" version="5.0.0:5.99.99"/>
</compilers>
<target Ddsp="NO_DSP" Dendian="Little-endian" Dfpu="NO_FPU" Dmve="NO_MVE" Dname="ARMCM3" Dsecure="Non-secure" Dtz="NO_TZ" Dvendor="ARM:82">
<output intdir="./Objects/" name="Validation" outdir="./Objects/" type="exe"/>
<ldflags add="--strict --summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols --info sizes --info totals --info unused --info veneers --entry=Reset_Handler" compiler="AC5" file="./Validation.CMSIS_DAP.sct"/>
<cflags add="--apcs=interwork --c99 --split_sections -O0 -g" compiler="AC5"/>
<asflags add="--apcs=interwork --xref -g" compiler="AC5"/>
<includes/>
<defines/>
</target>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM"/>
<component Cclass="Device" Cgroup="Startup" Cvendor="ARM">
<file attr="config" category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0"/>
<file attr="config" category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0"/>
</component>
</components>
<files>
<group name="Source Code">
<file category="sourceC" name="./test.c"/>
</group>
<group name="Documentation">
<file category="doc" name="./README.md"/>
</group>
</files>
</cprj>

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external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/Validation.uvguix vendored Normal file
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248
external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/Validation.uvoptx vendored Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc; *.md</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>CMSIS_DAP</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\Listings\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>0</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>0</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile>.\test.ini</sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>.\test.ini</tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMRTXEVENTFLAGS</Key>
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>DLGDARM</Key>
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>ARMDBGFLAGS</Key>
<Name>-T0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>CMSIS_AGDI</Key>
<Name>-X"" -O206 -S8 -C0 -P00 -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN0</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
<Group>
<GroupName>Source Code</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\test.c</PathWithFileName>
<FilenameWithoutPath>test.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>Documentation</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>5</FileType>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<bDave2>0</bDave2>
<PathWithFileName>.\README.md</PathWithFileName>
<FilenameWithoutPath>README.md</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
<Group>
<GroupName>::Device</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
</ProjectOpt>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>CMSIS_DAP</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
<PackID>ARM.CMSIS.5.7.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:ARMCM3$Device\ARM\ARMCM3\Include\ARMCM3.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:ARMCM3$Device\ARM\SVD\ARMCM3.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\Objects\</OutputDirectory>
<OutputName>Validation</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\Listings\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>1</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x20000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x40000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x40000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x00000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Source Code</GroupName>
<Files>
<File>
<FileName>test.c</FileName>
<FileType>1</FileType>
<FilePath>.\test.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Documentation</GroupName>
<Files>
<File>
<FileName>README.md</FileName>
<FileType>5</FileType>
<FilePath>.\README.md</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
<Group>
<GroupName>::Device</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.2" condition="ARMv6_7_8-M Device">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
<targetInfos>
<targetInfo name="CMSIS_DAP"/>
</targetInfos>
</component>
<component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.0.1" condition="ARMCM3 CMSIS">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.2.0"/>
<targetInfos>
<targetInfo name="CMSIS_DAP"/>
</targetInfos>
</component>
</components>
<files>
<file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM3\Source\ARM\startup_ARMCM3.s" version="1.0.0">
<instance index="0">RTE\Device\ARMCM3\startup_ARMCM3.s</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.2" condition="ARMCM3 CMSIS"/>
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
<targetInfos>
<targetInfo name="CMSIS_DAP"/>
</targetInfos>
</file>
<file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.0">
<instance index="0">RTE\Device\ARMCM3\system_ARMCM3.c</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.2" condition="ARMCM3 CMSIS"/>
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
<targetInfos>
<targetInfo name="CMSIS_DAP"/>
</targetInfos>
</file>
</files>
</RTE>
</Project>

50
external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/test.bat vendored Normal file
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@ -0,0 +1,50 @@
@ECHO off
REM Usage: test.bat [PATH TO UV4.exe]
IF "%1"=="" (
SET UV4_EXE=C:\Keil_v5\UV4\UV4.exe
) ELSE (
SET UV4_EXE=%1
)
ECHO Using %UV4_EXE%
ECHO.
ECHO Building application...
IF EXIST .\Objects\Validation.axf del .\Objects\Validation.axf
%UV4_EXE% -b Validation.uvprojx
IF EXIST .\Objects\Validation.axf (
ECHO Build succeded
) ELSE (
ECHO Build failed
GOTO :done
)
ECHO.
ECHO Loading application to hardware target...
%UV4_EXE% -f Validation.uvprojx -t"CMSIS_DAP"
IF ERRORLEVEL 1 (
ECHO Flash download failed
GOTO :done
)
ECHO.
ECHO Debugging hardware target...
IF EXIST .\test_results.txt del .\test_results.txt
%UV4_EXE% -d Validation.uvprojx -t"CMSIS_DAP"
IF EXIST .\test_results.txt (
TYPE .\test_results.txt
) ELSE (
ECHO Test ended abnormally - file test_results.txt was not produced
GOTO :done
)
ECHO.
ECHO All tests completed
:done

89
external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/test.c vendored Normal file
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/*
* Copyright (c) 2013-2017 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* ----------------------------------------------------------------------
*
* $Date: 1. December 2017
* $Revision: V2.0.0
*
* Project: CMSIS-DAP Validation
* Title: test.c CMSIS-DAP debug unit test module
*
*---------------------------------------------------------------------------*/
// Debug Variables
volatile int test_state = 0;
volatile int test_success = 0;
volatile int bpTestCounter = 0;
volatile char mem_rw_success = 0;
int test_array1[256] = {0};
int test_array2[256] = {0};
// Breakpoint Test function
static void BP_Test (void) {
int i;
for (i = 0; i < 10; i++) {
// increment counter so we know on which iteration breakpoint is hit
bpTestCounter++;
test_state++;
}
}
// Test function
static void Test(void) {
int i;
test_state++; // 'test_state' = 11
i = test_success; // 'test_success' read access
test_state++; // 'test_state' = 12
test_success = i; // 'test_success' write access
test_state++; // 'test_state' = 13
// test_array1 should have already been written by debugger
// copy test_array1 into test_array2 for future comparison
mem_rw_success = 1; // assume all values were written correctly
for (i = 0; i < 256; i++) {
if (test_array1[i] != (0x1000+i)) {
mem_rw_success = 0;
}
test_array2[i] = test_array1[i];
}
test_state++; // 'test_state' = 14
test_state++; // 'test_state' = 15
test_state++; // 'test_state' = 16
// execute 'test_state -= 16' from debugger
test_state++; // 'test_state' = 1
if (test_state == 1) {
test_success = 1;
} else {
test_success = 0;
}
}
// 'main' function
int main (void) {
BP_Test();
Test();
for (;;) {};
}

430
external/CMSIS_5/CMSIS/DAP/Firmware/Validation/MDK5/test.ini vendored Normal file
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/******************************************************************************/
/* test.ini: Initialization file to test the debug functionality */
/******************************************************************************/
/* This file is part of the uVision/ARM development tools. */
/* Copyright (c) 2012-2017 Keil Software. All rights reserved. */
/* This software may only be used under the terms of a valid, current, */
/* end user license from KEIL for a compatible version of KEIL software */
/* development tools. Nothing else gives you the right to use this software. */
/******************************************************************************/
// ensure logging into file is turned off
LOG OFF
// overall test success flag
define int testSuccess;
testSuccess = 0;
// flags to show which particular tests succeeded
define char bpExecSuccess;
bpExecSuccess = 0;
define char bpReadSuccess;
bpReadSuccess = 0;
define char bpWriteSuccess;
bpWriteSuccess = 0;
define char memReadSuccess;
memReadSuccess = 0;
define char memWriteSuccess;
memWriteSuccess = 0;
define char regReadSuccess;
regReadSuccess = 0;
define char regWriteSuccess;
regWriteSuccess = 0;
// function to read and write registers
FUNC void RegReadWrite(void) {
unsigned long VR0, VR1, VR2, VR3, VR4, VR5, VR6, VR7, VR8, VR9;
unsigned long VR10, VR11, VR12, VR13, VR14, VR15, VxPSR;
unsigned long VR_0, VR_1, VR_2, VR_3, VR_4, VR_5, VR_6, VR_7, VR_8, VR_9;
unsigned long VR_10, VR_11, VR_12, VR_13, VR_14, VR_15, V_xPSR;
unsigned long bogus;
bogus = 0x0badF00D;
printf("Register read started\n");
// initialize temporary variables with bogus value
VR0 = bogus;
VR1 = bogus;
VR2 = bogus;
VR3 = bogus;
VR4 = bogus;
VR5 = bogus;
VR6 = bogus;
VR7 = bogus;
VR8 = bogus;
VR9 = bogus;
VR10 = bogus;
VR11 = bogus;
VR12 = bogus;
VR13 = bogus;
VR14 = bogus;
VR15 = bogus;
VxPSR = bogus;
// read and save current register values
VR0 = R0;
VR1 = R1;
VR2 = R2;
VR3 = R3;
VR4 = R4;
VR5 = R5;
VR6 = R6;
VR7 = R7;
VR8 = R8;
VR9 = R9;
VR10 = R10;
VR11 = R11;
VR12 = R12;
VR13 = R13;
VR14 = R14;
VR15 = R15;
VxPSR = xPSR;
// print read register values
printf("R0 = 0x%x\n", VR0);
printf("R1 = 0x%x\n", VR1);
printf("R2 = 0x%x\n", VR2);
printf("R3 = 0x%x\n", VR3);
printf("R4 = 0x%x\n", VR4);
printf("R5 = 0x%x\n", VR5);
printf("R6 = 0x%x\n", VR6);
printf("R7 = 0x%x\n", VR7);
printf("R8 = 0x%x\n", VR8);
printf("R9 = 0x%x\n", VR9);
printf("R10 = 0x%x\n", VR10);
printf("R11 = 0x%x\n", VR11);
printf("R12 = 0x%x\n", VR12);
printf("R13 = 0x%x\n", VR13);
printf("R14 = 0x%x\n", VR14);
printf("R15 = 0x%x\n", VR15);
printf("xPSR = 0x%x\n", VxPSR);
// check if all values differ from bogus value
regReadSuccess =
(VR0 != bogus) &&
(VR1 != bogus) &&
(VR2 != bogus) &&
(VR3 != bogus) &&
(VR4 != bogus) &&
(VR5 != bogus) &&
(VR6 != bogus) &&
(VR7 != bogus) &&
(VR8 != bogus) &&
(VR9 != bogus) &&
(VR10 != bogus) &&
(VR11 != bogus) &&
(VR12 != bogus) &&
(VR13 != bogus) &&
(VR14 != bogus) &&
(VR15 != bogus) &&
(VxPSR != bogus);
if (regReadSuccess != 0) {
printf("Register read passed\n");
} else {
printf("Register read failed\n");
// there is no reason to test write if read fails
return;
}
printf("Register write started\n");
// fill all registers with bogus value
R0 = bogus;
R1 = bogus;
R2 = bogus;
R3 = bogus;
R4 = bogus;
R5 = bogus;
R6 = bogus;
R7 = bogus;
R8 = bogus;
R9 = bogus;
R10 = bogus;
R11 = bogus;
R12 = bogus;
// register R13-R15 and xPSR on hardware do not accept 0x0badf00d, use 0x0 instead
R13 = 0x0;
R14 = 0x0;
R15 = 0x0;
xPSR = 0x0;
// read back into another array
VR_0 = R0;
VR_1 = R1;
VR_2 = R2;
VR_3 = R3;
VR_4 = R4;
VR_5 = R5;
VR_6 = R6;
VR_7 = R7;
VR_8 = R8;
VR_9 = R9;
VR_10 = R10;
VR_11 = R11;
VR_12 = R12;
VR_13 = R13;
VR_14 = R14;
VR_15 = R15;
V_xPSR = xPSR;
// print the values again
printf("R0 = 0x%x\n", VR_0);
printf("R1 = 0x%x\n", VR_1);
printf("R2 = 0x%x\n", VR_2);
printf("R3 = 0x%x\n", VR_3);
printf("R4 = 0x%x\n", VR_4);
printf("R5 = 0x%x\n", VR_5);
printf("R6 = 0x%x\n", VR_6);
printf("R7 = 0x%x\n", VR_7);
printf("R8 = 0x%x\n", VR_8);
printf("R9 = 0x%x\n", VR_9);
printf("R10 = 0x%x\n", VR_10);
printf("R11 = 0x%x\n", VR_11);
printf("R12 = 0x%x\n", VR_12);
printf("R13 = 0x%x\n", VR_13);
printf("R14 = 0x%x\n", VR_14);
printf("R15 = 0x%x\n", VR_15);
printf("xPSR = 0x%x\n", V_xPSR);
// check if new values are bogus
regWriteSuccess =
(VR_0 == bogus) &&
(VR_1 == bogus) &&
(VR_2 == bogus) &&
(VR_3 == bogus) &&
(VR_4 == bogus) &&
(VR_5 == bogus) &&
(VR_6 == bogus) &&
(VR_7 == bogus) &&
(VR_8 == bogus) &&
(VR_9 == bogus) &&
(VR_10 == bogus) &&
(VR_11 == bogus) &&
(VR_12 == bogus) &&
(VR_13 == 0x0) &&
(VR_14 == 0x0) &&
(VR_15 == 0x0) &&
(V_xPSR == 0x0);
if (regWriteSuccess != 0) {
printf("Register write passed\n");
} else {
printf("Register write failed\n");
}
// write saved values back into registers
// values are required to be written correctly for the rest of the test
R0 = VR0;
R1 = VR1;
R2 = VR2;
R3 = VR3;
R4 = VR4;
R5 = VR5;
R6 = VR6;
R7 = VR7;
R8 = VR8;
R9 = VR9;
R10 = VR10;
R11 = VR11;
R12 = VR12;
R13 = VR13;
R14 = VR14;
R15 = VR15;
xPSR = VxPSR;
}
// function to write predefined numbers into test_array1
FUNC void MemWrite(unsigned long address) {
unsigned int i;
unsigned int val;
printf("Memory write started\n");
val = 0x1000;
for (i = 0; i < 256; i++) {
_WWORD(address, val);
val++;
address += 4;
}
printf("Memory write completed\n");
}
// function to read from test_array2 and check if write and read was successful
FUNC void MemRead(unsigned long address) {
unsigned int i;
unsigned int val, v;
printf("Memory read started\n");
val = 0x1000;
memReadSuccess = 1; // assume it is true
for (i = 0; i < 256; i++) {
v = _RWORD(address);
if (v != val) {
memReadSuccess = 0;
}
val++;
address += 4;
}
if (memReadSuccess != 0) {
printf("Memory read passed\n");
} else {
printf("Memory read failed\n");
}
}
// check execution breakpoint
FUNC void CheckBpExec(unsigned long address) {
// PC should be at address and value of bpTestCounter variable should be 9
if ((R15 == address) && (`bpTestCounter == 9)) {
bpExecSuccess = 1;
}
printf("Execution breakpoint (%d): %d\n", `bpTestCounter, bpExecSuccess);
}
// check breakpoint on read
FUNC void CheckBpRead(int test_state) {
// PC should be at address
if (`test_state == test_state) {
bpReadSuccess = 1;
}
printf("Breakpoint on read: %d\n",bpReadSuccess);
}
// check breakpoint on write
FUNC void CheckBpWrite(int test_state) {
// PC should be at address
if (`test_state == test_state) {
bpWriteSuccess = 1;
}
printf("Breakpoint on write: %d\n", bpWriteSuccess);
}
// evaluate test
FUNC void EvalSuccess(void) {
char success;
success = testSuccess &&
bpExecSuccess && bpReadSuccess && bpWriteSuccess &&
regReadSuccess && regWriteSuccess &&
memReadSuccess && memWriteSuccess;
exec("LOG >.\\test_results.txt");
// print test results to log file
if (success) {
printf("Test passed!\n");
} else {
printf("Test failed!\n");
}
printf("\nIndividual test results:\n");
printf("Execution breakpoint: ");
if (bpExecSuccess) {
printf("passed\n");
} else {
printf("failed\n");
}
printf("Breakpoint on read: ");
if (bpReadSuccess) {
printf("passed\n");
} else {
printf("failed\n");
}
printf("Breakpoint on write: ");
if (bpWriteSuccess) {
printf("passed\n");
} else {
printf("failed\n");
}
printf("Register read: ");
if (regReadSuccess) {
printf("passed\n");
} else {
printf("failed\n");
}
printf("Register write: ");
if (regWriteSuccess) {
printf("passed\n");
} else {
printf("failed\n");
}
printf("Memory read: ");
if (memReadSuccess) {
printf("passed\n");
} else {
printf("failed\n");
}
printf("Memory write: ");
if (memWriteSuccess) {
printf("passed\n");
} else {
printf("failed\n");
}
printf("Control flow: ");
if (testSuccess) {
printf("passed\n");
} else {
printf("failed\n");
}
exec("LOG OFF");
}
LOG >.\\test.log // start logging
RegReadWrite(); // check register read/write
BK * // remove all existing breakpoints
BS \test.c\43, 9 // set execution breakpoint (hit count=9)
G // run to break point
CheckBpExec(\test.c\43); // check execution breakpoint
BK * // remove all existing breakpoints
BS READ test_success // set a read access breakpoint
G // run to break point
CheckBpRead(11); // check breakpoint on read
BK * // remove all existing breakpoints
BS WRITE test_success // set a write access breakpoint
G // run to break point
CheckBpWrite(12); // check breakpoint on write
BK * // remove all existing breakpoints
G,\test.c\61 // run until line 61
MemWrite(&test_array1[0]); // test memory write
G,\test.c\69 // run until line 69
memWriteSuccess = `mem_rw_success; // application memory test result
MemRead(&test_array2[0]); // test memory read
T 3 // step 3 times
`test_state -= 16; // modify 'test_state' application variable
G,\test.c\88 // run until line 88
testSuccess = `test_success; // read 'test_success' application variable
LOG OFF // stop logging
EvalSuccess(); // evaluate test results
EXIT // exit debug mode