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https://github.com/OneOfEleven/uv-k5-firmware-custom.git
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Initial commit
This commit is contained in:
OneOfEleven
142
external/CMSIS_5/CMSIS/RTOS2/Source/os_systick.c
vendored
Normal file
142
external/CMSIS_5/CMSIS/RTOS2/Source/os_systick.c
vendored
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@ -0,0 +1,142 @@
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/**************************************************************************//**
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* @file os_systick.c
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* @brief CMSIS OS Tick SysTick implementation
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* @version V1.0.4
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* @date 20. January 2023
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******************************************************************************/
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/*
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* Copyright (c) 2017-2023 ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "os_tick.h"
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//lint -emacro((923,9078),SCB,SysTick) "cast from unsigned long to pointer"
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#include "RTE_Components.h"
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#include CMSIS_device_header
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#ifdef SysTick
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#ifndef SYSTICK_IRQ_PRIORITY
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#define SYSTICK_IRQ_PRIORITY 0xFFU
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#endif
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static uint8_t PendST __attribute__((section(".bss.os")));
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// Setup OS Tick.
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__WEAK int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler) {
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uint32_t load;
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(void)handler;
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if (freq == 0U) {
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//lint -e{904} "Return statement before end of function"
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return (-1);
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}
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load = (SystemCoreClock / freq) - 1U;
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if (load > 0x00FFFFFFU) {
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//lint -e{904} "Return statement before end of function"
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return (-1);
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}
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// Set SysTick Interrupt Priority
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#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)) || \
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(defined(__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ != 0)) || \
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(defined(__CORTEX_M) && (__CORTEX_M == 7U)))
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SCB->SHPR[11] = SYSTICK_IRQ_PRIORITY;
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#elif (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))
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SCB->SHPR[1] |= ((uint32_t)SYSTICK_IRQ_PRIORITY << 24);
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#elif ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ != 0)) || \
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(defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ != 0)))
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SCB->SHP[11] = SYSTICK_IRQ_PRIORITY;
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#elif (defined(__ARM_ARCH_6M__) && (__ARM_ARCH_6M__ != 0))
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SCB->SHP[1] |= ((uint32_t)SYSTICK_IRQ_PRIORITY << 24);
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#else
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#error "Unknown ARM Core!"
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#endif
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SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk;
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SysTick->LOAD = load;
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SysTick->VAL = 0U;
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PendST = 0U;
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return (0);
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}
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/// Enable OS Tick.
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__WEAK void OS_Tick_Enable (void) {
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if (PendST != 0U) {
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PendST = 0U;
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SCB->ICSR = SCB_ICSR_PENDSTSET_Msk;
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}
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SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
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}
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/// Disable OS Tick.
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__WEAK void OS_Tick_Disable (void) {
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SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
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if ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) != 0U) {
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SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk;
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PendST = 1U;
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}
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}
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// Acknowledge OS Tick IRQ.
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__WEAK void OS_Tick_AcknowledgeIRQ (void) {
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(void)SysTick->CTRL;
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}
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// Get OS Tick IRQ number.
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__WEAK int32_t OS_Tick_GetIRQn (void) {
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return ((int32_t)SysTick_IRQn);
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}
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// Get OS Tick clock.
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__WEAK uint32_t OS_Tick_GetClock (void) {
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return (SystemCoreClock);
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}
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// Get OS Tick interval.
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__WEAK uint32_t OS_Tick_GetInterval (void) {
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return (SysTick->LOAD + 1U);
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}
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// Get OS Tick count value.
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__WEAK uint32_t OS_Tick_GetCount (void) {
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uint32_t val;
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uint32_t count;
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val = SysTick->VAL;
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if (val != 0U) {
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count = (SysTick->LOAD - val) + 1U;
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} else {
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count = 0U;
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}
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return (count);
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}
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// Get OS Tick overflow status.
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__WEAK uint32_t OS_Tick_GetOverflow (void) {
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return ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) >> SCB_ICSR_PENDSTSET_Pos);
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}
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#endif // SysTick
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187
external/CMSIS_5/CMSIS/RTOS2/Source/os_tick_gtim.c
vendored
Normal file
187
external/CMSIS_5/CMSIS/RTOS2/Source/os_tick_gtim.c
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@ -0,0 +1,187 @@
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/**************************************************************************//**
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* @file os_tick_gtim.c
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* @brief CMSIS OS Tick implementation for Generic Timer
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* @version V1.0.1
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* @date 24. November 2017
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******************************************************************************/
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/*
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* Copyright (c) 2017 ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "os_tick.h"
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#include "irq_ctrl.h"
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#include "RTE_Components.h"
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#include CMSIS_device_header
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#ifndef GTIM_IRQ_PRIORITY
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#define GTIM_IRQ_PRIORITY 0xFFU
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#endif
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#ifndef GTIM_IRQ_NUM
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#define GTIM_IRQ_NUM SecurePhyTimer_IRQn
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#endif
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// Timer interrupt pending flag
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static uint8_t GTIM_PendIRQ;
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// Timer tick frequency
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static uint32_t GTIM_Clock;
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// Timer load value
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static uint32_t GTIM_Load;
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// Setup OS Tick.
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int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler) {
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uint32_t prio, bits;
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if (freq == 0U) {
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return (-1);
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}
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GTIM_PendIRQ = 0U;
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// Get timer clock
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#ifdef SCTR_BASE
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GTIM_Clock = *(uint32_t*)(SCTR_BASE+0x20);
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#else
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// FVP REFCLK CNTControl 100MHz
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GTIM_Clock = 100000000UL;
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#endif
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PL1_SetCounterFrequency(GTIM_Clock);
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// Calculate load value
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GTIM_Load = (GTIM_Clock / freq) - 1U;
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// Disable Generic Timer and set load value
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PL1_SetControl(0U);
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PL1_SetLoadValue(GTIM_Load);
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// Disable corresponding IRQ
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IRQ_Disable(GTIM_IRQ_NUM);
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IRQ_ClearPending(GTIM_IRQ_NUM);
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// Determine number of implemented priority bits
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IRQ_SetPriority(GTIM_IRQ_NUM, 0xFFU);
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prio = IRQ_GetPriority(GTIM_IRQ_NUM);
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// At least bits [7:4] must be implemented
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if ((prio & 0xF0U) == 0U) {
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return (-1);
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}
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for (bits = 0; bits < 4; bits++) {
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if ((prio & 0x01) != 0) {
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break;
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}
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prio >>= 1;
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}
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// Adjust configured priority to the number of implemented priority bits
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prio = (GTIM_IRQ_PRIORITY << bits) & 0xFFUL;
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// Set Private Timer interrupt priority
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IRQ_SetPriority(GTIM_IRQ_NUM, prio-1U);
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// Set edge-triggered IRQ
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IRQ_SetMode(GTIM_IRQ_NUM, IRQ_MODE_TRIG_EDGE);
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// Register tick interrupt handler function
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IRQ_SetHandler(GTIM_IRQ_NUM, handler);
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// Enable corresponding interrupt
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IRQ_Enable(GTIM_IRQ_NUM);
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// Enable system counter and timer control
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#ifdef SCTR_BASE
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*(uint32_t*)SCTR_BASE |= 3U;
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#endif
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// Enable timer control
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PL1_SetControl(1U);
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return (0);
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}
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/// Enable OS Tick.
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void OS_Tick_Enable (void) {
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uint32_t ctrl;
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// Set pending interrupt if flag set
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if (GTIM_PendIRQ != 0U) {
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GTIM_PendIRQ = 0U;
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IRQ_SetPending (GTIM_IRQ_NUM);
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}
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// Start the Private Timer
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ctrl = PL1_GetControl();
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// Set bit: Timer enable
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ctrl |= 1U;
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PL1_SetControl(ctrl);
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}
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/// Disable OS Tick.
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void OS_Tick_Disable (void) {
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uint32_t ctrl;
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// Stop the Private Timer
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ctrl = PL1_GetControl();
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// Clear bit: Timer enable
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ctrl &= ~1U;
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PL1_SetControl(ctrl);
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// Remember pending interrupt flag
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if (IRQ_GetPending(GTIM_IRQ_NUM) != 0) {
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IRQ_ClearPending(GTIM_IRQ_NUM);
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GTIM_PendIRQ = 1U;
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}
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}
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// Acknowledge OS Tick IRQ.
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void OS_Tick_AcknowledgeIRQ (void) {
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IRQ_ClearPending (GTIM_IRQ_NUM);
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PL1_SetLoadValue(GTIM_Load);
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}
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// Get OS Tick IRQ number.
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int32_t OS_Tick_GetIRQn (void) {
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return (GTIM_IRQ_NUM);
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}
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// Get OS Tick clock.
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uint32_t OS_Tick_GetClock (void) {
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return (GTIM_Clock);
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}
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// Get OS Tick interval.
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uint32_t OS_Tick_GetInterval (void) {
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return (GTIM_Load + 1U);
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}
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// Get OS Tick count value.
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uint32_t OS_Tick_GetCount (void) {
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return (GTIM_Load - PL1_GetCurrentValue());
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}
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// Get OS Tick overflow status.
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uint32_t OS_Tick_GetOverflow (void) {
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CNTP_CTL_Type cntp_ctl;
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cntp_ctl.w = PL1_GetControl();
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return (cntp_ctl.b.ISTATUS);
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}
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165
external/CMSIS_5/CMSIS/RTOS2/Source/os_tick_ptim.c
vendored
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165
external/CMSIS_5/CMSIS/RTOS2/Source/os_tick_ptim.c
vendored
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@ -0,0 +1,165 @@
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/**************************************************************************//**
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* @file os_tick_ptim.c
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* @brief CMSIS OS Tick implementation for Private Timer
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* @version V1.0.2
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* @date 02. March 2018
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******************************************************************************/
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/*
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* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
|
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* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
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*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
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#include "RTE_Components.h"
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#include CMSIS_device_header
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#if defined(PTIM)
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#include "os_tick.h"
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#include "irq_ctrl.h"
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#ifndef PTIM_IRQ_PRIORITY
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#define PTIM_IRQ_PRIORITY 0xFFU
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#endif
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static uint8_t PTIM_PendIRQ; // Timer interrupt pending flag
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// Setup OS Tick.
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int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler) {
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uint32_t load;
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uint32_t prio;
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uint32_t bits;
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if (freq == 0U) {
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return (-1);
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}
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PTIM_PendIRQ = 0U;
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// Private Timer runs with the system frequency
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load = (SystemCoreClock / freq) - 1U;
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// Disable Private Timer and set load value
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PTIM_SetControl (0U);
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PTIM_SetLoadValue (load);
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// Disable corresponding IRQ
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IRQ_Disable (PrivTimer_IRQn);
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IRQ_ClearPending(PrivTimer_IRQn);
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// Determine number of implemented priority bits
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IRQ_SetPriority (PrivTimer_IRQn, 0xFFU);
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prio = IRQ_GetPriority (PrivTimer_IRQn);
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// At least bits [7:4] must be implemented
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if ((prio & 0xF0U) == 0U) {
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return (-1);
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}
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for (bits = 0; bits < 4; bits++) {
|
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if ((prio & 0x01) != 0) {
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break;
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}
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prio >>= 1;
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}
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// Adjust configured priority to the number of implemented priority bits
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prio = (PTIM_IRQ_PRIORITY << bits) & 0xFFUL;
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// Set Private Timer interrupt priority
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IRQ_SetPriority(PrivTimer_IRQn, prio-1U);
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// Set edge-triggered IRQ
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IRQ_SetMode(PrivTimer_IRQn, IRQ_MODE_TRIG_EDGE);
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// Register tick interrupt handler function
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IRQ_SetHandler(PrivTimer_IRQn, handler);
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||||
// Enable corresponding interrupt
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||||
IRQ_Enable (PrivTimer_IRQn);
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||||
// Set bits: IRQ enable and Auto reload
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PTIM_SetControl (0x06U);
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return (0);
|
||||
}
|
||||
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||||
/// Enable OS Tick.
|
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void OS_Tick_Enable (void) {
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uint32_t ctrl;
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// Set pending interrupt if flag set
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if (PTIM_PendIRQ != 0U) {
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||||
PTIM_PendIRQ = 0U;
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||||
IRQ_SetPending (PrivTimer_IRQn);
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}
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// Start the Private Timer
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ctrl = PTIM_GetControl();
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// Set bit: Timer enable
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ctrl |= 1U;
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PTIM_SetControl (ctrl);
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}
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||||
/// Disable OS Tick.
|
||||
void OS_Tick_Disable (void) {
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uint32_t ctrl;
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// Stop the Private Timer
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ctrl = PTIM_GetControl();
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||||
// Clear bit: Timer enable
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||||
ctrl &= ~1U;
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||||
PTIM_SetControl (ctrl);
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||||
// Remember pending interrupt flag
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||||
if (IRQ_GetPending(PrivTimer_IRQn) != 0) {
|
||||
IRQ_ClearPending (PrivTimer_IRQn);
|
||||
PTIM_PendIRQ = 1U;
|
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}
|
||||
}
|
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||||
// Acknowledge OS Tick IRQ.
|
||||
void OS_Tick_AcknowledgeIRQ (void) {
|
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PTIM_ClearEventFlag();
|
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}
|
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// Get OS Tick IRQ number.
|
||||
int32_t OS_Tick_GetIRQn (void) {
|
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return (PrivTimer_IRQn);
|
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}
|
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|
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// Get OS Tick clock.
|
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uint32_t OS_Tick_GetClock (void) {
|
||||
return (SystemCoreClock);
|
||||
}
|
||||
|
||||
// Get OS Tick interval.
|
||||
uint32_t OS_Tick_GetInterval (void) {
|
||||
return (PTIM_GetLoadValue() + 1U);
|
||||
}
|
||||
|
||||
// Get OS Tick count value.
|
||||
uint32_t OS_Tick_GetCount (void) {
|
||||
uint32_t load = PTIM_GetLoadValue();
|
||||
return (load - PTIM_GetCurrentValue());
|
||||
}
|
||||
|
||||
// Get OS Tick overflow status.
|
||||
uint32_t OS_Tick_GetOverflow (void) {
|
||||
return (PTIM->ISR & 1);
|
||||
}
|
||||
|
||||
#endif // PTIM
|
||||
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