mirror of
https://github.com/OneOfEleven/uv-k5-firmware-custom.git
synced 2025-06-21 07:28:37 +03:00
Initial commit
This commit is contained in:
OneOfEleven
123
external/CMSIS_5/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct
vendored
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123
external/CMSIS_5/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct
vendored
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@ -0,0 +1,123 @@
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#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m35p -xc
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; command above MUST be in first line (no comment above!)
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;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
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; #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m35p -xc -mcmse
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/*
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;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
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*/
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/*--------------------- Flash Configuration ----------------------------------
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; <h> Flash Configuration
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; <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
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; <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __ROM_BASE 0x00000000
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#define __ROM_SIZE 0x00080000
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/*--------------------- Embedded RAM Configuration ---------------------------
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; <h> RAM Configuration
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; <o0> RAM Base Address <0x0-0xFFFFFFFF:8>
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; <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __RAM_BASE 0x20000000
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#define __RAM_SIZE 0x00040000
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/*--------------------- Stack / Heap Configuration ---------------------------
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; <h> Stack / Heap Configuration
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; <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __STACK_SIZE 0x00000200
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#define __HEAP_SIZE 0x00000C00
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/*--------------------- CMSE Veneer Configuration ---------------------------
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; <h> CMSE Veneer Configuration
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; <o0> CMSE Veneer Size (in Bytes) <0x0-0xFFFFFFFF:32>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __CMSEVENEER_SIZE 0x200
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/*
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;------------- <<< end of configuration section >>> ---------------------------
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*/
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/*----------------------------------------------------------------------------
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User Stack & Heap boundary definition
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*----------------------------------------------------------------------------*/
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#define __STACK_TOP (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
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#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */
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/* ----------------------------------------------------------------------------
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Stack seal size definition
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*----------------------------------------------------------------------------*/
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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#define __STACKSEAL_SIZE ( 8 )
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#else
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#define __STACKSEAL_SIZE ( 0 )
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#endif
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/*----------------------------------------------------------------------------
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Region base & size definition
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*----------------------------------------------------------------------------*/
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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#define __CV_BASE ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
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#define __CV_SIZE ( __CMSEVENEER_SIZE )
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#else
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#define __CV_SIZE ( 0 )
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#endif
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#define __RO_BASE ( __ROM_BASE )
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#define __RO_SIZE ( __ROM_SIZE - __CV_SIZE )
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#define __RW_BASE ( __RAM_BASE )
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#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE - __STACKSEAL_SIZE )
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/*----------------------------------------------------------------------------
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Scatter Region definition
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*----------------------------------------------------------------------------*/
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LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
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ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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.ANY (+XO)
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}
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RW_NOINIT __RW_BASE UNINIT __RW_SIZE {
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*(.bss.noinit)
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}
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RW_RAM AlignExpr(+0, 8) (__RW_SIZE - AlignExpr(ImageLength(RW_NOINIT), 8)) {
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*(+RW +ZI)
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}
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#if __HEAP_SIZE > 0
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ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap
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}
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#endif
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ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
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}
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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STACKSEAL +0 EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack
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}
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#endif
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}
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE { ; own load/execution region for CMSE Veneers
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ER_CMSE_VENEER __CV_BASE __CV_SIZE {
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*(Veneer$$CMSE)
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}
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}
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#endif
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123
external/CMSIS_5/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct
vendored
Normal file
123
external/CMSIS_5/Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct
vendored
Normal file
@ -0,0 +1,123 @@
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#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m35p -xc -mcmse
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; command above MUST be in first line (no comment above!)
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;Note: Add '-mcmse' to first line if your software model is "Secure Mode".
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; #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m35p -xc -mcmse
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/*
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;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
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*/
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/*--------------------- Flash Configuration ----------------------------------
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; <h> Flash Configuration
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; <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
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; <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __ROM_BASE 0x00000000
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#define __ROM_SIZE 0x00080000
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/*--------------------- Embedded RAM Configuration ---------------------------
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; <h> RAM Configuration
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; <o0> RAM Base Address <0x0-0xFFFFFFFF:8>
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; <o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __RAM_BASE 0x20000000
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#define __RAM_SIZE 0x00040000
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/*--------------------- Stack / Heap Configuration ---------------------------
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; <h> Stack / Heap Configuration
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; <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __STACK_SIZE 0x00000200
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#define __HEAP_SIZE 0x00000C00
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/*--------------------- CMSE Veneer Configuration ---------------------------
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; <h> CMSE Veneer Configuration
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; <o0> CMSE Veneer Size (in Bytes) <0x0-0xFFFFFFFF:32>
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; </h>
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*----------------------------------------------------------------------------*/
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#define __CMSEVENEER_SIZE 0x200
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/*
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;------------- <<< end of configuration section >>> ---------------------------
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*/
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/*----------------------------------------------------------------------------
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User Stack & Heap boundary definition
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*----------------------------------------------------------------------------*/
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#define __STACK_TOP (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */
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#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */
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/* ----------------------------------------------------------------------------
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Stack seal size definition
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*----------------------------------------------------------------------------*/
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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#define __STACKSEAL_SIZE ( 8 )
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#else
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#define __STACKSEAL_SIZE ( 0 )
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#endif
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/*----------------------------------------------------------------------------
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Region base & size definition
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*----------------------------------------------------------------------------*/
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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#define __CV_BASE ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE )
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#define __CV_SIZE ( __CMSEVENEER_SIZE )
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#else
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#define __CV_SIZE ( 0 )
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#endif
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#define __RO_BASE ( __ROM_BASE )
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#define __RO_SIZE ( __ROM_SIZE - __CV_SIZE )
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#define __RW_BASE ( __RAM_BASE )
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#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE - __STACKSEAL_SIZE )
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/*----------------------------------------------------------------------------
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Scatter Region definition
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*----------------------------------------------------------------------------*/
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LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
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ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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.ANY (+XO)
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}
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RW_NOINIT __RW_BASE UNINIT __RW_SIZE {
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*(.bss.noinit)
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}
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RW_RAM AlignExpr(+0, 8) (__RW_SIZE - AlignExpr(ImageLength(RW_NOINIT), 8)) {
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*(+RW +ZI)
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}
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#if __HEAP_SIZE > 0
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ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap
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}
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#endif
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ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
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}
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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STACKSEAL +0 EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack
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}
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#endif
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}
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE { ; own load/execution region for CMSE Veneers
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ER_CMSE_VENEER __CV_BASE __CV_SIZE {
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*(Veneer$$CMSE)
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}
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}
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#endif
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159
external/CMSIS_5/Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S
vendored
Normal file
159
external/CMSIS_5/Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S
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@ -0,0 +1,159 @@
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/******************************************************************************
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* @file startup_ARMCM33.S
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* @brief CMSIS Core Device Startup File for Cortex-M33 Device
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* @version V2.0.0
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* @date 26. May 2021
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******************************************************************************/
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/*
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* Copyright (c) 2009-2021 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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.syntax unified
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.arch armv8-m.main
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#define __INITIAL_SP Image$$ARM_LIB_STACK$$ZI$$Limit
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#define __STACK_LIMIT Image$$ARM_LIB_STACK$$ZI$$Base
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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#define __STACK_SEAL Image$$STACKSEAL$$ZI$$Base
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#endif
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.section RESET
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.align 2
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.globl __Vectors
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.globl __Vectors_End
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.globl __Vectors_Size
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__Vectors:
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.long __INITIAL_SP /* Initial Stack Pointer */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* -14 NMI Handler */
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.long HardFault_Handler /* -13 Hard Fault Handler */
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.long MemManage_Handler /* -12 MPU Fault Handler */
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.long BusFault_Handler /* -11 Bus Fault Handler */
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.long UsageFault_Handler /* -10 Usage Fault Handler */
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.long SecureFault_Handler /* -9 Secure Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* -5 SVCall Handler */
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.long DebugMon_Handler /* -4 Debug Monitor Handler */
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.long 0 /* Reserved */
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.long PendSV_Handler /* -2 PendSV Handler */
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.long SysTick_Handler /* -1 SysTick Handler */
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/* Interrupts */
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.long Interrupt0_Handler /* 0 Interrupt 0 */
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.long Interrupt1_Handler /* 1 Interrupt 1 */
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.long Interrupt2_Handler /* 2 Interrupt 2 */
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.long Interrupt3_Handler /* 3 Interrupt 3 */
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.long Interrupt4_Handler /* 4 Interrupt 4 */
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.long Interrupt5_Handler /* 5 Interrupt 5 */
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.long Interrupt6_Handler /* 6 Interrupt 6 */
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.long Interrupt7_Handler /* 7 Interrupt 7 */
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.long Interrupt8_Handler /* 8 Interrupt 8 */
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.long Interrupt9_Handler /* 9 Interrupt 9 */
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.space (470 * 4) /* Interrupts 10 .. 480 are left out */
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__Vectors_End:
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.equ __Vectors_Size, __Vectors_End - __Vectors
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.size __Vectors, . - __Vectors
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.thumb
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.section .text
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.align 2
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.thumb_func
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.type Reset_Handler, %function
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.globl Reset_Handler
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.fnstart
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Reset_Handler:
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ldr r0, =__INITIAL_SP
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msr psp, r0
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ldr r0, =__STACK_LIMIT
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msr msplim, r0
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msr psplim, r0
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#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
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ldr r0, =__STACK_SEAL
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ldr r1, =0xFEF5EDA5U
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strd r1,r1,[r0,#0]
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#endif
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bl SystemInit
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bl __main
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.fnend
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.size Reset_Handler, . - Reset_Handler
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/* The default macro is not used for HardFault_Handler
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* because this results in a poor debug illusion.
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*/
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.thumb_func
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.type HardFault_Handler, %function
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.weak HardFault_Handler
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.fnstart
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HardFault_Handler:
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b .
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.fnend
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.size HardFault_Handler, . - HardFault_Handler
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.thumb_func
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.type Default_Handler, %function
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.weak Default_Handler
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.fnstart
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Default_Handler:
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b .
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.fnend
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.size Default_Handler, . - Default_Handler
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/* Macro to define default exception/interrupt handlers.
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* Default handler are weak symbols with an endless loop.
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* They can be overwritten by real handlers.
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*/
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.macro Set_Default_Handler Handler_Name
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.weak \Handler_Name
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.set \Handler_Name, Default_Handler
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.endm
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/* Default exception/interrupt handler */
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Set_Default_Handler NMI_Handler
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Set_Default_Handler MemManage_Handler
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Set_Default_Handler BusFault_Handler
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Set_Default_Handler UsageFault_Handler
|
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Set_Default_Handler SecureFault_Handler
|
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Set_Default_Handler SVC_Handler
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Set_Default_Handler DebugMon_Handler
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Set_Default_Handler PendSV_Handler
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Set_Default_Handler SysTick_Handler
|
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|
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Set_Default_Handler Interrupt0_Handler
|
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Set_Default_Handler Interrupt1_Handler
|
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Set_Default_Handler Interrupt2_Handler
|
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Set_Default_Handler Interrupt3_Handler
|
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Set_Default_Handler Interrupt4_Handler
|
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Set_Default_Handler Interrupt5_Handler
|
||||
Set_Default_Handler Interrupt6_Handler
|
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Set_Default_Handler Interrupt7_Handler
|
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Set_Default_Handler Interrupt8_Handler
|
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Set_Default_Handler Interrupt9_Handler
|
||||
|
||||
.end
|
||||
Reference in New Issue
Block a user