mirrors/uv-k5-firmware-custom
0
Fork 0
mirror of https://github.com/OneOfEleven/uv-k5-firmware-custom.git synced 2025-06-19 14:48:03 +03:00
Code Issues Releases Activity

Font and display updates

Browse Source
This commit is contained in:
OneOfEleven
2023-09-11 00:02:57 +01:00
parent 7dc3512a50
commit e5294129ae
25 changed files with 658 additions and 477 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
driver/system.c
View File

@ -27,9 +27,7 @@ void SYSTEM_DelayMs(uint32_t Delay)
void SYSTEM_ConfigureClocks(void)
{
// Set source clock from external crystal
PMU_SRC_CFG = (PMU_SRC_CFG & ~(PMU_SRC_CFG_RCHF_SEL_MASK | PMU_SRC_CFG_RCHF_EN_MASK))
| PMU_SRC_CFG_RCHF_SEL_BITS_48MHZ
| PMU_SRC_CFG_RCHF_EN_BITS_ENABLE;
PMU_SRC_CFG = (PMU_SRC_CFG & ~(PMU_SRC_CFG_RCHF_SEL_MASK | PMU_SRC_CFG_RCHF_EN_MASK)) | PMU_SRC_CFG_RCHF_SEL_BITS_48MHZ | PMU_SRC_CFG_RCHF_EN_BITS_ENABLE;
// Divide by 2
SYSCON_CLK_SEL = SYSCON_CLK_SEL_DIV_BITS_2;
@ -37,4 +35,3 @@ void SYSTEM_ConfigureClocks(void)
// Disable division clock gate
SYSCON_DIV_CLK_GATE = (SYSCON_DIV_CLK_GATE & ~SYSCON_DIV_CLK_GATE_DIV_CLK_GATE_MASK) | SYSCON_DIV_CLK_GATE_DIV_CLK_GATE_BITS_DISABLE;
}