mirror of
https://github.com/OneOfEleven/uv-k5-firmware-custom.git
synced 2025-04-28 14:21:25 +03:00
641 lines
15 KiB
C
641 lines
15 KiB
C
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#include <string.h>
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#include "bsp/dp32g030/crc.h"
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#include "driver/crc.h"
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#include "driver/uart.h"
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#include "mdc1200.h"
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#include "misc.h"
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#define FEC_K 7
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// **********************************************************
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// pre-amble and sync pattern
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//
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// >= 24-bit pre-amble
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// 40-bit sync
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//
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//static const uint8_t pre_amble[] = {0x00, 0x00, 0x00, 0x00, 0xCC}; / add some bit reversals just before the sync pattern
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static const uint8_t pre_amble[] = {0x00, 0x00, 0x00};
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static const uint8_t sync[] = {0x07, 0x09, 0x2a, 0x44, 0x6f};
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/*
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uint8_t bit_reverse_8(uint8_t n)
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{
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n = ((n >> 1) & 0x55u) | ((n << 1) & 0xAAu);
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n = ((n >> 2) & 0x33u) | ((n << 2) & 0xCCu);
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n = ((n >> 4) & 0x0Fu) | ((n << 4) & 0xF0u);
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return n;
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}
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uint16_t bit_reverse_16(uint16_t n)
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{ // untested
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n = ((n >> 1) & 0x5555u) | ((n << 1) & 0xAAAAu);
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n = ((n >> 2) & 0x3333u) | ((n << 2) & 0xCCCCu);
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n = ((n >> 4) & 0x0F0Fu) | ((n << 4) & 0xF0F0u);
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n = ((n >> 8) & 0x00FFu) | ((n << 8) & 0xFF00u);
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return n;
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}
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uint32_t bit_reverse_32(uint32_t n)
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{
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n = ((n >> 1) & 0x55555555u) | ((n << 1) & 0xAAAAAAAAu);
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n = ((n >> 2) & 0x33333333u) | ((n << 2) & 0xCCCCCCCCu);
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n = ((n >> 4) & 0x0F0F0F0Fu) | ((n << 4) & 0xF0F0F0F0u);
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n = ((n >> 8) & 0x00FF00FFu) | ((n << 8) & 0xFF00FF00u);
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n = ((n >> 16) & 0x0000FFFFu) | ((n << 16) & 0xFFFF0000u);
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return n;
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}
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*/
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// ************************************
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// common
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#if 0
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uint16_t compute_crc(const uint8_t *data, const unsigned int data_len)
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{ // using the reverse computation avoids having to reverse the bit order during and after
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unsigned int i;
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uint16_t crc = 0;
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for (i = 0; i < data_len; i++)
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{
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unsigned int k;
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crc ^= data[i];
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for (k = 8; k > 0; k--)
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crc = (crc & 1u) ? (crc >> 1) ^ 0x8408 : crc >> 1;
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}
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return crc ^ 0xffff;
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}
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#elif 1
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uint16_t compute_crc(const uint8_t *data, const unsigned int data_len)
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{ // let the CPU do the crc for us :)
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uint16_t crc;
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CRC_InitReverse();
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crc = CRC_Calculate(data, data_len);
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CRC_Init();
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return crc;
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}
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#else
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uint16_t compute_crc(const uint8_t *data, const unsigned int data_len)
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{
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unsigned int i;
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uint16_t crc = 0;
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for (i = 0; i < data_len; i++)
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{
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uint8_t mask;
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// bit reverse each data byte
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const uint8_t bits = bit_reverse_8(*data++);
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for (mask = 0x0080; mask != 0; mask >>= 1)
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{
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uint16_t msb = crc & 0x8000;
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if (bits & mask)
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msb ^= 0x8000;
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crc <<= 1;
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if (msb)
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crc ^= 0x1021;
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}
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}
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// bit reverse and invert the final CRC
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return bit_reverse_16(crc) ^ 0xffff;
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}
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#endif
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// ************************************
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// RX
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void error_correction(uint8_t *data)
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{ // can correct up to 3 or 4 corrupted bits (I think)
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int i;
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uint8_t shift_reg;
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uint8_t syn;
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for (i = 0, shift_reg = 0, syn = 0; i < FEC_K; i++)
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{
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const uint8_t bi = data[i];
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int bit_num;
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for (bit_num = 0; bit_num < 8; bit_num++)
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{
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uint8_t b;
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unsigned int k = 0;
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shift_reg = (shift_reg << 1) | ((bi >> bit_num) & 1u);
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b = ((shift_reg >> 6) ^ (shift_reg >> 5) ^ (shift_reg >> 2) ^ (shift_reg >> 0)) & 1u;
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syn = (syn << 1) | (((b ^ (data[i + FEC_K] >> bit_num)) & 1u) ? 1u : 0u);
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if (syn & 0x80) k++;
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if (syn & 0x20) k++;
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if (syn & 0x04) k++;
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if (syn & 0x02) k++;
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if (k >= 3)
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{ // correct a bit error
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int ii = i;
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int bn = bit_num - 7;
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if (bn < 0)
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{
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bn += 8;
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ii--;
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}
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if (ii >= 0)
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data[ii] ^= 1u << bn; // do it
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syn ^= 0xA6; // 10100110
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}
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}
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}
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}
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/*
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void xor_demodulation(uint8_t *data, const unsigned int size, const bool sync_inverted)
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{
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unsigned int i;
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uint8_t prev_bit = 0;
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for (i = 0; i < size; i++)
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{
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int bit_num;
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uint8_t in = data[i];
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uint8_t out = 0;
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for (bit_num = 7; bit_num >= 0; bit_num--)
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{
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const uint8_t new_bit = (in >> bit_num) & 1u;
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uint8_t bit = prev_bit ^ new_bit;
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if (sync_inverted)
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bit ^= 1u;
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prev_bit = new_bit;
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out |= bit << bit_num;
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}
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data[i] = out;
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}
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}
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*/
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bool decode_data(uint8_t *data)
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{
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uint16_t crc1;
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uint16_t crc2;
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{ // de-interleave
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unsigned int i;
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unsigned int k;
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unsigned int m;
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uint8_t deinterleaved[(FEC_K * 2) * 8];
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// interleave order
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// 0, 16, 32, 48, 64, 80, 96,
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// 1, 17, 33, 49, 65, 81, 97,
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// 2, 18, 34, 50, 66, 82, 98,
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// 3, 19, 35, 51, 67, 83, 99,
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// 4, 20, 36, 52, 68, 84, 100,
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// 5, 21, 37, 53, 69, 85, 101,
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// 6, 22, 38, 54, 70, 86, 102,
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// 7, 23, 39, 55, 71, 87, 103,
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// 8, 24, 40, 56, 72, 88, 104,
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// 9, 25, 41, 57, 73, 89, 105,
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// 10, 26, 42, 58, 74, 90, 106,
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// 11, 27, 43, 59, 75, 91, 107,
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// 12, 28, 44, 60, 76, 92, 108,
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// 13, 29, 45, 61, 77, 93, 109,
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// 14, 30, 46, 62, 78, 94, 110,
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// 15, 31, 47, 63, 79, 95, 111
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// de-interleave the received bits
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for (i = 0, k = 0; i < 16; i++)
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{
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for (m = 0; m < FEC_K; m++)
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{
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const unsigned int n = (m * 16) + i;
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deinterleaved[k++] = (data[n >> 3] >> ((7 - n) & 7u)) & 1u;
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}
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}
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// copy the de-interleaved bits back intoto the data buffer
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for (i = 0, m = 0; i < (FEC_K * 2); i++)
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{
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unsigned int k;
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uint8_t b = 0;
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for (k = 0; k < 8; k++)
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if (deinterleaved[m++])
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b |= 1u << k;
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data[i] = b;
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}
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}
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// see if we can correct a couple of corrupted bits (if need be)
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error_correction(data);
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// rx'ed de-interleaved data (min 14 bytes) looks like this ..
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//
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// OP ARG ID CRC STATUS FEC bits
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// 01 80 1234 2E3E 00 6580A862DD8808
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crc1 = compute_crc(data, 4);
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crc2 = ((uint16_t)data[5] << 8) | (data[4] << 0);
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return (crc1 == crc2) ? true : false;
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}
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// **********************************************************
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// TX
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void xor_modulation(uint8_t *data, const unsigned int size)
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{ // exclusive-or succesive bits - the entire packet
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unsigned int i;
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uint8_t prev_bit = 0;
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for (i = 0; i < size; i++)
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{
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int bit_num;
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uint8_t in = data[i];
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uint8_t out = 0;
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for (bit_num = 7; bit_num >= 0; bit_num--)
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{
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const uint8_t new_bit = (in >> bit_num) & 1u;
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if (new_bit != prev_bit)
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out |= 1u << bit_num; // previous bit and new bit are different - send a '1'
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prev_bit = new_bit;
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}
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data[i] = out ^ 0xff;
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}
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}
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uint8_t * encode_data(uint8_t *data)
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{
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// R=1/2 K=7 convolutional coder
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//
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// OP ARG ID CRC STATUS FEC bits
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// 01 80 1234 2E3E 00 6580A862DD8808
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//
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// 1. reverse the bit order for each byte of the first 7 bytes (to undo the reversal performed for display, above)
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// 2. feed those bits into a shift register which is preloaded with all zeros
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// 3. for each bit, calculate the modulo-2 sum: bit(n-0) + bit(n-2) + bit(n-5) + bit(n-6)
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// 4. then for each byte of resulting output, again reverse those bits to generate the values shown above
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{ // add the FEC bits to the end of the data
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unsigned int i;
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uint8_t shift_reg = 0;
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for (i = 0; i < FEC_K; i++)
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{
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unsigned int bit_num;
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const uint8_t bi = data[i];
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uint8_t bo = 0;
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for (bit_num = 0; bit_num < 8; bit_num++)
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{
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shift_reg = (shift_reg << 1) | ((bi >> bit_num) & 1u);
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bo |= (((shift_reg >> 6) ^ (shift_reg >> 5) ^ (shift_reg >> 2) ^ (shift_reg >> 0)) & 1u) << bit_num;
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}
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data[FEC_K + i] = bo;
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}
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}
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// 01 00 00 23 DD F0 00 65 00 00 0F 45 1F 21
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/*
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#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
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{
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const unsigned int size = FEC_K * 2;
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unsigned int i;
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UART_printf("mdc1200 tx1 %u ", size);
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for (i = 0; i < size; i++)
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UART_printf(" %02X", data[i]);
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UART_SendText("\r\n");
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}
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#endif
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*/
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{ // interleave the bits
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unsigned int i;
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unsigned int k;
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uint8_t interleaved[(FEC_K * 2) * 8];
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// interleave order
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// 0, 16, 32, 48, 64, 80, 96,
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// 1, 17, 33, 49, 65, 81, 97,
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// 2, 18, 34, 50, 66, 82, 98,
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// 3, 19, 35, 51, 67, 83, 99,
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// 4, 20, 36, 52, 68, 84, 100,
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// 5, 21, 37, 53, 69, 85, 101,
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// 6, 22, 38, 54, 70, 86, 102,
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// 7, 23, 39, 55, 71, 87, 103,
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// 8, 24, 40, 56, 72, 88, 104,
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// 9, 25, 41, 57, 73, 89, 105,
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// 10, 26, 42, 58, 74, 90, 106,
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// 11, 27, 43, 59, 75, 91, 107,
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// 12, 28, 44, 60, 76, 92, 108,
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// 13, 29, 45, 61, 77, 93, 109,
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// 14, 30, 46, 62, 78, 94, 110,
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// 15, 31, 47, 63, 79, 95, 111
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// bit interleaver
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for (i = 0, k = 0; i < (FEC_K * 2); i++)
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{
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unsigned int bit_num;
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const uint8_t b = data[i];
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for (bit_num = 0; bit_num < 8; bit_num++)
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{
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interleaved[k] = (b >> bit_num) & 1u;
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k += 16;
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if (k >= sizeof(interleaved))
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k -= sizeof(interleaved) - 1;
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}
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}
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// copy the interleaved bits back to the data buffer
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for (i = 0, k = 0; i < (FEC_K * 2); i++)
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{
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int bit_num;
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uint8_t b = 0;
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for (bit_num = 7; bit_num >= 0; bit_num--)
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if (interleaved[k++])
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b |= 1u << bit_num;
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data[i] = b;
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}
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}
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return data + (FEC_K * 2);
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}
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unsigned int MDC1200_encode_single_packet(uint8_t *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id)
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{
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unsigned int size;
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uint16_t crc;
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uint8_t *p = data;
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memcpy(p, pre_amble, sizeof(pre_amble));
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p += sizeof(pre_amble);
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memcpy(p, sync, sizeof(sync));
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p += sizeof(sync);
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p[0] = op;
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p[1] = arg;
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p[2] = (unit_id >> 8) & 0x00ff;
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p[3] = (unit_id >> 0) & 0x00ff;
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crc = compute_crc(p, 4);
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p[4] = (crc >> 0) & 0x00ff;
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p[5] = (crc >> 8) & 0x00ff;
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p[6] = 0; // unknown field (00 for PTTIDs, 76 for STS and MSG)
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p = encode_data(p);
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size = (unsigned int)(p - data);
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/*
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#if defined(ENABLE_UART) && defined(ENABLE_UART_DEBUG)
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{
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unsigned int i;
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UART_printf("mdc1200 tx2 %u ", size);
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for (i = 0; i < size; i++)
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UART_printf(" %02X", data[i]);
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UART_SendText("\r\n");
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}
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#endif
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*/
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xor_modulation(data, size);
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return size;
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}
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/*
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unsigned int MDC1200_encode_double_packet(uint8_t *data, const uint8_t op, const uint8_t arg, const uint16_t unit_id, const uint8_t b0, const uint8_t b1, const uint8_t b2, const uint8_t b3)
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{
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unsigned int size;
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uint16_t crc;
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uint8_t *p = data;
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memcpy(p, pre_amble, sizeof(pre_amble));
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p += sizeof(pre_amble);
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memcpy(p, sync, sizeof(sync));
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p += sizeof(sync);
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p[0] = op;
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p[1] = arg;
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p[2] = (unit_id >> 8) & 0x00ff;
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p[3] = (unit_id >> 0) & 0x00ff;
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crc = compute_crc(p, 4);
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p[4] = (crc >> 0) & 0x00ff;
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p[5] = (crc >> 8) & 0x00ff;
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p[6] = 0; // status byte
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p = encode_data(p);
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p[0] = b0;
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p[1] = b1;
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p[2] = b2;
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p[3] = b3;
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crc = compute_crc(p, 4);
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p[4] = (crc >> 0) & 0x00ff;
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p[5] = (crc >> 8) & 0x00ff;
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p[6] = 0; // status byte
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p = encode_data(p);
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size = (unsigned int)(p - data);
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xor_modulation(data, size);
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return size;
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}
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*/
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// **********************************************************
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// RX
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struct {
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uint8_t bit;
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uint8_t prev_bit;
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uint8_t xor_bit;
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uint64_t shift_reg;
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unsigned int bit_count;
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unsigned int stage;
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bool inverted_sync;
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unsigned int data_index;
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uint8_t data[40];
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} rx;
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void MDC1200_reset_rx(void)
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{
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memset(&rx, 0, sizeof(rx));
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}
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bool MDC1200_process_rx(const uint8_t rx_byte, uint8_t *op, uint8_t *arg, uint16_t *unit_id)
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{
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unsigned int i;
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int k;
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for (k = 7; k >= 0; k--)
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{
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rx.prev_bit = rx.bit;
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rx.bit = (rx_byte >> k) & 1u;
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if (rx.stage == 0)
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{ // scanning for the pre-amble
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rx.xor_bit = rx.bit & 1u;
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}
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else
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{
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rx.xor_bit = (rx.xor_bit ^ rx.bit) & 1u;
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if (rx.inverted_sync)
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rx.xor_bit ^= 1u;
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}
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rx.shift_reg = (rx.shift_reg << 1) | (rx.xor_bit & 1u);
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rx.bit_count++;
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// *********
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if (rx.stage == 0)
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{ // looking for pre-amble
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if (rx.bit_count < 20 || (rx.shift_reg & 0xfffff) != 1u)
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continue;
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rx.xor_bit = 1;
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rx.stage = 1;
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rx.bit_count = 1;
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//s.printf("%5u %2u %u pre-amble found", index, rx_bit_count, rx_packet_stage);
|
|
//Memo1->Lines->Add(s);
|
|
}
|
|
|
|
if (rx.stage < 2)
|
|
{
|
|
//s.printf("%5u %3u %u ", index, rx_bit_count, rx_packet_stage);
|
|
//for (uint64_t mask = 1ull << ((sizeof(rx_shift_reg) * 8) - 1); mask != 0; mask >>= 1)
|
|
// s += (rx_shift_reg & mask) ? '#' : '.';
|
|
//s += " ";
|
|
//for (int i = sizeof(rx_shift_reg) - 1; i >= 0; i--)
|
|
//{
|
|
// String s2;
|
|
// s2.printf(" %02X", (uint8_t)(rx_shift_reg >> (i * 8)));
|
|
// s += s2;
|
|
//}
|
|
//Memo1->Lines->Add(s);
|
|
}
|
|
|
|
if (rx.stage == 1)
|
|
{ // looking for the 40-bit sync pattern, it follows the 24-bit pre-amble
|
|
|
|
const unsigned int sync_bit_ok_threshold = 32;
|
|
|
|
if (rx.bit_count >= sync_bit_ok_threshold)
|
|
{
|
|
// 40-bit sync pattern
|
|
uint64_t sync_nor = 0x07092a446fu; // normal
|
|
uint64_t sync_inv = 0xffffffffffu ^ sync_nor; // bit inverted
|
|
|
|
sync_nor ^= rx.shift_reg;
|
|
sync_inv ^= rx.shift_reg;
|
|
|
|
unsigned int nor_count = 0;
|
|
unsigned int inv_count = 0;
|
|
for (i = 40; i > 0; i--, sync_nor >>= 1, sync_inv >>= 1)
|
|
{
|
|
nor_count += sync_nor & 1u;
|
|
inv_count += sync_inv & 1u;
|
|
}
|
|
nor_count = 40 - nor_count;
|
|
inv_count = 40 - inv_count;
|
|
|
|
if (nor_count >= sync_bit_ok_threshold || inv_count >= sync_bit_ok_threshold)
|
|
{ // good enough
|
|
|
|
rx.inverted_sync = (inv_count > nor_count) ? true : false;
|
|
|
|
//String s;
|
|
//s.printf("%5u %2u %u sync found %s %u bits ",
|
|
// index,
|
|
// rx_bit_count,
|
|
// rx_packet_stage,
|
|
// rx_inverted_sync ? "inv" : "nor",
|
|
// rx_inverted_sync ? inv_count : nor_count);
|
|
|
|
//for (int i = 4; i >= 0; i--)
|
|
//{
|
|
// String s2;
|
|
// uint8_t b = rx_shift_reg >> (8 * i);
|
|
// if (rx_inverted_sync)
|
|
// b ^= 0xff;
|
|
// s2.printf(" %02X", b);
|
|
// s += s2;
|
|
//}
|
|
//Memo1->Lines->Add(s);
|
|
|
|
rx.data_index = 0;
|
|
rx.bit_count = 0;
|
|
rx.stage++;
|
|
}
|
|
}
|
|
|
|
continue;
|
|
}
|
|
|
|
// *********
|
|
|
|
if (rx.stage < 2)
|
|
continue;
|
|
|
|
if (rx.bit_count < 8)
|
|
continue;
|
|
|
|
rx.bit_count = 0;
|
|
|
|
// 55 55 55 55 55 55 55 07 09 2A 44 6F 94 9C 22 20 32 A4 1A 37 1E 3A 00 98 2C 84
|
|
|
|
rx.data[rx.data_index++] = rx.shift_reg & 0xff; // save the last 8 bits
|
|
|
|
if (rx.data_index < (FEC_K * 2))
|
|
continue;
|
|
|
|
// s.printf("%5u %3u %u %2u ", index, rx_bit_count, rx_packet_stage, rx_buffer.size());
|
|
// for (i = 0; i < rx_data_index; i++)
|
|
// {
|
|
// String s2;
|
|
// const uint8_t b = rx_buffer[i];
|
|
// s2.printf(" %02X", b);
|
|
// s += s2;
|
|
// }
|
|
// Memo1->Lines->Add(s);
|
|
|
|
if (!decode_data(rx.data))
|
|
{
|
|
MDC1200_reset_rx();
|
|
continue;
|
|
}
|
|
|
|
// extract the info from the packet
|
|
*op = rx.data[0];
|
|
*arg = rx.data[1];
|
|
*unit_id = ((uint16_t)rx.data[3] << 8) | (rx.data[2] << 0);
|
|
|
|
//s.printf("%5u %3u %u %2u decoded ", index, rx_bit_count, rx_packet_stage, rx_buffer.size());
|
|
//for (i = 0; i < 14; i++)
|
|
//{
|
|
// String s2;
|
|
// const uint8_t b = data[i];
|
|
// s2.printf(" %02X", b);
|
|
// s += s2;
|
|
//}
|
|
//Memo1->Lines->Add(s);
|
|
|
|
// reset the detector
|
|
MDC1200_reset_rx();
|
|
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
// **********************************************************
|
|
|
|
/*
|
|
void test(void)
|
|
{
|
|
uint8_t data[42];
|
|
const int size = MDC1200_encode_single_packet(data, 0x12, 0x34, 0x5678);
|
|
// const int size = MDC1200_encode_double_packet(data, 0x55, 0x34, 0x5678, 0x0a, 0x0b, 0x0c, 0x0d);
|
|
}
|
|
*/ |