2025-04-15 22:20:46 +03:00
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# SAR instruction tests
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# Format: RawBytes;Instructions
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RawBytes;Instructions
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# SAR r/m8, 1 (opcode D0 /7)
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D0F8;[{ "Type": "Sar", "Operands": ["al", "0x01"] }]
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D0FB;[{ "Type": "Sar", "Operands": ["bl", "0x01"] }]
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# SAR r/m32, 1 (opcode D1 /7)
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D1F8;[{ "Type": "Sar", "Operands": ["eax", "0x01"] }]
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D1FB;[{ "Type": "Sar", "Operands": ["ebx", "0x01"] }]
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# SAR r/m8, CL (opcode D2 /7)
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D2F8;[{ "Type": "Sar", "Operands": ["al", "cl"] }]
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D2FB;[{ "Type": "Sar", "Operands": ["bl", "cl"] }]
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# SAR r/m32, CL (opcode D3 /7)
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D3F8;[{ "Type": "Sar", "Operands": ["eax", "cl"] }]
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D3FB;[{ "Type": "Sar", "Operands": ["ebx", "cl"] }]
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# SAR r/m8, imm8 (opcode C0 /7)
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C0F805;[{ "Type": "Sar", "Operands": ["al", "0x05"] }]
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C0FB05;[{ "Type": "Sar", "Operands": ["bl", "0x05"] }]
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# SAR r/m32, imm8 (opcode C1 /7)
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C1F805;[{ "Type": "Sar", "Operands": ["eax", "0x05"] }]
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C1FB05;[{ "Type": "Sar", "Operands": ["ebx", "0x05"] }]
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2025-04-17 21:35:49 +03:00
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# SAR with memory operands (fixed)
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D07810;[{ "Type": "Sar", "Operands": ["byte ptr [eax+0x10]", "0x01"] }]
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D338;[{ "Type": "Sar", "Operands": ["dword ptr [eax]", "cl"] }]
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C13805;[{ "Type": "Sar", "Operands": ["dword ptr [eax]", "0x05"] }]
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