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ParkanPlayground/X86DisassemblerTests/TestData
History
bird_egop 8c15143933 Fix all tests
2025-04-18 14:06:43 +03:00
..
adc_tests.csv
Unified ADC accumulator handlers into a single handler
2025-04-17 01:34:08 +03:00
add_tests.csv
Fixes to tests and ModRM + SIB
2025-04-17 20:06:18 +03:00
and_tests.csv
Fixes to tests and ModRM + SIB
2025-04-17 20:06:18 +03:00
bit_tests.csv
Unified ADC accumulator handlers into a single handler
2025-04-17 01:34:08 +03:00
call_tests.csv
Added support for far call instructions and PUSH imm16. Fixed invalid test cases in call_tests.csv and or_tests.csv
2025-04-16 21:44:02 +03:00
cmp_tests.csv
Fixed several instruction handling issues: 1) Added proper handling for zero displacements in memory operands, 2) Fixed large unsigned displacement values display, 3) Added CmpEaxImmHandler for CMP EAX, imm32 instruction, 4) Fixed JP and JNP conditional jump instruction types
2025-04-16 19:43:03 +03:00
div_tests.csv
Unified ADC accumulator handlers into a single handler
2025-04-17 01:34:08 +03:00
fadd_tests.csv
Fixed floating point handlers for qword operands and added missing FCOM ST(0), ST(i) handler
2025-04-18 00:44:57 +03:00
fcom_tests.csv
Refactored floating point p-handlers with consistent naming convention
2025-04-18 02:31:06 +03:00
fdiv_tests.csv
tests and handler fixes
2025-04-18 12:49:43 +03:00
fdivr_tests.csv
tests and handler fixes
2025-04-18 12:49:43 +03:00
flag_tests.csv
Enhanced test coverage for DIV, flag control, and FNSTSW instructions
2025-04-15 22:35:14 +03:00
fld_fst_tests.csv
tests and handler fixes
2025-04-18 12:49:43 +03:00
fmul_tests.csv
tests and handler fixes
2025-04-18 12:49:43 +03:00
fnstsw_tests.csv
fixes to FPU tests
2025-04-18 13:47:34 +03:00
fpu_misc_tests.csv
Fix floating-point instruction test encodings for memory operands
2025-04-18 13:13:13 +03:00
fstsw_tests.csv
fixes to FPU tests
2025-04-18 13:47:34 +03:00
fsub_tests.csv
Fix floating-point instruction memory operand test encodings
2025-04-18 13:47:22 +03:00
fsubr_tests.csv
Fix floating-point instruction memory operand test encodings
2025-04-18 13:47:22 +03:00
idiv_tests.csv
Fixes to tests and ModRM + SIB
2025-04-17 20:06:18 +03:00
imul_tests.csv
Fixed IMUL instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] addressing.
2025-04-16 21:11:47 +03:00
jcc_tests.csv
Fixed several instruction handling issues: 1) Added proper handling for zero displacements in memory operands, 2) Fixed large unsigned displacement values display, 3) Added CmpEaxImmHandler for CMP EAX, imm32 instruction, 4) Fixed JP and JNP conditional jump instruction types
2025-04-16 19:43:03 +03:00
jmp_tests.csv
Fixed invalid test cases in x86 disassembler tests. Added comments explaining special cases in x86 encoding and added valid test cases for LEA with different destination registers.
2025-04-16 20:13:07 +03:00
lea_tests.csv
Fixes to tests and ModRM + SIB
2025-04-17 20:06:18 +03:00
misc_tests.csv
tests and handler fixes
2025-04-18 12:49:43 +03:00
mov_tests.csv
Fixed special case in MOV tests with EBP addressing. When Mod=00 and R/M=101 (EBP), it indicates a 32-bit displacement-only addressing mode, not [EBP]. Added correct test cases with Mod=01 and zero displacement.
2025-04-16 20:27:00 +03:00
mul_tests.csv
Fixed MUL instruction tests with SIB byte encoding. When using SIB byte with Base=101 (EBP) and Mod=00, it requires a 32-bit displacement. Replaced incorrect encodings with proper ones for [eax] and direct memory addressing.
2025-04-16 20:40:18 +03:00
neg_tests.csv
new handlers and test fixes
2025-04-16 20:54:08 +03:00
nop_tests.csv
add tons of tests
2025-04-15 22:20:46 +03:00
not_tests.csv
Fixed NOT instruction tests with SIB byte encoding. Corrected memory addressing encodings for [eax] and displacement addressing.
2025-04-16 21:17:48 +03:00
or_tests.csv
Added support for far call instructions and PUSH imm16. Fixed invalid test cases in call_tests.csv and or_tests.csv
2025-04-16 21:44:02 +03:00
popreg_tests.csv
add tons of tests
2025-04-15 22:20:46 +03:00
poprm_tests.csv
Fixes to tests and ModRM + SIB
2025-04-17 20:06:18 +03:00
pushimm_tests.csv
Unified ADC accumulator handlers into a single handler
2025-04-17 01:34:08 +03:00
pushreg_tests.csv
add tons of tests
2025-04-15 22:20:46 +03:00
pushrm_tests.csv
Fixes to tests and ModRM + SIB
2025-04-17 20:06:18 +03:00
rcl_tests.csv
implement shift and rotate handlers. Fix tests
2025-04-17 21:35:49 +03:00
rcr_tests.csv
implement shift and rotate handlers. Fix tests
2025-04-17 21:35:49 +03:00
ret_tests.csv
fixes
2025-04-17 22:56:05 +03:00
rol_tests.csv
implement shift and rotate handlers. Fix tests
2025-04-17 21:35:49 +03:00
ror_tests.csv
implement shift and rotate handlers. Fix tests
2025-04-17 21:35:49 +03:00
sar_tests.csv
implement shift and rotate handlers. Fix tests
2025-04-17 21:35:49 +03:00
sbb_tests.csv
fixes
2025-04-17 22:56:05 +03:00
segment_override_tests.csv
fix segment override tests according to ghidra
2025-04-15 23:22:14 +03:00
shl_tests.csv
implement shift and rotate handlers. Fix tests
2025-04-17 21:35:49 +03:00
shr_tests.csv
implement shift and rotate handlers. Fix tests
2025-04-17 21:35:49 +03:00
stack_tests.csv
Fix all tests
2025-04-18 14:06:43 +03:00
string_tests.csv
Refactored floating point instruction handlers for better organization and maintainability. Split generic handlers into specialized classes for DD and DF opcodes.
2025-04-18 00:22:02 +03:00
sub_tests.csv
Unified ADC accumulator handlers into a single handler
2025-04-17 01:34:08 +03:00
test_tests.csv
Fixes to tests and ModRM + SIB
2025-04-17 20:06:18 +03:00
xchg_tests.csv
Fix all tests
2025-04-18 14:06:43 +03:00
xor_tests.csv
add tons of tests
2025-04-15 22:20:46 +03:00