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https://github.com/sampletext32/ParkanPlayground.git
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Refactored floating point p-handlers with consistent naming convention
This commit is contained in:
@ -3,15 +3,15 @@ namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
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using X86Disassembler.X86.Operands;
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/// <summary>
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/// Handler for FADD ST(i), ST(0) instruction (DC C0-C7)
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/// Handler for FADDP ST(i), ST instruction (DE C0-C7)
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/// </summary>
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public class FaddRegisterHandler : InstructionHandler
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public class FaddpStiStHandler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FaddRegisterHandler class
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/// Initializes a new instance of the FaddpStiStHandler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FaddRegisterHandler(InstructionDecoder decoder)
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public FaddpStiStHandler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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@ -23,25 +23,23 @@ public class FaddRegisterHandler : InstructionHandler
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FADD ST(i), ST(0) is DC C0-C7
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if (opcode != 0xDC) return false;
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// FADDP ST(i), ST is DE C0-C7
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if (opcode != 0xDE) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check if the ModR/M byte has reg field = 0 and mod = 3
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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byte mod = (byte)((modRm >> 6) & 0x3);
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// Check second opcode byte
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byte secondOpcode = Decoder.PeakByte();
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// Only handle register operands (mod = 3) with reg = 0
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return reg == 0 && mod == 3;
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// Only handle C0-C7
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return secondOpcode is >= 0xC0 and <= 0xC7;
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}
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/// <summary>
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/// Decodes a FADD ST(i), ST(0) instruction
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/// Decodes a FADDP ST(i), ST instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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@ -53,25 +51,11 @@ public class FaddRegisterHandler : InstructionHandler
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return false;
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}
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// Read the ModR/M byte
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var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
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// Read the ModR/M byte and calculate ST(i) index
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var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xC0);
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// Set the instruction type
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instruction.Type = InstructionType.Fadd;
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// Map rm field to FPU register index
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FpuRegisterIndex stIndex = rm switch
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{
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RegisterIndex.A => FpuRegisterIndex.ST0,
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RegisterIndex.C => FpuRegisterIndex.ST1,
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RegisterIndex.D => FpuRegisterIndex.ST2,
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RegisterIndex.B => FpuRegisterIndex.ST3,
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RegisterIndex.Sp => FpuRegisterIndex.ST4,
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RegisterIndex.Bp => FpuRegisterIndex.ST5,
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RegisterIndex.Si => FpuRegisterIndex.ST6,
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RegisterIndex.Di => FpuRegisterIndex.ST7,
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_ => FpuRegisterIndex.ST0 // Default case, should not happen
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};
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instruction.Type = InstructionType.Faddp;
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// Create the FPU register operands
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var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
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@ -31,13 +31,11 @@ public class FdivRegisterHandler : InstructionHandler
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return false;
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}
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// Check if the ModR/M byte has reg field = 6 and mod = 3
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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byte mod = (byte)((modRm >> 6) & 0x3);
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// Check second opcode byte
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byte secondOpcode = Decoder.PeakByte();
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// Only handle register operands (mod = 3) with reg = 6
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return reg == 6 && mod == 3;
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// Only handle F0-F7
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return secondOpcode is >= 0xF0 and <= 0xF7;
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}
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/// <summary>
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@ -53,25 +51,11 @@ public class FdivRegisterHandler : InstructionHandler
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return false;
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}
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// Read the ModR/M byte
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var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
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// Read the ModR/M byte and calculate ST(i) index
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var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xF0);
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// Set the instruction type
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instruction.Type = InstructionType.Fdiv;
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// Map rm field to FPU register index
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FpuRegisterIndex stIndex = rm switch
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{
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RegisterIndex.A => FpuRegisterIndex.ST0,
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RegisterIndex.C => FpuRegisterIndex.ST1,
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RegisterIndex.D => FpuRegisterIndex.ST2,
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RegisterIndex.B => FpuRegisterIndex.ST3,
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RegisterIndex.Sp => FpuRegisterIndex.ST4,
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RegisterIndex.Bp => FpuRegisterIndex.ST5,
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RegisterIndex.Si => FpuRegisterIndex.ST6,
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RegisterIndex.Di => FpuRegisterIndex.ST7,
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_ => FpuRegisterIndex.ST0 // Default case, should not happen
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};
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// Create the FPU register operands
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var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
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@ -0,0 +1,73 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
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using X86Disassembler.X86.Operands;
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/// <summary>
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/// Handler for FDIVP ST(i), ST instruction (DE F0-F7)
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/// </summary>
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public class FdivpStiStHandler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FdivpStiStHandler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FdivpStiStHandler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FDIVP ST(i), ST is DE F0-F7
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if (opcode != 0xDE) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check second opcode byte
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byte secondOpcode = Decoder.PeakByte();
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// Only handle F0-F7
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return secondOpcode is >= 0xF0 and <= 0xF7;
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}
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/// <summary>
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/// Decodes a FDIVP ST(i), ST instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte and calculate ST(i) index
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var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xF0);
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// Set the instruction type
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instruction.Type = InstructionType.Fdivp;
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// Create the FPU register operands
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var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
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var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
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// Set the structured operands
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instruction.StructuredOperands =
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[
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stiOperand,
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st0Operand
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];
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return true;
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}
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}
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@ -31,13 +31,11 @@ public class FdivrRegisterHandler : InstructionHandler
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return false;
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}
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// Check if the ModR/M byte has reg field = 7 and mod = 3
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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byte mod = (byte)((modRm >> 6) & 0x3);
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// Check second opcode byte
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byte secondOpcode = Decoder.PeakByte();
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// Only handle register operands (mod = 3) with reg = 7
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return reg == 7 && mod == 3;
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// Only handle F8-FF
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return secondOpcode is >= 0xF8 and <= 0xFF;
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}
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/// <summary>
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@ -53,25 +51,11 @@ public class FdivrRegisterHandler : InstructionHandler
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return false;
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}
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// Read the ModR/M byte
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var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
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// Read the ModR/M byte and calculate ST(i) index
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var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xF8);
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// Set the instruction type
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instruction.Type = InstructionType.Fdivr;
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// Map rm field to FPU register index
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FpuRegisterIndex stIndex = rm switch
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{
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RegisterIndex.A => FpuRegisterIndex.ST0,
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RegisterIndex.C => FpuRegisterIndex.ST1,
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RegisterIndex.D => FpuRegisterIndex.ST2,
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RegisterIndex.B => FpuRegisterIndex.ST3,
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RegisterIndex.Sp => FpuRegisterIndex.ST4,
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RegisterIndex.Bp => FpuRegisterIndex.ST5,
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RegisterIndex.Si => FpuRegisterIndex.ST6,
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RegisterIndex.Di => FpuRegisterIndex.ST7,
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_ => FpuRegisterIndex.ST0 // Default case, should not happen
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};
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// Create the FPU register operands
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var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
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@ -0,0 +1,73 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
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using X86Disassembler.X86.Operands;
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/// <summary>
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/// Handler for FDIVRP ST(i), ST instruction (DE F8-FF)
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/// </summary>
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public class FdivrpStiStHandler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FdivrpStiStHandler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FdivrpStiStHandler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FDIVRP ST(i), ST is DE F8-FF
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if (opcode != 0xDE) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check second opcode byte
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byte secondOpcode = Decoder.PeakByte();
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// Only handle F8-FF
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return secondOpcode is >= 0xF8 and <= 0xFF;
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}
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/// <summary>
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/// Decodes a FDIVRP ST(i), ST instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte and calculate ST(i) index
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var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xF8);
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// Set the instruction type
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instruction.Type = InstructionType.Fdivrp;
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// Create the FPU register operands
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var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
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var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
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// Set the structured operands
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instruction.StructuredOperands =
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[
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stiOperand,
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st0Operand
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];
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return true;
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}
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}
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@ -31,13 +31,11 @@ public class FmulRegisterHandler : InstructionHandler
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return false;
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}
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// Check if the ModR/M byte has reg field = 1 and mod = 3
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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byte mod = (byte)((modRm >> 6) & 0x3);
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// Check second opcode byte
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byte secondOpcode = Decoder.PeakByte();
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// Only handle register operands (mod = 3) with reg = 1
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return reg == 1 && mod == 3;
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// Only handle C8-CF
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return secondOpcode is >= 0xC8 and <= 0xCF;
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}
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/// <summary>
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@ -53,25 +51,11 @@ public class FmulRegisterHandler : InstructionHandler
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return false;
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}
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// Read the ModR/M byte
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var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
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// Read the ModR/M byte and calculate ST(i) index
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var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xC8);
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// Set the instruction type
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instruction.Type = InstructionType.Fmul;
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// Map rm field to FPU register index
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FpuRegisterIndex stIndex = rm switch
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{
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RegisterIndex.A => FpuRegisterIndex.ST0,
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RegisterIndex.C => FpuRegisterIndex.ST1,
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RegisterIndex.D => FpuRegisterIndex.ST2,
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RegisterIndex.B => FpuRegisterIndex.ST3,
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RegisterIndex.Sp => FpuRegisterIndex.ST4,
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RegisterIndex.Bp => FpuRegisterIndex.ST5,
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RegisterIndex.Si => FpuRegisterIndex.ST6,
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RegisterIndex.Di => FpuRegisterIndex.ST7,
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_ => FpuRegisterIndex.ST0 // Default case, should not happen
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};
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// Create the FPU register operands
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var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
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@ -0,0 +1,73 @@
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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
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using X86Disassembler.X86.Operands;
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/// <summary>
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/// Handler for FMULP ST(i), ST instruction (DE C8-CF)
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/// </summary>
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public class FmulpStiStHandler : InstructionHandler
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{
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/// <summary>
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/// Initializes a new instance of the FmulpStiStHandler class
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/// </summary>
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/// <param name="decoder">The instruction decoder that owns this handler</param>
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public FmulpStiStHandler(InstructionDecoder decoder)
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: base(decoder)
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{
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}
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/// <summary>
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/// Checks if this handler can decode the given opcode
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/// </summary>
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/// <param name="opcode">The opcode to check</param>
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/// <returns>True if this handler can decode the opcode</returns>
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public override bool CanHandle(byte opcode)
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{
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// FMULP ST(i), ST is DE C8-CF
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if (opcode != 0xDE) return false;
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Check second opcode byte
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byte secondOpcode = Decoder.PeakByte();
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// Only handle C8-CF
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return secondOpcode is >= 0xC8 and <= 0xCF;
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}
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/// <summary>
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/// Decodes a FMULP ST(i), ST instruction
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/// </summary>
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/// <param name="opcode">The opcode of the instruction</param>
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/// <param name="instruction">The instruction object to populate</param>
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/// <returns>True if the instruction was successfully decoded</returns>
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public override bool Decode(byte opcode, Instruction instruction)
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{
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if (!Decoder.CanReadByte())
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{
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return false;
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}
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// Read the ModR/M byte and calculate ST(i) index
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var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xC8);
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// Set the instruction type
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instruction.Type = InstructionType.Fmulp;
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// Create the FPU register operands
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var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
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var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
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// Set the structured operands
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instruction.StructuredOperands =
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[
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stiOperand,
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st0Operand
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];
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return true;
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}
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}
|
@ -31,13 +31,11 @@ public class FsubRegisterHandler : InstructionHandler
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return false;
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}
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// Check if the ModR/M byte has reg field = 4 and mod = 3
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byte modRm = Decoder.PeakByte();
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byte reg = (byte)((modRm >> 3) & 0x7);
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byte mod = (byte)((modRm >> 6) & 0x3);
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// Check second opcode byte
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byte secondOpcode = Decoder.PeakByte();
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// Only handle register operands (mod = 3) with reg = 4
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return reg == 4 && mod == 3;
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// Only handle E0-E7
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return secondOpcode is >= 0xE0 and <= 0xE7;
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}
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/// <summary>
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@ -53,25 +51,11 @@ public class FsubRegisterHandler : InstructionHandler
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return false;
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}
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// Read the ModR/M byte
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var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
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// Read the ModR/M byte and calculate ST(i) index
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var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xE0);
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// Set the instruction type
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instruction.Type = InstructionType.Fsub;
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// Map rm field to FPU register index
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FpuRegisterIndex stIndex = rm switch
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{
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RegisterIndex.A => FpuRegisterIndex.ST0,
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RegisterIndex.C => FpuRegisterIndex.ST1,
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RegisterIndex.D => FpuRegisterIndex.ST2,
|
||||
RegisterIndex.B => FpuRegisterIndex.ST3,
|
||||
RegisterIndex.Sp => FpuRegisterIndex.ST4,
|
||||
RegisterIndex.Bp => FpuRegisterIndex.ST5,
|
||||
RegisterIndex.Si => FpuRegisterIndex.ST6,
|
||||
RegisterIndex.Di => FpuRegisterIndex.ST7,
|
||||
_ => FpuRegisterIndex.ST0 // Default case, should not happen
|
||||
};
|
||||
|
||||
// Create the FPU register operands
|
||||
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
|
||||
|
@ -0,0 +1,73 @@
|
||||
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
|
||||
|
||||
using X86Disassembler.X86.Operands;
|
||||
|
||||
/// <summary>
|
||||
/// Handler for FSUBP ST(i), ST instruction (DE E0-E7)
|
||||
/// </summary>
|
||||
public class FsubpStiStHandler : InstructionHandler
|
||||
{
|
||||
/// <summary>
|
||||
/// Initializes a new instance of the FsubpStiStHandler class
|
||||
/// </summary>
|
||||
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||
public FsubpStiStHandler(InstructionDecoder decoder)
|
||||
: base(decoder)
|
||||
{
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Checks if this handler can decode the given opcode
|
||||
/// </summary>
|
||||
/// <param name="opcode">The opcode to check</param>
|
||||
/// <returns>True if this handler can decode the opcode</returns>
|
||||
public override bool CanHandle(byte opcode)
|
||||
{
|
||||
// FSUBP ST(i), ST is DE E0-E7
|
||||
if (opcode != 0xDE) return false;
|
||||
|
||||
if (!Decoder.CanReadByte())
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
// Check second opcode byte
|
||||
byte secondOpcode = Decoder.PeakByte();
|
||||
|
||||
// Only handle E0-E7
|
||||
return secondOpcode is >= 0xE0 and <= 0xE7;
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Decodes a FSUBP ST(i), ST instruction
|
||||
/// </summary>
|
||||
/// <param name="opcode">The opcode of the instruction</param>
|
||||
/// <param name="instruction">The instruction object to populate</param>
|
||||
/// <returns>True if the instruction was successfully decoded</returns>
|
||||
public override bool Decode(byte opcode, Instruction instruction)
|
||||
{
|
||||
if (!Decoder.CanReadByte())
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
// Read the ModR/M byte and calculate ST(i) index
|
||||
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xE0);
|
||||
|
||||
// Set the instruction type
|
||||
instruction.Type = InstructionType.Fsubp;
|
||||
|
||||
// Create the FPU register operands
|
||||
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
|
||||
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
|
||||
|
||||
// Set the structured operands
|
||||
instruction.StructuredOperands =
|
||||
[
|
||||
stiOperand,
|
||||
st0Operand
|
||||
];
|
||||
|
||||
return true;
|
||||
}
|
||||
}
|
@ -31,13 +31,11 @@ public class FsubrRegisterHandler : InstructionHandler
|
||||
return false;
|
||||
}
|
||||
|
||||
// Check if the ModR/M byte has reg field = 5 and mod = 3
|
||||
byte modRm = Decoder.PeakByte();
|
||||
byte reg = (byte)((modRm >> 3) & 0x7);
|
||||
byte mod = (byte)((modRm >> 6) & 0x3);
|
||||
// Check second opcode byte
|
||||
byte secondOpcode = Decoder.PeakByte();
|
||||
|
||||
// Only handle register operands (mod = 3) with reg = 5
|
||||
return reg == 5 && mod == 3;
|
||||
// Only handle E8-EF
|
||||
return secondOpcode is >= 0xE8 and <= 0xEF;
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
@ -53,25 +51,11 @@ public class FsubrRegisterHandler : InstructionHandler
|
||||
return false;
|
||||
}
|
||||
|
||||
// Read the ModR/M byte
|
||||
var (mod, reg, rm, _) = ModRMDecoder.ReadModRM();
|
||||
// Read the ModR/M byte and calculate ST(i) index
|
||||
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xE8);
|
||||
|
||||
// Set the instruction type
|
||||
instruction.Type = InstructionType.Fsubr;
|
||||
|
||||
// Map rm field to FPU register index
|
||||
FpuRegisterIndex stIndex = rm switch
|
||||
{
|
||||
RegisterIndex.A => FpuRegisterIndex.ST0,
|
||||
RegisterIndex.C => FpuRegisterIndex.ST1,
|
||||
RegisterIndex.D => FpuRegisterIndex.ST2,
|
||||
RegisterIndex.B => FpuRegisterIndex.ST3,
|
||||
RegisterIndex.Sp => FpuRegisterIndex.ST4,
|
||||
RegisterIndex.Bp => FpuRegisterIndex.ST5,
|
||||
RegisterIndex.Si => FpuRegisterIndex.ST6,
|
||||
RegisterIndex.Di => FpuRegisterIndex.ST7,
|
||||
_ => FpuRegisterIndex.ST0 // Default case, should not happen
|
||||
};
|
||||
|
||||
// Create the FPU register operands
|
||||
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
|
||||
|
@ -0,0 +1,73 @@
|
||||
namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
|
||||
|
||||
using X86Disassembler.X86.Operands;
|
||||
|
||||
/// <summary>
|
||||
/// Handler for FSUBRP ST(i), ST instruction (DE E8-EF)
|
||||
/// </summary>
|
||||
public class FsubrpStiStHandler : InstructionHandler
|
||||
{
|
||||
/// <summary>
|
||||
/// Initializes a new instance of the FsubrpStiStHandler class
|
||||
/// </summary>
|
||||
/// <param name="decoder">The instruction decoder that owns this handler</param>
|
||||
public FsubrpStiStHandler(InstructionDecoder decoder)
|
||||
: base(decoder)
|
||||
{
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Checks if this handler can decode the given opcode
|
||||
/// </summary>
|
||||
/// <param name="opcode">The opcode to check</param>
|
||||
/// <returns>True if this handler can decode the opcode</returns>
|
||||
public override bool CanHandle(byte opcode)
|
||||
{
|
||||
// FSUBRP ST(i), ST is DE E8-EF
|
||||
if (opcode != 0xDE) return false;
|
||||
|
||||
if (!Decoder.CanReadByte())
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
// Check second opcode byte
|
||||
byte secondOpcode = Decoder.PeakByte();
|
||||
|
||||
// Only handle E8-EF
|
||||
return secondOpcode is >= 0xE8 and <= 0xEF;
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
/// Decodes a FSUBRP ST(i), ST instruction
|
||||
/// </summary>
|
||||
/// <param name="opcode">The opcode of the instruction</param>
|
||||
/// <param name="instruction">The instruction object to populate</param>
|
||||
/// <returns>True if the instruction was successfully decoded</returns>
|
||||
public override bool Decode(byte opcode, Instruction instruction)
|
||||
{
|
||||
if (!Decoder.CanReadByte())
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
// Read the ModR/M byte and calculate ST(i) index
|
||||
var stIndex = (FpuRegisterIndex)(Decoder.ReadByte() - 0xE8);
|
||||
|
||||
// Set the instruction type
|
||||
instruction.Type = InstructionType.Fsubrp;
|
||||
|
||||
// Create the FPU register operands
|
||||
var stiOperand = OperandFactory.CreateFPURegisterOperand(stIndex);
|
||||
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0);
|
||||
|
||||
// Set the structured operands
|
||||
instruction.StructuredOperands =
|
||||
[
|
||||
stiOperand,
|
||||
st0Operand
|
||||
];
|
||||
|
||||
return true;
|
||||
}
|
||||
}
|
Reference in New Issue
Block a user