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mirror of https://github.com/sampletext32/ParkanPlayground.git synced 2025-05-19 03:41:18 +03:00

Reorganize floating point handlers into logical subfolders

This commit is contained in:
bird_egop 2025-04-17 23:48:09 +03:00
parent 963248dca0
commit 5916d13995
24 changed files with 818 additions and 42 deletions

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@ -1,6 +1,6 @@
namespace X86Disassembler.X86.Handlers.FloatingPoint; namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using Operands; using X86Disassembler.X86.Operands;
/// <summary> /// <summary>
/// Handler for FADD float32 instruction (D8 /0) /// Handler for FADD float32 instruction (D8 /0)

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namespace X86Disassembler.X86.Handlers.FloatingPoint; namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using Operands; using X86Disassembler.X86.Operands;
/// <summary> /// <summary>
/// Handler for FADD float64 instruction (DC /0) /// Handler for FADD float64 instruction (DC /0)

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary> /// <summary>
/// Handler for FDIV float32 instruction (D8 /6) /// Handler for FDIV float32 instruction (D8 /6)

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIV float64 instruction (DC /6)
/// </summary>
public class FdivFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIV is DC /6
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 6
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 6;
}
/// <summary>
/// Decodes a FDIV float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fdiv;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC F0-DC F7, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary> /// <summary>
/// Handler for FDIVR float32 instruction (D8 /7) /// Handler for FDIVR float32 instruction (D8 /7)

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FDIVR float64 instruction (DC /7)
/// </summary>
public class FdivrFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FdivrFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FdivrFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FDIVR is DC /7
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 7
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 7;
}
/// <summary>
/// Decodes a FDIVR float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fdivr;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC F8-DC FF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary> /// <summary>
/// Handler for FMUL float32 instruction (D8 /1) /// Handler for FMUL float32 instruction (D8 /1)

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary> /// <summary>
/// Handler for FMUL float64 instruction (DC /1) /// Handler for FMUL float64 instruction (DC /1)

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary> /// <summary>
/// Handler for FSUB float32 instruction (D8 /4) /// Handler for FSUB float32 instruction (D8 /4)

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUB float64 instruction (DC /4)
/// </summary>
public class FsubFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUB is DC /4
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 4
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 4;
}
/// <summary>
/// Decodes a FSUB float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fsub;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC E0-DC E7, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
/// <summary> /// <summary>
/// Handler for FSUBR float32 instruction (D8 /5) /// Handler for FSUBR float32 instruction (D8 /5)

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Arithmetic;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSUBR float64 instruction (DC /5)
/// </summary>
public class FsubrFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FsubrFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FsubrFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSUBR is DC /5
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 5
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 5;
}
/// <summary>
/// Decodes a FSUBR float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fsubr;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For DC E8-DC EF, the operands are reversed: ST(i), ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand,
st0Operand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
/// <summary> /// <summary>
/// Handler for FCOM float32 instruction (D8 /2) /// Handler for FCOM float32 instruction (D8 /2)

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FCOM float64 instruction (DC /2)
/// </summary>
public class FcomFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FcomFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FcomFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FCOM is DC /2
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 2
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 2;
}
/// <summary>
/// Decodes a FCOM float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fcom;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
/// <summary> /// <summary>
/// Handler for FCOMP float32 instruction (D8 /3) /// Handler for FCOMP float32 instruction (D8 /3)

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namespace X86Disassembler.X86.Handlers.FloatingPoint.Comparison;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FCOMP float64 instruction (DC /3)
/// </summary>
public class FcompFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FcompFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FcompFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FCOMP is DC /3
if (opcode != 0xDC) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 3;
}
/// <summary>
/// Decodes a FCOMP float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fcomp;
// For memory operands, set the operand
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands, we need to handle the stack registers
var st0Operand = OperandFactory.CreateFPURegisterOperand(FpuRegisterIndex.ST0); // ST(0)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
st0Operand,
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.Control;
/// <summary> /// <summary>
/// Handler for FNSTSW AX instruction (0xDF 0xE0) /// Handler for FNSTSW AX instruction (0xDF 0xE0)

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
/// <summary> /// <summary>
/// Handler for FLD float32 instruction (D9 /0) /// Handler for FLD float32 instruction (D9 /0)

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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FLD float64 instruction (DD /0)
/// </summary>
public class FldFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FldFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FldFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FLD is DD /0
if (opcode != 0xDD) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 0
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 0;
}
/// <summary>
/// Decodes a FLD float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Verify reg field is 0 (FLD)
if (reg != 0)
{
return false;
}
// Set the instruction type
instruction.Type = InstructionType.Fld;
// Handle based on addressing mode
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands with mod=3, this is FLD ST(i)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
/// <summary> /// <summary>
/// Handler for FST float32 instruction (D9 /2) /// Handler for FST float32 instruction (D9 /2)

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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FST float64 instruction (DD /2)
/// </summary>
public class FstFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FstFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FstFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FST is DD /2
if (opcode != 0xDD) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 2
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 2;
}
/// <summary>
/// Decodes a FST float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fst;
// Handle based on addressing mode
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands with mod=3, this is FST ST(i)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand
];
}
return true;
}
}

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namespace X86Disassembler.X86.Handlers.FloatingPoint; using X86Disassembler.X86.Operands;
using Operands; namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
/// <summary> /// <summary>
/// Handler for FSTP float32 instruction (D9 /3) /// Handler for FSTP float32 instruction (D9 /3)

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namespace X86Disassembler.X86.Handlers.FloatingPoint.LoadStore;
using X86Disassembler.X86.Operands;
/// <summary>
/// Handler for FSTP float64 instruction (DD /3)
/// </summary>
public class FstpFloat64Handler : InstructionHandler
{
/// <summary>
/// Initializes a new instance of the FstpFloat64Handler class
/// </summary>
/// <param name="decoder">The instruction decoder that owns this handler</param>
public FstpFloat64Handler(InstructionDecoder decoder)
: base(decoder)
{
}
/// <summary>
/// Checks if this handler can decode the given opcode
/// </summary>
/// <param name="opcode">The opcode to check</param>
/// <returns>True if this handler can decode the opcode</returns>
public override bool CanHandle(byte opcode)
{
// FSTP is DD /3
if (opcode != 0xDD) return false;
if (!Decoder.CanReadByte())
{
return false;
}
// Check if the ModR/M byte has reg field = 3
byte modRm = Decoder.PeakByte();
byte reg = (byte)((modRm >> 3) & 0x7);
return reg == 3;
}
/// <summary>
/// Decodes a FSTP float64 instruction
/// </summary>
/// <param name="opcode">The opcode of the instruction</param>
/// <param name="instruction">The instruction object to populate</param>
/// <returns>True if the instruction was successfully decoded</returns>
public override bool Decode(byte opcode, Instruction instruction)
{
if (!Decoder.CanReadByte())
{
return false;
}
// Read the ModR/M byte using the specialized FPU method
var (mod, reg, fpuRm, rawOperand) = ModRMDecoder.ReadModRMFpu();
// Set the instruction type
instruction.Type = InstructionType.Fstp;
// Handle based on addressing mode
if (mod != 3) // Memory operand
{
// Set the structured operands - the operand already has the correct size from ReadModRM
instruction.StructuredOperands =
[
rawOperand
];
}
else // Register operand (ST(i))
{
// For register operands with mod=3, this is FSTP ST(i)
var stiOperand = OperandFactory.CreateFPURegisterOperand(fpuRm); // ST(i)
// Set the structured operands
instruction.StructuredOperands =
[
stiOperand
];
}
return true;
}
}

View File

@ -376,26 +376,37 @@ public class InstructionHandlerFactory
// Add specialized Floating Point handlers // Add specialized Floating Point handlers
// D8 opcode handlers (float32 operations) // D8 opcode handlers (float32 operations)
_handlers.Add(new FaddFloat32Handler(_decoder)); // FADD float32 (D8 /0) _handlers.Add(new FloatingPoint.Arithmetic.FaddFloat32Handler(_decoder)); // FADD float32 (D8 /0)
_handlers.Add(new FmulFloat32Handler(_decoder)); // FMUL float32 (D8 /1) _handlers.Add(new FloatingPoint.Arithmetic.FmulFloat32Handler(_decoder)); // FMUL float32 (D8 /1)
_handlers.Add(new FcomFloat32Handler(_decoder)); // FCOM float32 (D8 /2) _handlers.Add(new FloatingPoint.Comparison.FcomFloat32Handler(_decoder)); // FCOM float32 (D8 /2)
_handlers.Add(new FcompFloat32Handler(_decoder)); // FCOMP float32 (D8 /3) _handlers.Add(new FloatingPoint.Comparison.FcompFloat32Handler(_decoder)); // FCOMP float32 (D8 /3)
_handlers.Add(new FsubFloat32Handler(_decoder)); // FSUB float32 (D8 /4) _handlers.Add(new FloatingPoint.Arithmetic.FsubFloat32Handler(_decoder)); // FSUB float32 (D8 /4)
_handlers.Add(new FsubrFloat32Handler(_decoder)); // FSUBR float32 (D8 /5) _handlers.Add(new FloatingPoint.Arithmetic.FsubrFloat32Handler(_decoder)); // FSUBR float32 (D8 /5)
_handlers.Add(new FdivFloat32Handler(_decoder)); // FDIV float32 (D8 /6) _handlers.Add(new FloatingPoint.Arithmetic.FdivFloat32Handler(_decoder)); // FDIV float32 (D8 /6)
_handlers.Add(new FdivrFloat32Handler(_decoder)); // FDIVR float32 (D8 /7) _handlers.Add(new FloatingPoint.Arithmetic.FdivrFloat32Handler(_decoder)); // FDIVR float32 (D8 /7)
// D9 opcode handlers (load/store float32 and control operations) // D9 opcode handlers (load/store float32 and control operations)
_handlers.Add(new FldFloat32Handler(_decoder)); // FLD float32 (D9 /0) _handlers.Add(new FloatingPoint.LoadStore.FldFloat32Handler(_decoder)); // FLD float32 (D9 /0)
_handlers.Add(new FstFloat32Handler(_decoder)); // FST float32 (D9 /2) _handlers.Add(new FloatingPoint.LoadStore.FstFloat32Handler(_decoder)); // FST float32 (D9 /2)
_handlers.Add(new FstpFloat32Handler(_decoder)); // FSTP float32 (D9 /3) _handlers.Add(new FloatingPoint.LoadStore.FstpFloat32Handler(_decoder)); // FSTP float32 (D9 /3)
// DC opcode handlers (float64 operations) // DC opcode handlers (float64 operations)
_handlers.Add(new FaddFloat64Handler(_decoder)); // FADD float64 (DC /0) _handlers.Add(new FloatingPoint.Arithmetic.FaddFloat64Handler(_decoder)); // FADD float64 (DC /0)
_handlers.Add(new FmulFloat64Handler(_decoder)); // FMUL float64 (DC /1) _handlers.Add(new FloatingPoint.Arithmetic.FmulFloat64Handler(_decoder)); // FMUL float64 (DC /1)
_handlers.Add(new FloatingPoint.Comparison.FcomFloat64Handler(_decoder)); // FCOM float64 (DC /2)
_handlers.Add(new FloatingPoint.Comparison.FcompFloat64Handler(_decoder)); // FCOMP float64 (DC /3)
_handlers.Add(new FloatingPoint.Arithmetic.FsubFloat64Handler(_decoder)); // FSUB float64 (DC /4)
_handlers.Add(new FloatingPoint.Arithmetic.FsubrFloat64Handler(_decoder)); // FSUBR float64 (DC /5)
_handlers.Add(new FloatingPoint.Arithmetic.FdivFloat64Handler(_decoder)); // FDIV float64 (DC /6)
_handlers.Add(new FloatingPoint.Arithmetic.FdivrFloat64Handler(_decoder)); // FDIVR float64 (DC /7)
// DD opcode handlers (load/store float64 operations)
_handlers.Add(new FloatingPoint.LoadStore.FldFloat64Handler(_decoder)); // FLD float64 (DD /0)
_handlers.Add(new FloatingPoint.LoadStore.FstFloat64Handler(_decoder)); // FST float64 (DD /2)
_handlers.Add(new FloatingPoint.LoadStore.FstpFloat64Handler(_decoder)); // FSTP float64 (DD /3)
// Other floating point handlers // Other floating point handlers
_handlers.Add(new FnstswHandler(_decoder)); // FNSTSW AX (DF E0) _handlers.Add(new FloatingPoint.Control.FnstswHandler(_decoder)); // FNSTSW AX (DF E0)
// Keep the existing handlers for operations not yet migrated to specialized handlers // Keep the existing handlers for operations not yet migrated to specialized handlers
_handlers.Add(new LoadStoreControlHandler(_decoder)); // Load and store control words (D9 /4-/7) _handlers.Add(new LoadStoreControlHandler(_decoder)); // Load and store control words (D9 /4-/7)