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Split FPU tests by instruction type for better organization and readability

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bird_egop
2025-04-15 22:45:09 +03:00
parent 0a2d551cb4
commit 61e92a50a5
12 changed files with 551 additions and 416 deletions
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X86DisassemblerTests/TestData/fdivr_tests.csv Normal file
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# FDIVR instruction tests
# Format: RawBytes;Instructions
RawBytes;Instructions
# FDIVR - Divide floating point values (reversed)
# ST(0), ST(i) form (D8 F8+i)
D8F8;[{ "Type": "Fdivr", "Operands": ["ST(0)", "ST(0)"] }]
D8F9;[{ "Type": "Fdivr", "Operands": ["ST(0)", "ST(1)"] }]
D8FA;[{ "Type": "Fdivr", "Operands": ["ST(0)", "ST(2)"] }]
D8FB;[{ "Type": "Fdivr", "Operands": ["ST(0)", "ST(3)"] }]
D8FC;[{ "Type": "Fdivr", "Operands": ["ST(0)", "ST(4)"] }]
D8FD;[{ "Type": "Fdivr", "Operands": ["ST(0)", "ST(5)"] }]
D8FE;[{ "Type": "Fdivr", "Operands": ["ST(0)", "ST(6)"] }]
D8FF;[{ "Type": "Fdivr", "Operands": ["ST(0)", "ST(7)"] }]
# ST(i), ST(0) form (DC F0+i)
DCF0;[{ "Type": "Fdivr", "Operands": ["ST(0)", "ST(0)"] }]
DCF1;[{ "Type": "Fdivr", "Operands": ["ST(1)", "ST(0)"] }]
DCF2;[{ "Type": "Fdivr", "Operands": ["ST(2)", "ST(0)"] }]
DCF3;[{ "Type": "Fdivr", "Operands": ["ST(3)", "ST(0)"] }]
DCF4;[{ "Type": "Fdivr", "Operands": ["ST(4)", "ST(0)"] }]
DCF5;[{ "Type": "Fdivr", "Operands": ["ST(5)", "ST(0)"] }]
DCF6;[{ "Type": "Fdivr", "Operands": ["ST(6)", "ST(0)"] }]
DCF7;[{ "Type": "Fdivr", "Operands": ["ST(7)", "ST(0)"] }]
# Memory operands
D83C2510000000;[{ "Type": "Fdivr", "Operands": ["dword ptr [0x10]"] }]
DC3C2510000000;[{ "Type": "Fdivr", "Operands": ["qword ptr [0x10]"] }]
D83C25;[{ "Type": "Fdivr", "Operands": ["dword ptr [eax]"] }]
DC3C25;[{ "Type": "Fdivr", "Operands": ["qword ptr [eax]"] }]
# FDIVRP - Divide floating point values (reversed) and pop
DEF0;[{ "Type": "Fdivrp", "Operands": ["ST(0)", "ST(0)"] }]
DEF1;[{ "Type": "Fdivrp", "Operands": ["ST(1)", "ST(0)"] }]
DEF2;[{ "Type": "Fdivrp", "Operands": ["ST(2)", "ST(0)"] }]
DEF3;[{ "Type": "Fdivrp", "Operands": ["ST(3)", "ST(0)"] }]
DEF4;[{ "Type": "Fdivrp", "Operands": ["ST(4)", "ST(0)"] }]
DEF5;[{ "Type": "Fdivrp", "Operands": ["ST(5)", "ST(0)"] }]
DEF6;[{ "Type": "Fdivrp", "Operands": ["ST(6)", "ST(0)"] }]
DEF7;[{ "Type": "Fdivrp", "Operands": ["ST(7)", "ST(0)"] }]
# FIDIVR - Divide floating point by integer (reversed)
DA3C2510000000;[{ "Type": "Fidivr", "Operands": ["dword ptr [0x10]"] }]
DE3C2510000000;[{ "Type": "Fidivr", "Operands": ["word ptr [0x10]"] }]
DA3C25;[{ "Type": "Fidivr", "Operands": ["dword ptr [eax]"] }]
DE3C25;[{ "Type": "Fidivr", "Operands": ["word ptr [eax]"] }]
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